Version 2.1.

Signed-off-by: NIIBE Yutaka <gniibe@fsij.org>
GNU/Linux: Fix the example.
2021-02-12 09:19:08 +09:00 · 2021-02-10 14:49:19 +09:00 · 2021-02-10 10:44:37 +09:00 · 2021-02-10 10:19:06 +09:00 · 2021-02-10 09:33:53 +09:00 · 2021-02-10 09:22:37 +09:00
172 changed files with 22825 additions and 2783 deletions
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -0,0 +1,15 @@
+image: debian:stable
+
+before_script:
+  - apt-get update && apt-get -y install texi2html
+
+pages:
+  stage: deploy
+  script:
+  - mkdir -p html && (cd html && texi2html ../doc/chopstx.texi)
+  - mv html/ public
+  artifacts:
+    paths:
+    - public
+  only:
+    - master
--- a/81
+++ b/81
@@ -2,6 +2,14 @@ Aidan Thornton:
    Added Maple Mini support.
 	board/board-maple-mini.h

+Evangelos Rigas:
+    Added Gnukey-DS support.
+	board/board-gnukey-ds.h
+
+Jeremy Drake:
+    Modified STM32F103 support.
+	mcu/sys-stm32f103.c
+
 Kaz Kojima:
    Added STM32 Primer2 support.
 	board/board-stm32-primer2.h
@@ -15,29 +23,72 @@ Kenji Rikitake:

 Kiwamu Okabe:
    Wrote an OpenOCD scirpt:
-        example-fsm-55/stlink-v2.cfg
+	example-fsm-55/stlink-v2.cfg

 Mateusz Zalega:
    Added Nitrokey-Start support.
 	board/board-nitrokey-start.h

 NIIBE Yutaka:
-    Write the library:
-	chopstx.c, entry.c, eventflag.c,
-        chopstx.h, eventflag.h
-    Write the drivers mcu/*:
-    	clk_gpio_init-mkl27z.c, clk_gpio_init-stm32.c,
-	sys-stm32f103.c, sys-stm32f030.c, sys-mkl27z.c,
-	adc-stm32f103.c, adc-mkl27z.c
-    Draw the logo:
+    Wrote the library:
+	chopstx.c, chopstx.h,
+	chopstx-cortex-m.c, chopstx-cortex-m.h,
+	chopstx-gnu-linux.c, chopstx-gnu-linux.h,
+        chopstx-riscv32.c, chopstx-riscv32.h,
+	entry.c, entry-cortex-m.c, entry-riscv32.c,
+	eventflag.c, eventflag.h
+    Wrote the drivers under mcu/:
+	chx-gd32vf103.c, chx-gnu-linux.c, chx-mkl27z.c,
+	chx-stm32f0.c, chx-stm32f103.c, chx-stm32l4.c,
+	clk_gpio_init-gd32vf103.c, clk_gpio_init-mkl27z.c,
+    	clk_gpio_init-stm32f.c,	clk_gpio_init-stm32l.c
+	cortex-m.h, gd32vf103.h, mkl27z.h, stm32.h,
+	stm32f103.h, stm32l.h,
+	sys-gnu-linux.c, sys-gnu-linux.h,
+	sys-mkl27z.c, sys-mkl27z.h,
+	sys-stm32f0.c, sys-stm32f0.h
+	sys-stm32f103.c, sys-stm32f103.h,
+	sys-stm32l4.c, sys-stm32l4.h,
+	usb-gd32vf103.c, usb-mkl27z.c,
+	usb-st-common.c, usb-stm32f103.c, usb-stm32l4.c
+    Wrote the drivers:
+	contrib/adc-mkl27z.c,
+	contrib/spi.h, contrib/spi-st.c
+    Drew the logo:
 	chopstx.svg, chopstx.png
-    Write examples:
-        example-led, example-cdc, example-fsm-55, example-fs-bb48
-    Write board/*:
-        board-fst-01.h, board-fst-01-00.h,
+    Wrote examples:
+	example-led, example-cdc, example-fsm-55, example-fs-bb48,
+	example-usb-serial, example-cdc-gnu-linux,
+	example-usart, example-lcd
+    Wrote board/*:
+	board-gnu-linux.h,
+        board-fst-01sz.h,
+	board-fst-01g.h, board-fst-01.h, board-fst-01-00.h,
 	board-olimex-stm32-h103.h, board-stm8s-discovery.h
 	board-cq-starm.h, board-stbee-mini.h, board-stbee.h,
-
 	board-stm32f0-discovery.h, board-fsm-55.h,
+	board-st-nucleo-l432.h,
+	board-fs-bb48.h,
+	board-blue-pill-g.h,
+	board-longan-nano.h

-	board-fs-bb48.h
+    For Free Software Initiative of Japan, wrote:
+	contrib/adc-stm32f103.c,
+	contrib/adc-gnu-linux.c
+
+    Under contract of g10 Code GmbH, wrote:
+	mcu/usb-usbip.c,
+	contrib/ackbtn.h, contrib/ackbtn-stm32f103.c,
+	contrib/usart.h,
+	contrib/usart-common.c, contrib/usart-common-f103.c,
+	contrib/usart-gd32vf103.c,
+	contrib/usart-impl-f103.h, contrib/usart-impl.h,
+	contrib/usart-stm32f103.c, contrib/usart-stm32l4.c,
+
+Paul Fertser:
+    Added Blue Pill support.
+	board/board-blue-pill.h
+
+Szczepan Zalega:
+    Modified Nitrokey-Start support.
+	board/board-nitrokey-start.h
--- a/884
+++ b/884
@@ -1,3 +1,887 @@
+2021-02-12  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 2.1
+	* doc/chopstx.texi (VERSION): 2.1.
+
+2021-02-10  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-cdc-gnu-linux/usb-cdc.c (tty_recv): Cancel the input.
+
+	* chopstx.c (chx_recv_irq): Bug fix when no waiter.
+
+	* chopstx-gnu-linux.c (chopstx_create_arch): Fix ARGC of
+	makecontext call.
+	(chx_idle): Support exit by SIGINT or SIGTERM.
+
+2021-02-09  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-gnu-linux.c (chopstx_create_arch): Clear TP.
+
+	* example-cdc-gnu-linux/sample.c (main): Handle timeout by canceling
+	input.
+
+	* chopstx-gnu-linux.c (voluntary_context_switch): Fix for the case
+	when chx_idle suggests no context switch (tp_prev == tp_next).
+
+2021-02-08  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* entry-cortex-m.c (vector_table): No use of PENDV exception.
+	Use chx_handle_intr for SysTick.
+	* example-fsm-55/reset.c (vector): Likewise.
+
+	* chopstx-cortex-m.c (preempting): Remove.
+	(CPU_EXCEPTION_PRIORITY_PENDSV): Remove.
+	(chx_interrupt_controller_init): No setup for PENDV.
+	(chx_request_preemption_possibly): Remove.
+	(involuntary_context_switch): New.
+	(chx_timer_handler): Remove.
+	(chx_handle_intr): Use involuntary_context_switch directly.
+	(preempt): Remove.
+
+2021-02-05  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-cortex-m.c (preempting): New value to hold the pointer
+	to preempting thread, which will become RUNNING.
+	(chx_request_preemption_possibly): New.
+	(chx_timer_handler, chx_handle_intr): Use the new function.
+	(preempt): Recover R0 from PREEMPTING and clear PREEMPTING.
+	(svc): Don't share return path with preempt.
+
+2021-02-04  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-fsm-55.h (VAL_GPIO_LED_MODER): Support SWD
+	debugging.
+
+2020-06-26  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 2.0
+	* doc/chopstx.texi (VERSION): 2.0.
+
+2020-06-23  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chopstx_critical): New.
+
+2019-12-27  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/spi-st.c (check_transmit, put_data): Fix handling
+	conditions.
+	[!SPI_USE_INTERRUPT]: Support busy wait mode.
+
+2019-12-27  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-gd32vf103.c: New.
+
+	* mcu/clk_gpio_init-gd32vf103.c (clock_init): Configure USB clock.
+
+	* mcu/gd32vf103.h (RCU_CFG0_USBFSPSC_DIV2): New.
+
+	* usb_lld.h [MCU_GD32VF1]: Support GD32VF103.
+
+2019-12-27  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chopstx_poll): Call CHECK for condition
+	valiable after woken up.
+
+2019-12-04  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-gnu-linux.c (chx_thread_start): Fix return value.
+
+2019-12-03  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* rules.mk [ARCH=riscv32] (MCFLAGS, LDFLAGS): Define.
+	(CFLAGS, LDFLAGS): Don't add -m for ARM specific.
+
+	* example-lcd: New.
+
+2019-12-03  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-gd32vf103.c: New.
+
+	* contrib/usart-common.c (usart_stat, get_usart_dev)
+	(get_usart_rb_h2a, get_usart_rb_a2h, get_usart_intr): Handle
+	when USART_DEVNO_START==0.
+
+	* contrib/usart-stm32f103.c: Use usart-impl.h.
+	Factor out to...
+	* contrib/usart-common-f103.c: New.
+
+	* contrib/usart-stm32l4.c: Factor out definitions into...
+	* contrib/usart-impl.h: New.
+
+2019-12-03  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-longan-nano.h: New.
+
+	* mcu/gd32vf103.h: New.
+	* mcu/chx-gd32vf103.c: New.
+	* mcu/clk_gpio_init-gd32vf103.c: New.
+
+	* chopstx-riscv32.h: New.
+	* chopstx-riscv32.c: New.
+	* entry-riscv32.c: New.
+
+	* entry-cortex-m.c: Rename from entry.c.
+
+2019-12-03  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/spi.h: New.
+	* contrib/spi-st.c: New.
+
+	* chopstx.c (chx_timer_expired): When no timer, explicitly call
+	chx_systick_reload with 0.
+
+2019-12-03  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-cdc/Makefile (ARCH): Define.
+	* example-cdc-gnu-linux/Makefile (ARCH): Ditto.
+	* example-fraucheky/Makefile (ARCH): Ditto.
+	* example-fs-bb48/Makefile (ARCH): Ditto.
+	* example-fsm-55/Makefile (ARCH): Ditto.
+	* example-led/Makefile (ARCH): Ditto.
+	* example-primer2/Makefile (ARCH): Ditto.
+	* example-usart/Makefile (ARCH): Ditto.
+	* example-usb-serial/Makefile (ARCH): Ditto.
+
+	* chopstx.c: Include files by ARCH_HEADER and ARCH_IMPL.
+	* rules.mk (DEFS): Define ARCH_HEADER and ARCH_IMPL by ARCH.
+
+2019-11-25  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-gnu-linux.c (chx_idle): Synchronous IDLE.
+	(chx_idle, idle_stack): Remove.
+	(chx_init_arch): Don't makecontext for IDLE.
+	(preempted_context_switch): Simplify, because no case for
+	interrupting IDLE.
+	(voluntary_context_switch): Simply call chx_idle to get tp_next.
+
+2019-11-22  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-gnu-linux.c (preempted_context_switch): Rename.
+
+2019-11-21  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chx_sched): New common function.
+
+	* chopstx-cortex-m.c (svc): Simply context switch.
+	(voluntary_context_switch): New, replacing chx_sched.
+	* chopstx-gnu-linux.c (voluntary_context_switch): Likewise.
+
+2019-11-21  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.h (CHOPSTX_PRIO_INHIBIT_PREEMPTION): Remove.
+	* chopstx.c (chx_init): Remove support of
+	CHOPSTX_PRIO_INHIBIT_PREEMPTION.
+	(chopstx_setpriority): Likewise.
+
+	* chopstx-cortex-m.c (CPU_EXCEPTION_PRIORITY_PENDSV): Change the
+	value.  Now PendSV exception runs at same priority level of
+	all other exceptions (systick and interrupt exception).
+	(chx_cpu_sched_lock, chx_cpu_sched_unlock):
+	Remove support of CHOPSTX_PRIO_INHIBIT_PREEMPTION.
+	(chx_request_preemption): Change the argument with none.
+	(chx_timer_handler): New.  Use common function of
+	chx_timer_expired, local one, chx_request_preemption.
+	(chx_handle_intr): Use chx_recv_irq.
+	(chx_sched): Remove support of CHOPSTX_PRIO_INHIBIT_PREEMPTION.
+	(preempt): Have an argument from tail-chaining.
+	Remove support of CHOPSTX_PRIO_INHIBIT_PREEMPTION.
+
+	* chopstx-gnu-linux.c (chx_idle): Rename.
+	(chx_init_arch): Follow the rename.
+	(chx_handle_intr): Use chx_recv_irq, chx_running_preempted, and
+	chx_preempt_into.
+	(sigalrm_handler): Use chx_timer_expired, chx_running_preempted,
+	and chx_preempt_into.
+	(chx_preempt_into): Rename from chx_request_preemption, changing
+	argument.  Remove the handling of preempted thread, which should
+	be done by caller using chx_running_preempted, beforehand.
+
+	* entry.c (vector_table): Use chx_timer_handler.
+
+	* chopstx.c (chx_timer_expired): Pop from the ready queue and
+	return the next thread to switch.
+	(chx_recv_irq): New.
+	(chx_running_preempted): New.
+
+2019-11-21  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-cortex-m.c (chx_set_running): New.
+	(chx_init_arch): Use chx_set_running.
+	(preempt, svc): Remove set to running, not needed.
+
+	* chopstx-gnu-linux.c (chx_set_running): New.
+	(chx_init_arch, chx_request_preemption, chx_sched): Use
+	chx_set_running and chx_running.
+	(chx_sched): Bug fix of return value handling.
+
+2019-11-20  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.17.
+	* doc/chopstx.texi (VERSION): 1.17.
+
+	* chopstx-gnu-linux.c (chx_running): New.
+	(chx_init_arch): Set RUNNING.
+
+2019-11-19  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-cortex-m.c (chx_running): New.
+	(chx_init_arch): Set RUNNING.
+
+	* chopstx.c (chx_init): Don't set RUNNING here.
+	(chx_timer_expired): Use chx_running.
+	(chx_systick_init, chx_exit, chx_mutex_unlock, chopstx_create)
+	(chopstx_mutex_lock, chopstx_mutex_unlock, chopstx_cleanup_push)
+	(chopstx_cleanup_pop, chopstx_exit, chopstx_cancel)
+	(chopstx_testcancel, chopstx_setcancelstate, chx_proxy_init)
+	(chopstx_poll, chopstx_setpriority): Likewise.
+
+2019-11-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-gnu-linux.c (chx_systick_init_arch): Rename.
+	(chx_interrupt_controller_init): Rename.
+	* chopstx-cortex-m.c (chx_systick_init_arch): Rename.
+	(chx_interrupt_controller_init): Rename.
+	* chopstx.c (chx_systick_init): Use chx_systick_init_arch.
+	(chx_init): Use chx_interrupt_controller_init.
+
+2019-11-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chx_ready_pop): Check flag_sched_rr here.
+	* chopstx-cortex-m.c (chx_sched) [__ARM_ARCH_6M__]: Use
+	new interface of chx_ready_pop.
+	(preempt,svc): Likewise.
+
+2019-11-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-cortex-m.c (ticks_to_usec): New.
+	* chopstx-gnu-linux.c (ticks_to_usec): New.
+	* chopstx.c (chx_snooze): Use ticks_to_usec.
+
+2019-11-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* rules.mk (CSRC): Change the rule of entry*.c.
+	* entry.c: It's only for Cortex-M, now.
+	* entry-gnu-linux.c: New file.
+
+2019-11-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* entry.c: Use chopstx-cortex-m.h.
+	* chopstx.h (CHOPSTX_THREAD_SIZE): Move the definition to ...
+	* chopstx-cortex-m.h (CHOPSTX_THREAD_SIZE): ... here.
+
+2019-10-07  Jeremy Drake  <jeremy@drastrom.science>
+
+	* mcu/usb-st-common.c (usb_lld_init): Move BTABLE initialization
+	after clearing ISTR register.
+
+2019-09-04  NIIBE Yutaka  <gniibe@fsij.org>
+
+	When it was exactly 64-byte, two ZLPs were sent wrongly.
+	* mcu/usb-st-common.c (usb_lld_ctrl_send): Fix for 64-byte.
+	* mcu/usb-usbip.c (usb_lld_ctrl_send): Likewise.
+	* mcu/usb-mkl27z.c (usb_lld_ctrl_send): Likewise.
+
+2019-05-22  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.16.
+	* doc/chopstx.texi (VERSION): 1.16.
+
+2019-05-22  Evangelos Rigas <erigas@rnd2.org>
+
+	* board/board-gnukey-ds.h: New.
+
+2019-05-14  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.15.
+	* doc/chopstx.texi (VERSION): 1.15.
+
+2019-05-13  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-maple-mini.h: Assert USB D+ pull-up.
+	* board/board-olimex-stm32-h103.h: Likewise.
+	* board/board-stbee.h:Likewise.
+	* board/board-stm32-primer2.h: Likewise.
+
+	* mcu/usb-stm32f103.c: Don't use usb_lld_sys_init and
+	usb_lld_sys_shutdown in SYS.
+	* mcu/usb-stm32l4.c: Ditto.
+
+2019-05-10  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chopstx_claim_irq): Check INTR before the call.
+
+	* chopstx-cortex-m.c (chx_disable_intr): Have return value.
+	* chopstx-gnu-linux.c (chx_disable_intr): Likewise.
+
+2019-05-10  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/sys-stm32f103.c: SYS version 4.0.
+	* mcu/sys-gnu-linux.c: Likewise.
+	* mcu/sys-mkl27z.c: Likewise.
+	* mcu/sys-stm32l4.c: Likewise.
+	* mcu/sys-stm32f0.c: Likewise.
+
+2019-05-08  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/sys-stm32f103.c (usb_lld_sys_shutdown, usb_lld_sys_init):
+	Only cable config.
+
+	* mcu/sys-stm32l4.c (usb_lld_sys_shutdown, usb_lld_sys_init):
+	Likewise.
+
+	* mcu/usb-st-common.c (usb_lld_init): Call chip specific routine.
+	(usb_lld_shutdown): Likewise.
+
+	* mcu/usb-stm32l4.c (usb_lld_init_chip_specific)
+	(usb_lld_shutdown_chip_specific): New.
+
+	* mcu/usb-stm32f103.c (usb_lld_init_chip_specific)
+	(usb_lld_shutdown_chip_specific): New.
+
+	* rules.mk (DEFS): Add -DUSE_SYS when USE_SYS.
+
+2019-04-25  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart.h (BSCARD1, BSCARD2...): New.
+	(BSCARD): Remove.
+
+	* contrib/usart-stm32f103.c (usart_config_baud): Rename
+	from usart_config_brr, changing API.
+	* contrib/usart-stm32l4.c (usart_config_baud): Likewise.
+
+2019-04-24  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/sys-stm32l4.c: New.
+	* mcu/chx-stm32l4.c: New.  Not support suspend yet.
+	* mcu/stm32l.h: New.
+	* mcu/clk_gpio_init-stm32l.c: New.
+
+2019-04-17  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-stm32l4.c: New.
+	* mcu/usb-st-common.c: Factor out from usb-stm32f103.c.
+
+2019-04-12  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-stm32l4.c: New.
+	* contrib/usart-common.c: Factor out from usart-stm32f103.c.
+
+	* entry.c [__ARM_ARCH_7EM__] (entry): Fix for Cortex-M4.
+
+2019-04-11  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-cortex-m.c: Support Cortex-M4 (not touching FPU).
+
+2019-04-10  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/clk_gpio_init-stm32f.c: Rename from clk_gpio_init-stm32.c.
+
+	* entry.c: Use STM32F10X_HD.
+	* board/board-stbee.h (STM32F10X_HD): Add.
+	* board/board-stm32-primer2.h (STM32F10X_HD): Add.
+
+2019-04-09  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-stm32f103.c (usart_block_sendrecv): Support
+	busy-wait when timeout_block_p == 0.
+
+2019-04-08  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-stm32f103.c (usart_block_sendrecv): New.
+	(usart_init0): New.
+
+2019-03-30  Niibe Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-stm32f103.c (usart_config_brr): New.
+	(usart_config_re): New internal function.
+	(handle_intr, handle_tx_ready): Use TC for smartcard.
+	(usart_wait_write_completion): New internal function.
+	(usart_write): Support half-duplex smartcard mode.
+
+2019-03-29  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-stm32f103.c (usart_read_ext): New.
+	(usart_read_prepare_poll): New.
+
+2019-03-02  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.14.
+	* doc/chopstx.texi (VERSION): 1.14.
+
+2019-03-01  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-stm32f103.c (usart_config): Fix SCEN setting
+	procedure.
+
+2019-03-01  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-stm32f103.c (usart_config): Support parity error
+	interrupt setting.
+	(usart_init): Don't call usart_config here.
+	* example-usb-serial/sample.c: It's application calling
+	usart_config.
+
+2019-02-28  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart.h (BSCARD): New.
+	* contrib/usart-stm32f103.c (BSCARD): Baudrate for smartcard.
+	(usart_config_clken): New.
+	(usart_config): Fix for MODE_SMARTCARD.
+
+	* board/board-st-nucleo-f103.h: Define pins for smartcard
+	interface.
+
+2019-02-21  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart.h (MODE_SMARTCARD, MODE_IRDA, MODE_IRDA_LP)
+	(MASK_MODE): New.
+
+	* contrib/usart-stm32f103.c (usart_config): Add support for
+	those modes.
+
+2018-12-19  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.13.
+	* doc/chopstx.texi (VERSION): 1.13.
+
+2018-12-08  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chx_timer_dequeue): Fix calculation of return value.
+
+2018-12-07  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chx_timer_dequeue): Return ticks remained.
+	(chx_wakeup, chopstx_mutex_lock): Use return value of
+	chx_timer_dequeue.
+	(chx_snooze): Update *USEC_P, accordingly.
+
+2018-11-12  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.12.
+	* doc/chopstx.texi (VERSION): 1.12.
+
+	* contrib/ackbtn-stm32f103.c (ackbtn_init): Support FST-01 and
+	FST-01G, using PA2.
+	(ackbtn_disable): Fix to correctly clear pending interrupt.
+
+2018-11-09  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* eventflag.c (eventflag_set_mask): New.
+
+2018-10-02  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.11.
+	* doc/chopstx.texi (VERSION): 1.11.
+
+2018-10-01  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/ackbtn-stm32f103.c (PINCFG_EDGE): New.
+	(ackbtn_init): Use PINCFG_EDGE bit.
+	(ackbtn_enable): Configure the edge detector here.
+	(ackbtn_disable): Disable the edge detector.
+
+	* chopstx.c (chopstx_poll): Don't clear ->ready here.
+	(chx_cond_hook): Set ->ready = 0 when condition does
+	not meet.
+	(chopstx_claim_irq): Make sure clearing the interrupt.
+	(chx_intr_hook): Add the case when ->ready == 1.
+	(chopstx_intr_done): Set ->ready = 0.
+	(chx_join_hook): Set ->ready = 0 when it is still alive.
+
+2018-09-29  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.10.
+	* doc/chopstx.texi (VERSION): 1.10.
+
+2018-09-27  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/ackbtn-stm32f103.c: New.
+	* rules.mk [USE_ACKBTN] (CSRC): Add ack-button support.
+
+2018-09-26  NIIBE Yutaka  <gniibe@fsij.org>
+
+	Fix for chopstx_intr_done.  No spurious interrupts.
+	* contrib/adc-mkl27z.c (adc_wait_completion): Fix.
+	* contrib/adc-stm32f103.c (adc_wait_completion): Likewise.
+	* contrib/usart-stm32f103.c (usart_main): Likewise.
+	* example-cdc-gnu-linux/usb-cdc.c (tty_main): Likewise.
+	* example-cdc/usb-cdc.c (tty_main): Likewise.
+	* example-fraucheky/main.c (usb_main): Likewise.
+	* example-fs-bb48/touch.c (touch_get): Likewise.
+	* example-fs-bb48/usb-cdc.c (tty_main): Likewise.
+	* example-primer2/primer2-ts.c (adc3_conversion): Likewise.
+	* example-usb-serial/usb-cdc.c (cdc_main): Likewise.
+
+2018-09-26  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.h (chopstx_intr_done): New function.
+	* chopstx.c (chopstx_intr_done): New function.
+	(chopstx_poll): Don't call chx_clr_intr.
+	Ensure data memory barrier for interrupt handling.
+
+	* chopstx-cortex-m.c (chx_dmb): New static function.
+	* chopstx-gnu-linux.c (chx_dmb): Ditto.
+
+2018-09-21  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/stm32.h (struct GPIO, struct FLASH): Moved from...
+	* mcu/clk_gpio_init-stm32.c: ... here.
+	(AFIO_MAPR_SWJ_CFG_JTAGDISABLE): Move to ...
+	* mcu/stm32f103.h: ... here.
+	* mcu/sys-stm32f103.c: Don't include "mcu/cortex-m.h".
+
+	* board/board-fst-01sz.h: New.
+	* mcu/sys-stm32f103.h (BOARD_ID_FST_01SZ): New.
+	* contrib/adc-stm32f103.c (get_adc_config): Add BOARD_ID_FST_01SZ.
+
+2018-08-20  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-stm32f103.c (usb_lld_ctrl_send): Fix for ZLP.
+	* mcu/usb-usbip.c (usb_lld_ctrl_send): Likewise.
+	* mcu/usb-mkl27z.c (usb_lld_ctrl_send): Likewise.
+
+2018-05-09  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.9.
+	* doc/chopstx.texi (VERSION): 1.9.
+
+2018-05-08  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-blue-pill.h (GPIO_USB_SET_TO_ENABLE): Remove.
+
+	* doc/chopstx.texi (Compile-time macro): New chapter.
+
+	* mcu/sys-stm32f103.c (usb_lld_sys_init): Use MHZ.
+	(flash_protect): Fix for GD32F103.
+
+2018-04-26  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-blue-pill-g.h: New.  Define STM32_ADCPRE and
+	STM32_USBPRE for 96MHz clock.
+	* mcu/stm32.h (STM32_USBPRE_DIV2): New for GD32F103.
+	* mcu/clk_gpio_init-stm32.c: Allow constants, which are defined by
+	board.h	(STM32_ADCPRE and STM32_USBPRE).
+	* mcu/chx-stm32f103.c: Use STM32_ADCPRE and STM32_USBPRE.
+
+	* mcu/usb-stm32f103.c (usb_lld_init): BTABLE setting at
+	initialization.
+	(usb_lld_reset): Not at each reset.
+
+	* contrib/adc-stm32f103.c [MCU_STM32F1_GD32F1]: Use continuous
+	sampling with no DELIBARATELY_DO_IT_WRONG_START_STOP.
+	(adc_init): Wait after ADC_CR2_ADON.
+	(adc_start): Likewise.  Enabling by ADC_CR2_ADON after all other
+	registers configuration.
+
+2018-01-19  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.8.
+	* doc/chopstx.texi (VERSION): 1.8.
+
+2018-01-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/stm32f103.h: Include stm32.h and cortex-m.h.
+
+2018-01-09  Anthony Romano <romanoanthony061@gmail.com>
+
+	* contrib/adc-stm32f103.c: Support IN8 config.
+
+2017-12-19  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.7.
+	* doc/chopstx.texi (VERSION): 1.7.
+
+2017-12-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/usart-stm32f103.c: New.
+	* example-usb-serial: New example.
+
+2017-12-16  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chx_timer_expired): Bug fix of wake up.
+	(chx_mutex_unlock): Avoid non-deterministic thing.
+
+2017-12-14  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-st-nucleo-f103.h: Update.
+
+	* mcu/sys-stm32f103.h (BOARD_ID_FST_01G): New.
+
+	* contrib/adc-stm32f103.c (get_adc_config): Add a case for
+	BOARD_ID_FST_01G and BOARD_ID_ST_NUCLEO_F103.
+
+2017-11-24  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.6.
+	* doc/chopstx.texi (VERSION): 1.6.
+	* doc/chopstx-api.texi: Regenerated.
+
+2017-11-21  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-fsm-55: Update using stack-def.h.
+
+2017-11-20  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-led: Update using stack-def.h.
+
+	* chopstx-cortex-m.c [__ARM_ARCH_6M__] (chx_sched): Fix.
+
+2017-11-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-fsm-55/hh.c (main): Just return.
+
+2017-11-17  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/chx-stm32f103.c (configure_clock): Change prescaler on
+	sleep.
+
+	* mcu/clk_gpio_init-stm32.c (clock_init): Don't turn on CRC
+	module.
+
+	* mcu/clk_gpio_init-stm32.c (STM32_*): Move to...
+	* mcu/stm32.h (STM32_*): ... this header file.
+
+	* mcu/stm32f103.h, mcu/clk_gpio_init-stm32.c (RCC): Move to...
+	* mcu/stm32.h (RCC): ... this header file.
+
+	* example-fsm-55: Update for new sleep API.
+
+	* rules.mk (CSRC): Add mcu/chx-$(CHIP).c.
+
+	* chopstx-cortex-m.c (idle, chx_sleep_mode): Remove.
+	(chx_sched, preempt): Call chx_idle.
+	* mcu/chx-mkl27z.c, mcu/chx-stm32f0.c, mcu/chx-stm32f103.c: New.
+	* mcu/stm32.h: New.
+
+	* chopstx-gnu-linux.c (chx_sleep_mode): Move to...
+	* mcu/chx-gnu-linux.c: Here.
+
+	* mcu/stm32f103.h (DBGMCU): New.
+
+	* mcu/cortex-m.h: New.
+	* mcu/sys-stm32f0.c, mcu/sys-stm32f103.c: Use mcu/cortex-m.h.
+
+	* chopstx.c (chopstx_conf_idle): Call chx_sleep_mode before
+	changing chx_allow_sleep.
+
+	* board/board-blue-pill.h, board/board-cq-starm.h,
+	board/board-fst-01-00.h, board/board-fst-01.h,
+	board/board-fst-01g.h, board/board-maple-mini.h,
+	board/board-nitrokey-start.h, board/board-olimex-stm32-h103.h,
+	board/board-st-dongle.h, board/board-st-nucleo-f103.h,
+	board/board-stbee-mini.h, board/board-stbee.h,
+	board/board-stm32-primer2.h: Add MCU_STM32F1.
+
+2017-11-16  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.h (chopstx_poll): API change.
+	* chopstx.c (chopstx_poll): Use const pointer.
+
+	* chopstx-cortex-m.c (idle): Support WFE.
+	[!MCU_STM32F0] (chx_sleep_mode): Clock feed by HSI.
+
+2017-11-15  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chopstx_conf_idle): Call chx_sleep_mode.
+	* chopstx-cortex-m.c (chx_sleep_mode): New.
+	* chopstx-gnu-linux.c (chx_sleep_mode): New.
+
+2017-11-15  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-fsm-55/hh.c (main): Add call to chopstx_conf_idle.
+	* example-fsm-55/Makefile (DEFS): Remove USE_WFI_FOR_IDLE.
+
+	* chopstx.c (chx_init): Initialize sleep lock.
+	(chopstx_conf_idle): New.
+	* chopstx-cortex-m.c (idle): Support sleep.
+
+	* mcu/usb-stm32f103.c (usb_lld_event_handler): Fix suspend/resume.
+
+2017-11-14  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* usb_lld.h (DEVICE_STATE): Add prefix USB_DEVICE_STATE_.
+	(USB_DEVICE_STATE_DEFAULT): New.
+
+	* mcu/usb-stm32f103.c (usb_lld_init): Suspend/resume init.
+	(usb_lld_event_handler): Add suspend/resume support.
+
+	* example-cdc/usb-cdc.c: Follow the change of usb_lld.h.
+	* example-cdc-gnu-linux/usb-cdc.c: Ditto.
+	* example-fs-bb48/usb-cdc.c: Ditto.
+	* example-fraucheky/main.c: Ditto.
+	* example-fraucheky/Makefile (USE_SYS): Add for debug.
+
+2017-11-13  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-stm32f103.c (usb_lld_init): Set up interrupt on errors.
+
+	* usb_lld.h (USB_EVENT_DEVICE_WAKEUP): New.
+	(INTR_REQ_USB): Define here.
+	* mcu/usb-usbip.c, example-cdc/usb-cdc.c,
+	example-fraucheky/main.c, example-fs-bb48/usb-cdc.c: Change
+	for INTR_REQ_USB.
+
+2017-11-10  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-cortex-m.c (svc): Replace stack top to TP.
+	(chx_sched): Return ->v correctly.
+
+	* chopstx.c (chx_timer_expired): Fix timeout.
+
+2017-10-11  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/sys-stm32f103.h (nonreturn_handler0, nonreturn_handler1): New.
+
+2017-10-10  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-usbip.c (usbip_run_server): Shutdown support.
+	(usb_lld_shutdown): Shutdown glace-fully.
+
+2017-10-10  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.5.
+	* doc/chopstx.texi (VERSION): 1.5.
+	* doc/chopstx-api.texi: Regenerated.
+
+2017-10-09  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-cdc-gnu-linux/sample.c (main): Support debug option.
+
+	* mcu/sys-gnu-linux.h (debug): New.
+	* mcu/sys-gnu-linux.c: Use debug.
+	* mcu/usb-usbip.c: Use debug.
+
+	* example-cdc/sample.ld (.process_stack, .main_stack): Add NOLOAD.
+
+2017-09-29  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/sys-stm32f103.c (flash_program_halfword, flash_erase_page)
+	(flash_write, flash_erase_all_and_exec): Use uintptr_t.
+
+2017-09-08  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/sys-gnu-linux.c: Flash emulation implemented.
+
+2017-09-05  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-cdc: Use stack-def.h.
+	* example-cdc/stack-def.h: New.
+
+2017-09-04  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/sys-stm32f103.h (nvic_system_reset): Add noreturn attribute.
+
+	* sys.h: Add mcu/sys-gnu-linux.h.
+
+	* mcu/sys-gnu-linux.c: New.
+	* mcu/sys-gnu-linux.h: New.
+
+2017-08-11  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.4.
+	* doc/chopstx.texi (VERSION): 1.4.
+
+2017-08-03  Jeremy Drake <jeremydrake+gnuk@eacceleration.com>
+
+	* mcu/sys-stm32f103.c (flash_write): Allow compile time
+	flash size definition by STM32F103_OVERRIDE_FLASH_SIZE_KB.
+
+2017-08-02  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/adc-gnu-linux.c: New.
+
+2017-07-07  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-usbip.c (usbip_handle_data_urb): Fix error return value.
+	(notify_hostcontroller): New.
+	(usb_lld_stall_tx, usb_lld_stall_rx): Notify host controller side.
+
+2017-07-06  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-usbip.c (hc_handle_data_urb): Fix the condition of the
+	end of transaction.
+	(read_data_transaction): Allow partial read by host.
+
+2017-07-05  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-fraucheky: New.
+
+2017-06-28  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-usbip.c (struct usbip_msg_cmd, struct usbip_msg_rep):
+	Use different struct for command and reply.
+
+2017-06-27  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-cdc-gnu-linux/README: New.
+
+2017-06-26  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-gnu-linux.h: New.
+
+	* mcu/usb-usbip.c: New.
+
+	* rules.mk: Support EMULATION.
+
+	* entry.c (main): Support GNU_LINUX_EMULATION.
+
+2017-06-23  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx-gnu-linux.c, chopstx-gnu-linux.h: New.
+
+	* chopstx.c (chx_init): Use chx_init_arch.
+	(chopstx_create): Use chopstx_create_arch.
+	(chx_systick_reset, chx_systick_reload, chx_systick_get)
+	(usec_to_ticks, chx_enable_intr, chx_clr_intr, chx_disable_intr)
+	(chx_set_intr_prio, chx_prio_init, chx_cpu_sched_lock)
+	(chx_cpu_sched_unlock, idle, chx_handle_intr)
+	(chx_request_preemption, chx_sched, preempt, svc): Move to...
+	* chopstx-cortex-m.c: ... here.
+	(chx_init_arch, chopstx_create_arch): New.
+	* chopstx-cortex-m.h: New for tcontext_t.
+
+2017-06-22  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chx_sched): Use ->V for return value.
+	(svc): Ditto.
+	(chx_wakeup): Set -> for the return value of chx_sched.
+	(chopstx_mutex_lock, chopstx_cancel): Likewise.
+	(chopstx_exit): Remove naked attribute.
+
+2017-06-21  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (struct chx_pq): Use uintptr_t for V.
+	(struct chx_px): Likewise.
+	(struct chx_thread): Likewise.
+	(chx_sched): Use uintptr_t for the return value.
+	(chx_exit): Use the field V for holding exit value.
+	(chopstx_create): Use uintptr_t for STACK_ADDR.
+	(chopstx_join): Use the field V for exit value.
+
+2017-06-16  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chx_wakeup): Fix for RUNNING==NULL.
+
+	* mcu/usb-mkl27z.c (std_get_status): Use staic var, not auto.
+
+2017-05-18  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chx_wakeup): Fix access to REG_R0.
+
+2017-02-02  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.3.
+	* doc/chopstx.texi (VERSION): 1.3.
+
+2017-02-01  Paul Fertser <fercerpav@gmail.com>
+
+	* board/board-blue-pill.h: New.
+
+2016-12-08  Szczepan Zalega <szczepan@nitrokey.com>
+
+	* board/board-nitrokey-start.h (VAL_GPIO_USB_ODR): Switch off red
+	LED for Nitrokey Start.
+
 2016-10-13  NIIBE Yutaka  <gniibe@fsij.org>

 	* VERSION: 1.2.
--- a/2
+++ b/2
@@ -5,7 +5,7 @@ include following exception to GNU GPL.
 --------------------
 As additional permission under GNU GPL version 3 section 7, you may
 distribute non-source form of the Program without the copy of the GNU
-GPL normally required by section 4, provided you inform the receipents
+GPL normally required by section 4, provided you inform the recipients
 of GNU GPL by a written offer.
 --------------------

--- a/301
+++ b/301
@@ -1,6 +1,299 @@
 NEWS - Noteworthy changes


+* Major changes in Chopstx 2.1
+
+  Released 2021-02-12
+
+** GNU/Linux emulation change
+The process can be asked to exit by SIGINT or SIGTERM.
+
+** Bug fix for interrupt handling
+The check to find waiting thread was wrong.  If no waiting thread,
+it failed.
+
+** Bug fix for GNU/Linux emulation
+In 2.0, GNU/Linux emulation doesn't work well with chx_idle when it
+handles interrupt synchronously and the waken thread is the same one
+which called chx_idle.
+
+** Bug fix for Cortex-M0/Cortex-M3 Support
+In 2.0, Cortex-M0 with no tail-chaining support (e.g. STM32F030)
+doesn't work.  In 2.0, Cortex-M3/M4 may fail when two or more
+interrupts occur simultaneously; A waken thread (which is about to
+preempt RUNNING) by the first interrupt may be lost (and never
+scheduled again), by the second interrupt handling before the call of
+preempt function.
+
+
+* Major changes in Chopstx 2.0
+
+  Released 2020-06-26
+
+** Remove support of CHOPSTX_PRIO_INHIBIT_PREEMPTION
+We used to have (an experimental) feature of higher priority of thread
+(>= CHOPSTX_PRIO_INHIBIT_PREEMPTION).  The feature offered: When a
+thread has such a priority, Chostx guarantees that it keeps running
+and no other threads can preempt the thread.  I had introduced this
+(questionable) feature as an excuse against no support of
+masking/unmasking interrupt API.  From the experience of Chopstx, it
+is rather consistent to remove this feature.  It was over engineering
+to support a thread having such a special priority.
+
+** New function: chopstx_critical
+Let run FUNC with ARG, under CPU scheduler lock (== no preemption).
+
+** RISC-V MCU support
+RISC-V support has been added.  It's for the core named Bumblebee.
+
+
+* Major changes in Chopstx 1.18
+
+  Released 2019-12-30
+
+** Fix of chopstx_poll
+When waiting for a condition variable, we supply CHECK method with a
+descriptor.  Since a condition variable may be fired for multiple
+reasons, old implementation of chopstx_poll may return with wrong
+information saying a condition of CHECK were met but actually not.  It
+should not return when condition is not satisfied and it should not
+give wrong information to application.  Fixed by calling the CHECK
+method again when woken up, and don't return when no condition meet.
+
+** Bug fix for GNU/Linux emulation
+When woken up, return value of chx_sched was wrong.  Because of this,
+timeout handling had problem.  Termination value of a thread was
+wrong.
+
+
+* Major changes in Chopstx 1.17
+
+  Released 2019-11-20
+
+** USB drivers bug fix for STM32 and ZLP handling for 64-byte packet.
+
+
+* Major changes in Chopstx 1.16
+
+  Released 2019-05-22
+
+** New board support: Gnukey-DS
+It is contributed by Evangelos Rigas.
+
+
+* Major changes in Chopstx 1.15
+
+  Released 2019-05-14
+
+** SYS version 4.0
+USB initialization/finalization API has been changed.  SYS routines
+only handle USB cable configuration when supported by a board.
+
+** USB driver change
+Enabling/disabling USB module is done by USB driver.  It's
+responsibility of board configuration to enable external transistor
+for pull-up D+-line by board/*.h.  For all boards, USB driver doesn't
+use usb_lld_sys_init or usb_lld_sys_shutdown (those routines only can
+be used for USB self powered system, which Chopstx does not support
+yet).
+
+** Board configuration change
+For USB driver change, board-maple-mini.h, board-olimex-stm32-h103.h,
+board-stbee.h, and board-stm32-primer2.h were changed.  Pull-up is
+enabled at the time of gpio_init.
+
+** Cortex-M4 support
+Cortex-M4 support has been added.  Not supporting use of FPU or DSP,
+yet.  Note that it's not intend to be used by Gnuk.
+
+** STM32L432 support
+USART and USB drivers are added.
+
+** New board support: ST Nucleo-32 L432
+ST Nucleo-32 L432 is a small board with ST-Link/V2-1.
+
+** Minor implementation change: chopstx_claim_irq
+If the interrupt is disabled (possibly by chx_intr) when
+chopstx_claim_irq is called, INTR->ready is set to 1.  This allows
+calling chopstx_claim_irq after hardware initialization which may
+cause an interrupt before the call of chopstx_claim_irq.
+
+
+* Major changes in Chopstx 1.14
+
+  Released 2019-03-02
+
+** Enhancement of driver: USART for STM32
+Now, it supports smartcard communication.
+
+
+* Major changes in Chopstx 1.13
+
+  Released 2018-12-19
+
+** API fix (redefinition): chopstx_poll
+In old implementations, when chopstx_poll returns by non-timeout
+event, *USEC_P is not updated.  Now, it is updated.
+
+
+* Major changes in Chopstx 1.12
+
+  Released 2018-11-12
+
+** Enhance API of eventflag
+New function eventflag_set_mask is added, so that we can only handle
+specified events.  See Gnuk 1.2.12 for an example (while USB Tx is
+busy, the USB thread only accepts EV_TX_FINISHED event, leaving
+other events).
+
+** Acknowledge button support for FST-01 and FST-01G
+While FST-01 and FST-01G don't have any button in the original design,
+it may be PA2 when user put a hall sensor or a switch.
+
+
+* Major changes in Chopstx 1.11
+
+  Released 2018-10-02
+
+** Support calling chopstx_poll with intr->ready==1
+In version <= 1.10, it assumed that all events should be handled after
+chopstx_poll, before calling chopstx_poll again.  With having
+chopstx_intr_done, it's OK now that chopstx_poll can be called again
+not examining/handling all poll descriptors, but only parts of them.
+
+** Acknowledge button change
+In 1.10, the action was able to be "memorized" by the edge detector.
+Now, the edge detector is disabled by ackbtn_disable, and it is
+enabled by ackbtn_enable.  So, the status is cleared correctly.
+
+** New board support: FST-01SZ
+It's still under development.  Programming-wise, it will be kept same.
+
+
+* Major changes in Chopstx 1.10
+
+  Released 2018-09-29
+
+** Function chopstx_intr_wait is not deprecated, now
+Once, it was said that it's deprecated, but it's active again
+to match the new function of chopstx_intr_done.
+
+** API change: chopstx_poll, chopstx_intr_wait, chopstx_intr_done
+To avoid spurious interrupt, we introduce new function
+chopstx_intr_done, which should be called after interrupt handling.
+
+** New driver: Acknowledge button for FST-01SZ
+The use case is waiting user's acknowledge.  We use EXTI interrupt
+feature of STM32.
+
+
+* Major changes in Chopstx 1.9
+
+  Released 2018-05-09
+
+** GD32F103 support
+GD32F103 is an alternative implementation of STM32F103 by Giga Device,
+which can run at 96MHz.
+
+** Minor USB driver fix for STM32F103/GD32F103
+BTABLE setting should be done at initialization, not at USB RESET.
+
+** Minor SYS driver fix for GD32F103
+flash_protect should check FLASH_CR_OPTWRE.
+
+** Minor ADC driver change for GD32F103
+ADC on GD32F103 is another implementation and its behavior is somewhat
+different.  It requires waits after enabling.  So, we use continuous
+sampling, instead of start and stop for each sample.  Still, we
+observe enough noise (> 4.7 bit/byte) for each ADC sampling.
+
+
+* Major changes in Chopstx 1.8
+
+  Released 2018-01-19
+
+** Minor driver API fix
+In version 1.6, part of mcu/stm32f103.h was moved into mcu/cortex-m.h
+and mcu/stm32.h.  Now, mcu/stm32f103.h automatically includes
+mcu/cortex-m.h and mcu/stm32.h, so that it doesn't break existing
+applications.
+
+
+* Major changes in Chopstx 1.7
+
+  Released 2017-12-19
+
+** Fix: timer wakeup
+Timer expiration had a bug.  When it is waken up, the wake up doesn't
+handle as a timer expiration when there are multiple threads on same
+timing of expire.  It confuses as if it were forced wakeup.
+
+** New driver: USART for STM32
+USART driver for STM32 is added.
+
+
+* Major changes in Chopstx 1.6
+
+  Released 2017-11-24
+
+** Fix cancellation
+In Chopstx 1.4 and 1.5, cancellation doesn't work for real MCU.  This
+is due to the change of chx_sched interface, introduced for GNU/Linux
+emulation.  This bug is fixed.
+
+** New feature: sleep mode
+New function chopstx_conf_idle is added to support sleep.  Note that
+use of sleep by this feature requires careful preparation.  For
+example, enabling sleep, a board with no RESET pin cannot be debugged
+by JTAG/SWD.  Setting of DBGMCU_CR (0xE0042004) is required beforehand
+(hardware default is zero).
+
+** API change: chopstx_poll
+This is a kind of clarification.  The third argument is now an array
+of constant pointers.  We don't touch the array itself, just use it.
+This allows having the array in read-only memory and can contribute
+less use of RAM.
+
+** USB API changes
+INTR_REQ_USB is now defined by usb_lld.h.  Enumeration type of
+DEVICE_STATE now has USB_DEVICE_STATE_ prefix.
+
+** USB driver change
+USB suspend and wakeup events are supported for STM32F103.
+
+
+* Major changes in Chopstx 1.5
+
+  Released 2017-10-10
+
+** Stack size definition by stack-def.h
+Stack size of each thread was used to be defined in ldscript.
+While emulation on GNU/Linux doesn't use ldscript, it is better
+to put those definitions in independent header file.  Please see
+example-cdc/stack-def.h and example-cdc/sample.ld.
+
+** More support for emulation on GNU/Linux
+We have SYS driver for emulation on GNU/Linux.  It has flash ROM
+emulation.
+
+
+* Major changes in Chopstx 1.4
+
+  Released 2017-08-11
+
+** New port: Emulation on GNU/Linux 
+Now, user can run Chopstx application on GNU/Linux.  Its USB driver is
+by USBIP.  Its ADC driver is dummy with random(3).
+
+
+* Major changes in Chopstx 1.3
+
+  Released 2017-02-02
+
+** New board support: Blue Pill
+It is contributed by Paul Fertser.
+
+
 * Major changes in Chopstx 1.2

  Released 2016-10-13
@@ -270,11 +563,11 @@ Vectored Interrupt Controller (NVIC), in the ARM v7-M Architecture
 Reference Manual.  The subsection, B3.4.1, Theory of operation,
 explains how it works.

-
 ** gpio_init change
 Now, gpi_init support AFIO mapping and another GPIO (GPIO_OTHER)
 settings.

-Local Variables:
-mode: outline
-End:
+
+# Local Variables:
+# mode: outline
+# End:
--- a/34
+++ b/34
@@ -1,21 +1,35 @@
 Chopstx - Threads and only Threads
-							 Version 1.2
-							  2016-10-13
+							 Version 2.0
+							  2020-06-26
 							Niibe Yutaka
 					     Flying Stone Technology

 What's Chopstx?
 ===============

-Chopstx is an RT thread library for STM32F103 (ARM Cortex-M3),
-STM32F030 (ARM Cortex-M0), and MKL27Z (ARM Cortex-M0plus).
+Chopstx is an RT thread library for STM32F103 and GD32F103 (ARM
+Cortex-M3), STM32F030 (ARM Cortex-M0), MKL27Z (ARM Cortex-M0plus),
+STM32L432 (ARM Cortex-M4), GD32V103 (RISC-V Bumblebee) and emulation
+on GNU/Linux.

-While most RTOSes come with many features, drivers, and stacks,
-Chopstx just offers a simple RT thread library.
+While most RTOSes come with many features, drivers, and protocol
+stacks, Chopstx just offers a simple RT thread library.

 With Chopstx, interrupt handling is also done by a thread.  This
 enables coherent code for ease of maintenance.

+While threads are important, we don't need more threads than
+necessary.  Chopstx provides a feature of poll, so that we can
+handle multiple events by a single thread.
+
+
+Note that this library is _not_ related to the hand game:
+
+    https://en.wikipedia.org/wiki/Chopsticks_(hand_game)
+
+Thanks to Yao Wei and Enrico Zini for giving me an opportunity
+visiting the wiki page above, when my children were playing the game.
+

 License
 =======
@@ -29,13 +43,15 @@ Example code
 ============

 We have some examples in this distribution; Useful ones are LED
-blinker and USB CDC-ACM function.  For STM32F103, you can build it
-USB CDC-ACM demo by:
+blinker and USB CDC-ACM device.  For STM32F103, you can build it USB
+CDC-ACM demo by:

   $ cd example-cdc
   $ ln -sf ../board/board-olimex-stm32-h103.h board.h
   $ make

+If you want to try GD32F103, Add -DMHZ=96 to DEFS in Makefile.
+
 For a specific board named FSM-55, an example of LED matrix dynamic
 driver is provided.  See the directory: example-fsm-55.

@@ -46,7 +62,7 @@ Future Works
 ============

 Convenience function to determine the bottom of thread stack,
-configuration of thread size by comiler's output would be next things
+configuration of thread size by compiler's output would be next things
 to be done.

 Experimental SMP port for Cortex-A7 is under development.  For SMP,
--- a/2
+++ b/2
@@ -1 +1 @@
-release/1.2
+release/2.1
--- a/board/board-blue-pill-g.h
+++ b/board/board-blue-pill-g.h
@@ -0,0 +1,42 @@
+#define BOARD_NAME "Blue Pill GD32F103"
+/* http://wiki.stm32duino.com/index.php?title=Blue_Pill */
+/* echo -n "Blue Pill GD32F103" | shasum -a 256 | sed -e 's/^.*\(........\)  -$/\1/' */
+#define BOARD_ID    0xed415594
+
+#define MCU_STM32F1_GD32F1 1
+#define STM32_USBPRE                    STM32_USBPRE_DIV2
+#define STM32_ADCPRE                    STM32_ADCPRE_DIV8
+
+#define MCU_STM32F1 1
+#define STM32F10X_MD		/* Medium-density device */
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              12
+#define STM32_HSECLK                    8000000
+
+#define GPIO_LED_BASE   GPIOC_BASE
+#define GPIO_LED_CLEAR_TO_EMIT          13
+#define GPIO_USB_BASE   GPIOA_BASE
+#undef  GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ *
+ * Port C setup.
+ * PC13 - Push pull output 50MHz (LED 1:ON 0:OFF)
+ * ------------------------ Default
+ * PAx  - input with pull-up
+ * PCx  - input with pull-up
+ */
+#define VAL_GPIO_USB_ODR            0xFFFFE7FF
+#define VAL_GPIO_USB_CRL            0x88888888      /*  PA7...PA0 */
+#define VAL_GPIO_USB_CRH            0x88811888      /* PA15...PA8 */
+
+#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_CRL            0x88888888      /*  PC7...PC0 */
+#define VAL_GPIO_LED_CRH            0x88388888      /* PC15...PC8 */
+
+#define RCC_ENR_IOP_EN      (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPCEN)
+#define RCC_RSTR_IOP_RST    (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPCRST)
--- a/board/board-blue-pill.h
+++ b/board/board-blue-pill.h
@@ -0,0 +1,38 @@
+#define BOARD_NAME "Blue Pill"
+/* http://wiki.stm32duino.com/index.php?title=Blue_Pill */
+/* echo -n "Blue Pill" | shasum -a 256 | sed -e 's/^.*\(........\)  -$/\1/' */
+#define BOARD_ID    0xa1099d43
+
+#define MCU_STM32F1 1
+#define STM32F10X_MD		/* Medium-density device */
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              9
+#define STM32_HSECLK                    8000000
+
+#define GPIO_LED_BASE   GPIOC_BASE
+#define GPIO_LED_CLEAR_TO_EMIT          13
+#define GPIO_USB_BASE   GPIOA_BASE
+#undef  GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ *
+ * Port C setup.
+ * PC13 - Push pull output 50MHz (LED 1:ON 0:OFF)
+ * ------------------------ Default
+ * PAx  - input with pull-up
+ * PCx  - input with pull-up
+ */
+#define VAL_GPIO_USB_ODR            0xFFFFE7FF
+#define VAL_GPIO_USB_CRL            0x88888888      /*  PA7...PA0 */
+#define VAL_GPIO_USB_CRH            0x88811888      /* PA15...PA8 */
+
+#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_CRL            0x88888888      /*  PC7...PC0 */
+#define VAL_GPIO_LED_CRH            0x88388888      /* PC15...PC8 */
+
+#define RCC_ENR_IOP_EN      (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPCEN)
+#define RCC_RSTR_IOP_RST    (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPCRST)
--- a/board/board-cq-starm.h
+++ b/board/board-cq-starm.h
@@ -1,6 +1,7 @@
 #define BOARD_NAME "CQ STARM"
 #define BOARD_ID    0xc5480875

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
--- a/board/board-fsm-55.h
+++ b/board/board-fsm-55.h
@@ -19,10 +19,13 @@

 /*
 * Port A setup.
- * PA5  - ON (LED 1:ON 0:OFF)
 * PA4  - Pull DOWN
+ * PA5  - ON (LED 1:ON 0:OFF)
+ *
+ * PA13 - SWDIO
+ * PA14 - SWCLK
 */
-#define VAL_GPIO_LED_MODER   0x00145555 /* Output Pin0-7, Pin9 and Pin10 */
+#define VAL_GPIO_LED_MODER   0x28145555 /* Output Pin0-7, Pin9 and Pin10 */
 #define VAL_GPIO_LED_OTYPER  0x0000001f /* Open-drain for Pin0-4, Push-Pull*/
 #define VAL_GPIO_LED_OSPEEDR 0x003cffff /* High speed */
 #define VAL_GPIO_LED_PUPDR   0x00000000 /* No pull-up/pull-down */
--- a/board/board-fst-01-00.h
+++ b/board/board-fst-01-00.h
@@ -1,6 +1,7 @@
 #define BOARD_NAME "FST-01-00"
 #define BOARD_ID    0x613870a9

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -18,7 +19,7 @@
 * PA0  - input with pull-up.  AN0
 * PA1  - input with pull-up.  AN1
 * PA8  - Push pull output 50MHz (LED 1:ON 0:OFF)
- * PA10 - Push pull output 50MHz (USB 1:ON 0:OFF)
+ * PA10 - Push pull output 50MHz (USB 1:ON 0:OFF) default 1
 * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM) 
 * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
 * ------------------------ Default
--- a/board/board-fst-01.h
+++ b/board/board-fst-01.h
@@ -2,6 +2,7 @@
 #define BOARD_ID    0x696886af
 /* echo -n "FST-01" | sha256sum | sed -e 's/^.*\(........\)  -$/\1/' */

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -24,7 +25,7 @@
 * PA5  - Alternate Push pull output (SPI1_SCK)
 * PA6  - Alternate Push pull output (SPI1_MISO)
 * PA7  - Alternate Push pull output (SPI1_MOSI)
- * PA10 - Push pull output   (USB 1:ON 0:OFF)
+ * PA10 - Push pull output   (USB 1:ON 0:OFF) default 1
 * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
 * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
 * ------------------------ Default
@@ -70,6 +71,7 @@
 * Those will be removed soon, once such an driver will be improved
 * in new style.
 */
+#if defined(PINPAD_CIR_SUPPORT)
 /* For pin-cir settings of Gnuk */
 #define TIMx                  TIM2
 #define INTR_REQ_TIM          TIM2_IRQ
@@ -82,3 +84,4 @@
 #define ENABLE_RCC_APB1
 #define RCC_APBnENR_TIMxEN    RCC_APB1ENR_TIM2EN
 #define RCC_APBnRSTR_TIMxRST  RCC_APB1RSTR_TIM2RST
+#endif
--- a/board/board-fst-01g.h
+++ b/board/board-fst-01g.h
@@ -2,6 +2,7 @@
 #define BOARD_ID    0x8801277f
 /* echo -n "FST-01G" | sha256sum | sed -e 's/^.*\(........\)  -$/\1/' */

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -70,7 +71,7 @@
 * Those will be removed soon, once such an driver will be improved
 * in new style.
 */
-/* For pin-cir settings of Gnuk */
+#if defined(PINPAD_CIR_SUPPORT)
 #define TIMx                  TIM2
 #define INTR_REQ_TIM          TIM2_IRQ
 #define AFIO_EXTICR_INDEX     0
@@ -82,3 +83,4 @@
 #define ENABLE_RCC_APB1
 #define RCC_APBnENR_TIMxEN    RCC_APB1ENR_TIM2EN
 #define RCC_APBnRSTR_TIMxRST  RCC_APB1RSTR_TIM2RST
+#endif
--- a/board/board-fst-01sz.h
+++ b/board/board-fst-01sz.h
@@ -0,0 +1,43 @@
+#define BOARD_NAME "FST-01SZ"
+#define BOARD_ID    0x7e6fb084
+/* echo -n "FST-01SZ" | sha256sum | sed -e 's/^.*\(........\)  -$/\1/' */
+
+#define MCU_STM32F1_GD32F1 1
+#define STM32_USBPRE                    STM32_USBPRE_DIV2
+#define STM32_ADCPRE                    STM32_ADCPRE_DIV8
+
+#define MCU_STM32F1 1
+#define STM32F10X_MD		/* Medium-density device */
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              8
+#define STM32_HSECLK                    12000000
+
+#define GPIO_LED_BASE   GPIOA_BASE
+#define GPIO_LED_SET_TO_EMIT            8
+#define GPIO_USB_BASE   GPIOA_BASE
+#undef  GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA0  - input with pull-up: AN0 for NeuG
+ * PA1  - input with pull-up: AN1 for NeuG
+ * PA3  - input with pull-up: Hall effect sensor output
+ * PA8  - Push pull output 10MHz 0 default (LED 1:ON 0:OFF)
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ * ------------------------ Default
+ * PAx  - input with pull-up.
+ */
+#define VAL_GPIO_LED_ODR            0xFFFFE6FF
+#define VAL_GPIO_LED_CRL            0x88888888      /*  PA7...PA0 */
+#define VAL_GPIO_LED_CRH            0x88811881      /* PA15...PA8 */
+
+#define RCC_ENR_IOP_EN      RCC_APB2ENR_IOPAEN
+#define RCC_RSTR_IOP_RST    RCC_APB2RSTR_IOPARST
+
+/*
+ * Board specific information other than clock and GPIO initial
+ * setting should not be in board-*.h, but each driver should include
+ * such specific information by itself.
+ */
--- a/board/board-gnu-linux.h
+++ b/board/board-gnu-linux.h
@@ -0,0 +1,4 @@
+#define BOARD_NAME "GNU/Linux"
+/* Emulation on GNU/Linux */
+/* echo -n "GNU/Linux" | shasum -a 256 | sed -e 's/^.*\(........\)  -$/\1/' */
+#define BOARD_ID    0x7ec86145
--- a/board/board-gnukey-ds.h
+++ b/board/board-gnukey-ds.h
@@ -0,0 +1,39 @@
+#define BOARD_NAME "Gnukey DS"
+#define BOARD_ID    0x67ee65a3
+/* echo -n "Gnukey DS" | sha256sum | sed -e 's/^.*\(........\)  -$/\1/' */
+
+#define MCU_STM32F1 1
+#define STM32F10X_MD		/* Medium-density device */
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              9 // 8MHz * 9 = 72 MHz
+#define STM32_HSECLK                    8000000
+
+#define GPIO_LED_BASE   GPIOA_BASE
+#define GPIO_LED_SET_TO_EMIT            3
+#define GPIO_USB_BASE   GPIOA_BASE
+#undef  GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA0  - input with pull-up: AN0 for NeuG
+ * PA1  - input with pull-up: AN1 for NeuG
+ * PA2  - input with pull-up: Hall effect sensor output
+ * PA3  - Push pull output 10MHz 0 default (LED 1:ON 0:OFF)
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ * ------------------------ Default
+ * PAx  - input with pull-up.
+ */
+#define VAL_GPIO_LED_ODR            0xFFFFE7F7      /* 0/1 Pull Down/Up */
+#define VAL_GPIO_LED_CRL            0x88881888      /*  PA7...PA0 */
+#define VAL_GPIO_LED_CRH            0x88811888      /* PA15...PA8 */
+
+#define RCC_ENR_IOP_EN      RCC_APB2ENR_IOPAEN
+#define RCC_RSTR_IOP_RST    RCC_APB2RSTR_IOPARST
+
+/*
+ * Board specific information other than clock and GPIO initial
+ * setting should not be in board-*.h, but each driver should include
+ * such specific information by itself.
+ */
--- a/board/board-longan-nano.h
+++ b/board/board-longan-nano.h
@@ -0,0 +1,75 @@
+#define BOARD_NAME "Longan-nano"
+#define BOARD_ID    0xe65dace7
+/* echo -n "Longan-nano" | sha256sum | sed -e 's/^.*\(........\)  -$/\1/' */
+
+#define MCU_CORE_BUMBLEBEE 1
+#define MCU_GD32VF1        1
+/*
+ * XTAL clock =  8 MHz
+ * Core clock = 96 MHz
+ * AHB  clock = 96 MHz
+ * APB1 clock = 48 MHz
+ * APB2 clock = 96 MHz
+ * USB clock  = 48 MHz
+ * ADC clock  = ???
+ */
+
+/* HXTAL 8MHz input => PLL output = 8 * 12 = 96 MHz */
+#define RCU_CFG0_PLL_MUL_VALUE RCU_CFG0_PLL_MUL12
+
+#define GPIO_LED   GPIOC
+#define GPIO_LED_CLEAR_TO_EMIT     13 /* LED Red */
+#define GPIO_USB   GPIOA
+#define GPIO_OTHER GPIOB
+
+/*
+ * Port A setup.
+ *
+ * PA1  - Push-pull output 2MHz 1 default (LED green 0: ON 1: OFF)
+ * PA2  - Push-pull output 2MHz 1 default (LED blue  0: ON 1: OFF)
+ * PA3  - 
+ * PA4  - <Can be used for GPIO>
+ * PA5  - AF output push-pull 50MHz: SPI0_SCK
+ * PA6  - Input pull-up: SPI0_MISO (master)
+ * PA7  - AF output push-pull 50MHz: SPI0_MOSI (master)
+ * PA8  - (USBFS_SOF)
+ * PA9  - AF output push-pull 2MHz: USART0_TX (USBFS_VBUS)
+ * PA10 - Input pull-up: USART0_RX0 (USBFS_ID)
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled???) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled???) (USBDP)
+ * ------------------------ Default
+ * PAx  - input with pull-up.
+ *
+ * NOTE: It's USB device bus power configuration, where we don't
+ * monitor VBUS voltage change.  For self powered system, we need to
+ * monitor VBUS pin for detecting USB connection.  Supporting self
+ * powered system, you need to change the USB driver, and when doing
+ * so, PA9 should be used for USBFS_VBUS.
+ */
+#define VAL_GPIO_USB_ODR   0xFFFFE6FF
+#define VAL_GPIO_USB_CRL   0xB8B88228      /*  PA7...PA0 */
+#define VAL_GPIO_USB_CRH   0x888118A8      /* PA15...PA8 */
+
+#define RCU_APB2_GPIO      (RCU_APB2_GPIOA|RCU_APB2_GPIOB|RCU_APB2_GPIOC)
+
+/*
+ * PB0 - Push-pull output 50MHz 1 default (OLED D/C#)
+ * PB1 - Push-pull output 10MHz 1 default (OLED RST#)
+ * PB2 - Push-pull output 50MHz 1 default (OLED CS#)
+ */
+#define VAL_GPIO_OTHER_ODR 0xFFFFFFFF
+#define VAL_GPIO_OTHER_CRL 0x88888313      /*  PB7...PB0 */
+#define VAL_GPIO_OTHER_CRH 0x88888888      /* PB15...PB8 */
+
+/*
+ * PC13 - Push-pull output 2MHz 1 default (LED red  0: ON 1: OFF)
+ */
+#define VAL_GPIO_LED_ODR 0xFFFFFFFF
+#define VAL_GPIO_LED_CRL 0x88888888      /*  PC7...PC0 */
+#define VAL_GPIO_LED_CRH 0x88288888      /* PC15...PC8 */
+
+/*
+ * Board specific information other than clock and GPIO initial
+ * setting should not be in board-*.h, but each driver should include
+ * such specific information by itself.
+ */
--- a/board/board-maple-mini.h
+++ b/board/board-maple-mini.h
@@ -1,6 +1,7 @@
 #define BOARD_NAME "Maple Mini"
 #define BOARD_ID    0x7a445272

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -29,11 +30,11 @@
 /*
 * Port B setup.
 * PB1  - Push pull output 50MHz (LED 1:ON 0:OFF)
- * PB9  - Push pull output 50MHz (USB 1:ON 0:OFF)
+ * PB9  - Push pull output 50MHz (USB 0:ON 1:OFF) default 0
 * ------------------------ Default
 * PBx  - input with pull-up
 */
-#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_ODR            0xFFFFFDFF
 #define VAL_GPIO_LED_CRL            0x88888838      /*  PB7...PB0 */
 #define VAL_GPIO_LED_CRH            0x88888838      /* PB15...PB8 */

--- a/board/board-nitrokey-start.h
+++ b/board/board-nitrokey-start.h
@@ -1,6 +1,7 @@
 #define BOARD_NAME "NITROKEY-START"
 #define BOARD_ID    0xad1e7ebd

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -22,13 +23,13 @@
 * PA4 - floating input
 * PA5 - floating input
 * PA6 - floating input
- * PA7 - Push pull output   (LED1 1:ON 0:OFF)
+ * PA7 - Push pull output   (Red LED1 1:ON 0:OFF)
 * PA8 - floating input (smartcard, SCDSA)
 * PA9 - floating input
 * PA10 - floating input
 * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
 * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
- * PA15 - Push pull output  (USB_EN 1:ON 0:OFF)
+ * PA15 - Push pull output  (USB_EN 1:ON 0:OFF) default 1
 * ------------------------ Default
 * PA8  - input with pull-up.
 * PA9  - floating input.
@@ -37,13 +38,13 @@
 * PA14 - input with pull-up.
 * PA15 - Push pull output   (USB 1:ON 0:OFF)
 */
-#define VAL_GPIO_USB_ODR            0xFFFFE7FF
+#define VAL_GPIO_USB_ODR            0xFFFFE77F
 #define VAL_GPIO_USB_CRL            0x34444488      /*  PA7...PA0 */
 #define VAL_GPIO_USB_CRH            0x38811444      /* PA15...PA8 */

 /*
 * Port B setup.
- * PB0  - Push pull output   (LED2 1:ON 0:OFF)
+ * PB0  - Push pull output   (Green LED2 1:ON 0:OFF)
 * ------------------------ Default
 * PBx  - input with pull-up.
 */
--- a/board/board-olimex-stm32-h103.h
+++ b/board/board-olimex-stm32-h103.h
@@ -1,6 +1,7 @@
 #define BOARD_NAME "Olimex STM32-H103"
 #define BOARD_ID    0xf92bb594

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -19,22 +20,14 @@
 * PC1  - input with pull-up.  AN11 for NeuG
 * PC6  - input without pull-up/down
 * PC7  - input without pull-up/down
- * PC11 - Open-drain output 50MHz (USB disconnect).
+ * PC11 - Open-drain output 50MHz (USB 0:ON 1:OFF)  default 0
 * PC12 - Push Pull output 50MHz (LED).
 * ------------------------ Default
 * PCx  - input with pull-up
 */
-#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_ODR            0xFFFFF7FF
 #define VAL_GPIO_LED_CRL            0x44888888      /*  PC7...PC0 */
 #define VAL_GPIO_LED_CRH            0x88837888      /* PC15...PC8 */

 #define RCC_ENR_IOP_EN      RCC_APB2ENR_IOPCEN
 #define RCC_RSTR_IOP_RST    RCC_APB2RSTR_IOPCRST
-
-/* NeuG settings for ADC2.  */
-#define NEUG_ADC_SETTING2_SMPR1 ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) \
-                              | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_1P5)
-#define NEUG_ADC_SETTING2_SMPR2 0
-#define NEUG_ADC_SETTING2_SQR3  ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10)   \
-                              | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11)
-#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
--- a/board/board-st-dongle.h
+++ b/board/board-st-dongle.h
@@ -2,6 +2,7 @@
 /* echo -n "ST Dongle" | shasum -a 256 | sed -e 's/^.*\(........\)  -$/\1/' */
 #define BOARD_ID    0x2cd4e471

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -21,7 +22,7 @@
 * PA9  - Push pull output 50MHz (LED 1:ON 0:OFF)
 * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM) 
 * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
- * PA15 - Push pull output 50MHz (USB 1:ON 0:OFF)
+ * PA15 - Push pull output 50MHz (USB 1:ON 0:OFF) default 1
 * ------------------------ Default
 * PAx  - input with pull-up
 */
--- a/board/board-st-nucleo-f103.h
+++ b/board/board-st-nucleo-f103.h
@@ -11,11 +11,14 @@
 *
 * At CN10, connect USB cable
 *  Vbus RED   --> 10 NC   ----------> CN7 (6 E5V)
- *  D+   GREEN --> 12 PA11 ---[1K5]--> CN6 (4 3V3)
- *  D-   WHITE --> 14 PA12
+ *  D+   GREEN --> 12 PA12 ---[1K5]--> CN6 (4 3V3)
+ *  D-   WHITE --> 14 PA11
+ *                 16 PB12 (USART3-CK) ---> smartcard CK
+ *                 18
 *  GND  BLACK --> 20 GND
 */

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -25,21 +28,49 @@
 #define GPIO_LED_BASE   GPIOA_BASE
 #define GPIO_LED_SET_TO_EMIT            5
 #undef  GPIO_USB_BASE		/* No external DISCONNECT/RENUM circuit.  */
-#undef  GPIO_OTHER_BASE
+#define GPIO_OTHER_BASE GPIOB_BASE

 /*
 * Port A setup.
- * PA0  - input with pull-up.  AN0
- * PA1  - input with pull-up.  AN1
- * PA5  - Push pull output 50MHz (LED 1:ON 0:OFF)
+ * PA0  - Input with pull-up                       USART2-CTS
+ * PA1  - Alternate function push pull output 2MHz USART2-RTS
+ * PA2  - Alternate function push pull output 2MHz USART2-TX
+ * PA3  - Input with pull-up                       USART2-RX
+ * PA4  - Alternate function push pull output 2MHz USART2-CK
+ * PA5  - Push pull output 2MHz (LED 1:ON 0:OFF)
 * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM) 
 * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
 * ------------------------ Default
 * PAx  - input with pull-up
 */
 #define VAL_GPIO_LED_ODR            0xFFFFE7FF
-#define VAL_GPIO_LED_CRL            0x88388888      /*  PA7...PA0 */
+#define VAL_GPIO_LED_CRL            0x882A8AA8      /*  PA7...PA0 */
 #define VAL_GPIO_LED_CRH            0x88811888      /* PA15...PA8 */

-#define RCC_ENR_IOP_EN      RCC_APB2ENR_IOPAEN
-#define RCC_RSTR_IOP_RST    RCC_APB2RSTR_IOPARST
+/*
+ * Port B setup.
+ * PB0  - input with pull-up: AN8 for NeuG
+ * PB1  - input with pull-up: AN9 for NeuG
+ * ---
+ * ---
+ * PB4  - Input with pull-up: Card insertion detect: 0 when detected
+ * ---
+ * PB6  - Output push pull 2MHz: Vcc for card: default 0
+ * ---
+ * PB8  - Output push pull 2MHz: Vpp for card: default 0
+ * PB9  - Output push pull 2MHz: RST for card: default 0
+ * PB10 - Alternate function open-drain output 50MHz USART3-TX
+ * PB11 - Input with pull-up                         USART3-RX
+ * PB12 - Alternate function push pull output  50MHz USART3-CK
+ * PB13 - Input with pull-up                         USART3-CTS
+ * PB14 - Alternate function push pull output  50MHz USART3-RTS
+ * ---
+ * ------------------------ Default
+ * PBx  - input with pull-up.
+ */
+#define VAL_GPIO_OTHER_ODR          0xFFFFFCBF
+#define VAL_GPIO_OTHER_CRL          0x82888888      /*  PB7...PB0 */
+#define VAL_GPIO_OTHER_CRH          0x8B8B8F22      /* PB15...PB8 */
+
+#define RCC_ENR_IOP_EN      (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_AFIOEN)
+#define RCC_RSTR_IOP_RST    (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | RCC_APB2RSTR_AFIORST)
--- a/board/board-st-nucleo-l432.h
+++ b/board/board-st-nucleo-l432.h
@@ -0,0 +1,75 @@
+#define BOARD_NAME "ST Nucleo L432"
+#define BOARD_ID    0x3a8d5116
+
+/*
+ * When using USB, please add USB cable to ST Nucleo L432.
+ *
+ * At CN4, connect USB cable, only when ST Link is not connected
+ *  Vbus RED   -->  4
+ *
+ * At CN3, connect USB cable
+ *  D-   WHITE --> 13 PA11
+ *  D+   GREEN -->  5 PA12
+ *  GND  BLACK -->  4 GND
+ *
+ * Smartcard VCC:    PA3
+ * Smartcard GND:    GND --+
+ * Smartcard RST:    PA1   |
+ * Smartcard VPP:    PA4   |
+ * Smartcard CLK:    PA8   |
+ * Smartcard I/O:    PA9   |
+ *                   GND --+
+ * Smartcard DETECT: PA0
+ */
+
+#define MCU_STM32L4 1
+
+#define GPIO_LED_BASE   GPIOB_BASE
+#define GPIO_LED_SET_TO_EMIT            3
+#undef  GPIO_USB_BASE		/* No external DISCONNECT/RENUM circuit.  */
+#define GPIO_OTHER_BASE GPIOA_BASE
+
+/*
+ * Port A setup.
+ *
+ * MODER: 10 10 - 10 10 - 10 11 - 10 10    11 11 - 11 01 - 01 10 - 01 00
+ *
+ * PA0  - Input with pull-up: Card insertion detect: 0 when detected
+ * PA1  - Output push-pull default 0: Card RST
+ * PA2  - USART2-TX (AF7): output push-pull
+ * PA3  - Output push-pull default 0: Card Vcc
+ * PA4  - Output push-pull default 0: Card Vpp
+ * PA8  - USART1-CK (AF7): output push-pull: Card CLK
+ * PA9  - USART1-TX (AF7): output(input) Open-drain pull-up: Card I/O
+ * PA11 - USBDM (AF10): input/output
+ * PA12 - USBDP (AF10): input/output
+ * PA13 - SWDIO (AF0)
+ * PA14 - SWDCLK (AF0)
+ * PA15 - USART2-RX (AF3): input with pull-up
+ * ------------------------ Default
+ * PAx  - analog input
+ */
+#define VAL_GPIO_OTHER_MODER   0xAABAFD64
+#define VAL_GPIO_OTHER_OTYPER  0x00000200
+#define VAL_GPIO_OTHER_OSPEEDR 0xFFFFFFFF
+#define VAL_GPIO_OTHER_PUPDR   0x40040001
+#define VAL_GPIO_OTHER_AFRL    0x00000700
+#define VAL_GPIO_OTHER_AFRH    0x300AA077
+
+/*
+ * Port B setup.
+ *
+ * MODER: 11 11 - 11 11 - 11 11 - 11 11    11 11 - 11 11 - 01 11 - 11 11
+ *
+ * PB3  - ON (LED 1:ON 0:OFF)
+ * ------------------------ Default
+ * PBx  - analog input
+ */
+#define VAL_GPIO_LED_MODER   0xFFFFFF7F
+#define VAL_GPIO_LED_OTYPER  0x00000000
+#define VAL_GPIO_LED_OSPEEDR 0x00000000
+#define VAL_GPIO_LED_PUPDR   0x00000000
+#define VAL_GPIO_LED_AFRL    0x00000000
+#define VAL_GPIO_LED_AFRH    0x00000000
+
+#define RCC_AHB2_GPIO   (RCC_AHB2_GPIOA | RCC_AHB2_GPIOB)
--- a/board/board-stbee-mini.h
+++ b/board/board-stbee-mini.h
@@ -1,6 +1,7 @@
 #define BOARD_NAME "STBee Mini"
 #define BOARD_ID    0x1f341961

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -51,7 +52,7 @@
 * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
 * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
 * PA13 - Open Drain output (LED1 0:ON 1:OFF)
- * PA14 - Push pull output  (USB ENABLE 0:DISABLE 1:ENABLE)
+ * PA14 - Push pull output  (USB  1:ON 0:OFF) default 1
 * PA15 - Open Drain output (LED2 0:ON 1:OFF)
 */
 #define VAL_GPIO_LED_ODR            0xFFFFE77F
--- a/board/board-stbee.h
+++ b/board/board-stbee.h
@@ -1,6 +1,9 @@
 #define BOARD_NAME "STBee"
 #define BOARD_ID    0x945c37e8

+#define MCU_STM32F1 1
+#define STM32F10X_HD		/* High-density device */
+
 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
 #define STM32_PLLMUL_VALUE              6
 #define STM32_HSECLK                    12000000
@@ -26,9 +29,9 @@

 /*
 * Port D setup.
- * PD3  - Push pull output  (USB_DISC 1:USB-DISABLE 0:USB-ENABLE) 2MHz
+ * PD3  - Push pull output  (USB 1:OFF 0:ON) 2MHz default 0
 * PD4  - Open Drain output 2MHz (LED1).
 */
-#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_ODR            0xFFFFFFF7
 #define VAL_GPIO_LED_CRL            0x88862888      /*  PD7...PD0 */
 #define VAL_GPIO_LED_CRH            0x88888888      /* PD15...PD8 */
--- a/board/board-stm32-primer2.h
+++ b/board/board-stm32-primer2.h
@@ -1,6 +1,9 @@
 #define BOARD_NAME "STM32 Primer2"
 #define BOARD_ID    0x21e5798d

+#define MCU_STM32F1 1
+#define STM32F10X_HD		/* High-density device */
+
 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
 #define STM32_PLLMUL_VALUE              6
 #define STM32_HSECLK                    12000000
@@ -27,11 +30,11 @@

 /*
 * Port D setup.
- * PD3  - Push pull output 50MHz (USB 1:ON 0:OFF)
+ * PD3  - Push pull output 50MHz (USB 0:ON 1:OFF) default 0
 * ------------------------ Default
 * PDx  - input with pull-up
 */
-#define VAL_GPIO_USB_ODR            0xFFFFFFFF
+#define VAL_GPIO_USB_ODR            0xFFFFFFF7
 #define VAL_GPIO_USB_CRL            0x88883888      /*  PD7...PD0 */
 #define VAL_GPIO_USB_CRH            0x88888888      /* PD15...PD8 */

--- a/board/board-stm32f0-discovery.h
+++ b/board/board-stm32f0-discovery.h
@@ -1,8 +1,6 @@
 #define BOARD_NAME "STM32F0 Discovery"
 #define BOARD_ID    0xde4b4bc1

-#define MCU_STM32F0 1
-
 /*
 * Running at 48MHz with HSI as clock source.
 * 
--- a/board/board-stm8s-discovery.h
+++ b/board/board-stm8s-discovery.h
@@ -1,6 +1,7 @@
 #define BOARD_NAME "STM8S Discovery"
 #define BOARD_ID    0x2f0976bb

+#define MCU_STM32F1 1
 #define STM32F10X_MD		/* Medium-density device */

 #define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
@@ -43,7 +44,7 @@
 #define VAL_GPIO_OTHER_CRH 0x88888888      /* PB15...PB8 */


-/* For pin-cir settings of Gnuk */
+#if defined(PINPAD_CIR_SUPPORT)
 #define TIMx                  TIM3
 #define INTR_REQ_TIM          TIM3_IRQ
 #define AFIO_EXTICR_INDEX     1
@@ -57,3 +58,4 @@
 #define RCC_APBnRSTR_TIMxRST  RCC_APB1RSTR_TIM3RST
 #define AFIO_MAPR_SOMETHING   AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
                              /* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
+#endif
--- a/chopstx-cortex-m.c
+++ b/chopstx-cortex-m.c
@@ -0,0 +1,608 @@
+/*
+ * chopstx-cortex-m.c - Threads and only threads: Arch specific code
+ *                      for Cortex-M0/M3/M4
+ *
+ * Copyright (C) 2013, 2014, 2015, 2016, 2017, 2018, 2019, 2021
+ *               Flying Stone Technology
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+static struct chx_thread *running;
+
+static struct chx_thread *
+chx_running (void)
+{
+  return running;
+}
+
+static void
+chx_set_running (struct chx_thread *r)
+{
+  running = r;
+}
+
+
+/* Data Memory Barrier.  */
+static void
+chx_dmb (void)
+{
+  asm volatile ("dmb"  : : : "memory");
+}
+
+/* Saved registers on the stack.  */
+struct chx_stack_regs {
+  uint32_t reg[8];	       /* r0, r1, r2, r3, r12, lr, pc, xpsr */
+};
+
+/*
+ * Constants for ARM.
+ */
+#define REG_SP 8
+
+#define REG_R0   0
+#define REG_LR   5
+#define REG_PC   6
+#define REG_XPSR 7
+
+#define INITIAL_XPSR 0x01000000	/* T=1 */
+
+/*
+ * Exception priority: lower has higher precedence.
+ *
+ * Cortex-M3
+ * =====================================
+ * Prio 0x30: svc
+ * ---------------------
+ * Prio 0x40: thread temporarily inhibiting schedule for critical region
+ * ...
+ * Prio 0xb0: systick, external interrupt
+ * =====================================
+ *
+ * Cortex-M0
+ * =====================================
+ * Prio 0x00: thread temporarily inhibiting schedule for critical region
+ * ...
+ * Prio 0x40: systick, external interrupt
+ * Prio 0x80: svc (not used)
+ * =====================================
+ */
+
+#define CPU_EXCEPTION_PRIORITY_CLEAR         0
+
+#if defined(__ARM_ARCH_6M__)
+#define CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED 0x00
+/* ... */
+#define CPU_EXCEPTION_PRIORITY_SYSTICK       0x40
+#define CPU_EXCEPTION_PRIORITY_INTERRUPT     CPU_EXCEPTION_PRIORITY_SYSTICK
+#define CPU_EXCEPTION_PRIORITY_SVC           0x80 /* No use in this arch */
+#elif defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
+#define CPU_EXCEPTION_PRIORITY_SVC           0x30
+
+#define CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED 0x40
+/* ... */
+#define CPU_EXCEPTION_PRIORITY_SYSTICK       0xb0
+#define CPU_EXCEPTION_PRIORITY_INTERRUPT     CPU_EXCEPTION_PRIORITY_SYSTICK
+#else
+#error "no support for this arch"
+#endif
+
+/*
+ * Lower layer architecture specific functions.
+ *
+ * system tick and interrupt
+ */
+
+/*
+ * System tick
+ */
+/* SysTick registers.  */
+struct SYST {
+  volatile uint32_t CSR;
+  volatile uint32_t RVR;
+  volatile uint32_t CVR;
+  const uint32_t CALIB;
+};
+static struct SYST *const SYST = (struct SYST *)0xE000E010;
+
+static void
+chx_systick_init_arch (void)
+{
+  SYST->RVR = 0;
+  SYST->CVR = 0;
+  SYST->CSR = 7;
+}
+
+static void
+chx_systick_reload (uint32_t ticks)
+{
+  SYST->RVR = ticks;
+  SYST->CVR = 0;  /* write (any) to clear the counter to reload.  */
+  SYST->RVR = 0;
+}
+
+static uint32_t
+chx_systick_get (void)
+{
+  return SYST->CVR;
+}
+
+static uint32_t usec_to_ticks (uint32_t usec)
+{
+  return usec * MHZ;
+}
+
+static uint32_t
+ticks_to_usec (uint32_t ticks)
+{
+  return ticks / MHZ;
+}
+
+/*
+ * Interrupt Handling
+ */
+
+/* NVIC: Nested Vectored Interrupt Controller.  */
+struct NVIC {
+  volatile uint32_t ISER[8];
+  uint32_t unused1[24];
+  volatile uint32_t ICER[8];
+  uint32_t unused2[24];
+  volatile uint32_t ISPR[8];
+  uint32_t unused3[24];
+  volatile uint32_t ICPR[8];
+  uint32_t unused4[24];
+  volatile uint32_t IABR[8];
+  uint32_t unused5[56];
+  volatile uint32_t IPR[60];
+};
+
+static struct NVIC *const NVIC = (struct NVIC *)0xE000E100;
+#define NVIC_ISER(n)	(NVIC->ISER[n >> 5])
+#define NVIC_ICER(n)	(NVIC->ICER[n >> 5])
+#define NVIC_ICPR(n)	(NVIC->ICPR[n >> 5])
+#define NVIC_IPR(n)	(NVIC->IPR[n >> 2])
+
+
+static void
+chx_enable_intr (uint8_t irq_num)
+{
+  NVIC_ISER (irq_num) = 1 << (irq_num & 0x1f);
+}
+
+static void
+chx_clr_intr (uint8_t irq_num)
+{				/* Clear pending interrupt.  */
+  NVIC_ICPR (irq_num) = 1 << (irq_num & 0x1f);
+}
+
+static int
+chx_disable_intr (uint8_t irq_num)
+{
+  int already_disabled = !!(NVIC_ICER (irq_num) & (1 << (irq_num & 0x1f)));
+
+  NVIC_ICER (irq_num) = 1 << (irq_num & 0x1f);
+  return already_disabled;
+}
+
+static void
+chx_set_intr_prio (uint8_t n)
+{
+  unsigned int sh = (n & 3) << 3;
+
+  NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh))
+    | (CPU_EXCEPTION_PRIORITY_INTERRUPT << sh);
+}
+
+static volatile uint32_t *const ICSR = (uint32_t *)0xE000ED04;
+
+/* Priority control.  */
+static uint32_t *const AIRCR = (uint32_t *)0xE000ED0C;
+static uint32_t *const SHPR2 = (uint32_t *)0xE000ED1C;
+static uint32_t *const SHPR3 = (uint32_t *)0xE000ED20;
+
+static void
+chx_interrupt_controller_init (void)
+{
+  *AIRCR = 0x05FA0000 | ( 5 << 8); /* PRIGROUP = 5, 2-bit:2-bit. */
+  *SHPR2 = (CPU_EXCEPTION_PRIORITY_SVC << 24);
+  *SHPR3 = (CPU_EXCEPTION_PRIORITY_SYSTICK << 24);
+}
+
+
+static void
+chx_cpu_sched_lock (void)
+{
+#if defined(__ARM_ARCH_6M__)
+  asm volatile ("cpsid	i" : : : "memory");
+#else
+  register uint32_t tmp = CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED;
+  asm volatile ("msr	BASEPRI, %0" : : "r" (tmp) : "memory");
+#endif
+}
+
+static void
+chx_cpu_sched_unlock (void)
+{
+#if defined(__ARM_ARCH_6M__)
+  asm volatile ("cpsie	i" : : : "memory");
+#else
+  register uint32_t tmp = CPU_EXCEPTION_PRIORITY_CLEAR;
+  asm volatile ("msr	BASEPRI, %0" : : "r" (tmp) : "memory");
+#endif
+}
+
+
+static void __attribute__ ((naked, used))
+involuntary_context_switch (struct chx_thread *tp_next)
+{
+  register struct chx_thread *tp_current asm ("r1");
+
+  asm (
+	"ldr	r2, =running\n\t"
+	"ldr	r1, [r2]"
+	: "=r" (tp_current)
+	: /* no input */
+	: "r2");
+
+  if (!tp_current)
+    /* It's idle thread.  No need to save registers.  */
+    ;
+  else
+    {
+      /* Save registers onto CHX_THREAD struct.  */
+      asm volatile (
+	"add	%0, #20\n\t"
+	"stm	%0!, {r4, r5, r6, r7}\n\t"
+	"mov	r2, r8\n\t"
+	"mov	r3, r9\n\t"
+	"mov	r4, r10\n\t"
+	"mov	r5, r11\n\t"
+	"mrs	r6, PSP\n\t" /* r13(=SP) in user space.  */
+	"stm	%0!, {r2, r3, r4, r5, r6}"
+	: "=r" (tp_current)
+	: "0" (tp_current)
+	  /*
+	   * Memory clobber constraint here is not accurate, but this
+	   * works.  R7 keeps its value, but having "r7" here prevents
+	   * use of R7 before this asm statement.
+	   */
+	: "r2", "r3", "r4", "r5", "r6", "r7", "memory");
+
+      tp_next = chx_running_preempted (tp_next);
+    }
+
+  /* Registers on stack (PSP): r0, r1, r2, r3, r12, lr, pc, xpsr */
+
+  asm volatile (
+	/* Now, r0 points to the thread to be switched.  */
+	/* Put it to *running.  */
+	"ldr	r1, =running\n\t"
+	/* Update running: chx_set_running */
+	"str	r0, [r1]\n\t"
+	/**/
+	"add	r0, #20\n\t"
+	"ldm	r0!, {r4, r5, r6, r7}\n\t"
+#if defined(__ARM_ARCH_6M__)
+	"ldm	r0!, {r1, r2, r3}\n\t"
+	"mov	r8, r1\n\t"
+	"mov	r9, r2\n\t"
+	"mov	r10, r3\n\t"
+	"ldm	r0!, {r1, r2}\n\t"
+	"mov	r11, r1\n\t"
+	"msr	PSP, r2\n\t"
+#else
+	"ldr	r8, [r0], #4\n\t"
+	"ldr	r9, [r0], #4\n\t"
+	"ldr	r10, [r0], #4\n\t"
+	"ldr	r11, [r0], #4\n\t"
+	"ldr	r1, [r0], #4\n\t"
+	"msr	PSP, r1\n\t"
+#endif
+	"mov	r0, #0\n\t"
+	"sub	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
+	"bx	r0"
+	: /* no output */ : "r" (tp_next) : "memory");
+}
+
+static struct chx_thread *chx_timer_expired (void) __attribute__ ((noinline,used));
+static struct chx_thread *chx_recv_irq (uint32_t irq_num) __attribute__ ((noinline,used));
+
+void __attribute__ ((naked))
+chx_handle_intr (void)
+{
+  register struct chx_thread *tp_next asm ("r0");;
+
+  asm volatile ("mrs	%0, IPSR\n\t"
+		"sub	%0, #16\n\t"   /* Exception # - 16 = interrupt number.	*/
+		"bpl	0f\n\t"
+		"bl	chx_timer_expired\n\t"
+		"b	1f\n"
+	      "0:\n\t"
+		"bl	chx_recv_irq\n"
+	      "1:"
+		: "=r" (tp_next) : /* no input */ : "memory");
+
+  if (tp_next)
+    asm volatile (
+	"b	involuntary_context_switch"
+	: /*no input */ : /* no input */ : "memory");
+  else
+    asm volatile (
+	"mov	r0, #0\n\t"
+	"sub	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
+	"bx	r0"
+	: /*no input */ : /* no input */ : "memory");
+}
+
+static void
+chx_init_arch (struct chx_thread *tp)
+{
+  memset (&tp->tc, 0, sizeof (tp->tc));
+  chx_set_running (tp);
+}
+
+
+static uintptr_t
+voluntary_context_switch (struct chx_thread *tp_next)
+{
+  register uintptr_t result asm ("r0");
+
+#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
+  asm volatile (
+	"svc	#0\n\t"
+	"add	r1, r0, #16\n\t"
+	"ldr	r0, [r1]"	/* Get tp->v */
+	: "=r" (result) : "0" (tp_next): "r1", "memory");
+#else
+  register struct chx_thread *tp asm ("r1");
+
+  /* Build stack data as if it were an exception entry.
+   * And set the stack top to have RUNNNING.
+   */
+  /*
+   * r0:  RUNNING               scratch
+   * r1:  0                     scratch
+   * r2:  0                     scratch
+   * r3:  0                     scratch
+   * r12: 0                     scratch
+   * lr   as-is
+   * pc:  return address (= .L_CONTEXT_SWITCH_FINISH)
+   * psr: INITIAL_XPSR          scratch
+   */
+  asm ("mov	%0, lr\n\t"
+       "ldr	r2, =.L_CONTEXT_SWITCH_FINISH\n\t"
+       "mov	r3, #128\n\t"
+       "lsl	r3, #17\n\t"
+       "push	{%0, r2, r3}\n\t"
+       "mov	%0, #0\n\t"
+       "mov	r2, %0\n\t"
+       "mov	r3, %0\n\t"
+       "push	{%0, r2, r3}\n\t"
+       "ldr	r2, =running\n\t"
+       "ldr	%0, [r2]\n\t"
+       "push	{%0, r3}\n\t"
+       : "=r" (tp)
+       : /* no input */
+       : "r2", "r3", "memory");
+
+  /* Save registers onto CHX_THREAD struct.  */
+  asm ("add	r1, #20\n\t"
+       "stm	r1!, {r4, r5, r6, r7}\n\t"
+       "mov	r2, r8\n\t"
+       "mov	r3, r9\n\t"
+       "mov	r4, r10\n\t"
+       "mov	r5, r11\n\t"
+       "mov	r6, sp\n\t"
+       "stm	r1!, {r2, r3, r4, r5, r6}\n\t"
+       "sub	r1, #56"
+       : /* no output */
+       : "r" (tp)
+       : "r2", "r3", "r4", "r5", "r6", "r7", "memory");
+
+  asm volatile (/* Now, r0 points to the thread to be switched.  */
+		/* Put it to *running.  */
+		"ldr	r1, =running\n\t"
+		/* Update running.  */
+		"str	r0, [r1]\n\t"
+		"cmp	r0, #0\n\t"
+		"bne	0f\n\t"
+
+		/* Spawn an IDLE thread.  */
+		"ldr	r1, =__main_stack_end__\n\t"
+		"mov	sp, r1\n\t"
+		"ldr	r0, =chx_idle\n\t" /* PC = idle */
+		/**/
+		/* Unmask interrupts.  */
+		"cpsie	i\n\t"
+		"bx	r0\n"
+
+		/* Normal context switch */
+	"0:\n\t"
+		"add	r0, #20\n\t"
+		"ldm	r0!, {r4, r5, r6, r7}\n\t"
+		"ldm	r0!, {r1, r2, r3}\n\t"
+		"mov	r8, r1\n\t"
+		"mov	r9, r2\n\t"
+		"mov	r10, r3\n\t"
+		"ldm	r0!, {r1, r2}\n\t"
+		"mov	r11, r1\n\t"
+		"mov	sp, r2\n\t"
+		/**/
+		/* Unmask interrupts.  */
+		"cpsie	i\n\t"
+		/*
+		  0:  r0
+		  4:  r1
+		  8:  r2
+		  12: r3
+		  16: r12
+		  20: lr
+		  24: pc
+		  28: psr
+		  32: possibly exists for alignment
+		  [28 or 32] <-- pc
+		*/
+		"ldr	r0, [sp, #28]\n\t"
+		"lsl	r1, r0, #23\n\t"
+		"bcc	2f\n\t"
+		/**/
+		"ldr	r2, [sp, #24]\n\t"
+		"mov	r1, #1\n\t"
+		"orr	r2, r1\n\t"	/* Ensure Thumb-mode */
+		"str	r2, [sp, #32]\n\t"
+		"msr	APSR_nzcvq, r0\n\t"
+		/**/
+		"ldr	r0, [sp, #20]\n\t"
+		"mov	lr, r0\n\t"
+		"ldr	r0, [sp, #16]\n\t"
+		"mov	r12, r0\n\t"
+		"pop	{r0, r1, r2, r3}\n\t"
+		"add	sp, #16\n\t"
+		"pop	{pc}\n"
+	"2:\n\t"
+		"ldr	r2, [sp, #24]\n\t"
+		"mov	r1, #1\n\t"
+		"orr	r2, r1\n\t"	/* Ensure Thumb-mode */
+		"str	r2, [sp, #28]\n\t"
+		"msr	APSR_nzcvq, r0\n\t"
+		/**/
+		"ldr	r0, [sp, #20]\n\t"
+		"mov	lr, r0\n\t"
+		"ldr	r0, [sp, #16]\n\t"
+		"mov	r12, r0\n\t"
+		"pop	{r0, r1, r2, r3}\n\t"
+		"add	sp, #12\n\t"
+		"pop	{pc}\n\t"
+	".L_CONTEXT_SWITCH_FINISH:\n\t"
+		"add	r0, #16\n\t"
+		"ldr	r0, [r0]"       /* Get tp->v */
+		: "=r" (result)		/* Return value in R0 */
+		: "0" (tp_next)
+		: "memory");
+#endif
+  return result;
+}
+
+extern void cause_link_time_error_unexpected_size_of_struct_chx_thread (void);
+
+static struct chx_thread *
+chopstx_create_arch (uintptr_t stack_addr, size_t stack_size,
+		     voidfunc thread_entry, void *arg)
+{
+  struct chx_thread *tp;
+  void *stack;
+  struct chx_stack_regs *p;
+
+  if (CHOPSTX_THREAD_SIZE != sizeof(struct chx_thread))
+    cause_link_time_error_unexpected_size_of_struct_chx_thread ();
+
+  if (stack_size < sizeof (struct chx_thread) + 8 * sizeof (uint32_t))
+    chx_fatal (CHOPSTX_ERR_THREAD_CREATE);
+
+  stack = (void *)(stack_addr + stack_size - sizeof (struct chx_thread)
+		   - sizeof (struct chx_stack_regs));
+  memset (stack, 0, sizeof (struct chx_stack_regs));
+  tp = (struct chx_thread *)(stack + sizeof (struct chx_stack_regs));
+  p = (struct chx_stack_regs *)stack;
+  p->reg[REG_R0] = (uint32_t)arg;
+  p->reg[REG_LR] = (uint32_t)chopstx_exit;
+  p->reg[REG_PC] = (uint32_t)thread_entry;
+  p->reg[REG_XPSR] = INITIAL_XPSR;
+
+  memset (&tp->tc, 0, sizeof (tp->tc));
+  tp->tc.reg[REG_SP] = (uint32_t)stack;
+
+  return tp;
+}
+
+
+#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
+/*
+ * System call: switch to another thread.
+ */
+void __attribute__ ((naked))
+svc (void)
+{
+  register uint32_t tp_next asm ("r0");
+
+  asm ("ldr	r1, =running\n\t"
+       "ldr	r1, [r1]\n\t"
+       "add	r1, #20\n\t"
+       /* Save registers onto CHX_THREAD struct.  */
+       "stm	r1!, {r4, r5, r6, r7}\n\t"
+       "mov	r2, r8\n\t"
+       "mov	r3, r9\n\t"
+       "mov	r4, r10\n\t"
+       "mov	r5, r11\n\t"
+       "mrs	r6, PSP\n\t" /* r13(=SP) in user space.  */
+       "stm	r1!, {r2, r3, r4, r5, r6}\n\t"
+       "ldr	r0, [r6]\n\t"
+       "sub	r1, #56\n\t"
+       "str	r1, [r6]"
+       : "=r" (tp_next)
+       : /* no input */
+       : "r1", "r2", "r3", "r4", "r5", "r6", "memory");
+
+  asm volatile (
+	/* Now, r0 points to the thread to be switched.  */
+	/* Put it to *running.  */
+	"ldr	r1, =running\n\t"
+	/* Update running: chx_set_running */
+	"str	r0, [r1]\n\t"
+	"cbz	r0, 1f\n\t"
+	/**/
+	"add	r0, #20\n\t"
+	"ldm	r0!, {r4, r5, r6, r7}\n\t"
+	"ldr	r8, [r0], #4\n\t"
+	"ldr	r9, [r0], #4\n\t"
+	"ldr	r10, [r0], #4\n\t"
+	"ldr	r11, [r0], #4\n\t"
+	"ldr	r1, [r0], #4\n\t"
+	"msr	PSP, r1\n\t"
+	/* Unmask interrupts.  */
+	"mov	r0, #0\n\t"
+	"msr	BASEPRI, r0\n\t"
+	"sub	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
+	"bx	r0\n"
+    "1:\n\t"
+	/* Spawn an IDLE thread.  */
+	"ldr	r0, =__main_stack_end__-32\n\t"
+	"msr	PSP, r0\n\t"
+	"mov	r1, #0\n\t"
+	"mov	r2, #0\n\t"
+	"mov	r3, #0\n\t"
+	"stm	r0!, {r1, r2, r3}\n\t"
+	"stm	r0!, {r1, r2, r3}\n\t"
+	"ldr	r1, =chx_idle\n\t" /* PC = idle */
+	"mov	r2, #0x010\n\t"
+	"lsl	r2, r2, #20\n\t" /* xPSR = T-flag set (Thumb) */
+	"stm	r0!, {r1, r2}\n\t"
+	/* Unmask interrupts.  */
+	"mov	r0, #0\n\t"
+	"msr	BASEPRI, r0\n"
+	"sub	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
+	"bx	r0"
+	: /* no output */ : "r" (tp_next) : "memory");
+}
+#endif
--- a/chopstx-cortex-m.h
+++ b/chopstx-cortex-m.h
@@ -0,0 +1,14 @@
+/*
+ * The thread context: specific to ARM Cortex-M0/M3.
+ *
+ * In this structure, it's only partial information; Other part of the
+ * context is on the stack.
+ *
+ */
+struct tcontext {
+  uint32_t reg[9];	   /* r4, r5, r6, r7, r8, r9, r10, r11, r13(sp) */
+};
+
+typedef struct tcontext tcontext_t;
+
+#define CHOPSTX_THREAD_SIZE 64
--- a/chopstx-gnu-linux.c
+++ b/chopstx-gnu-linux.c
@@ -0,0 +1,344 @@
+/*
+ * chopstx-gnu-linux.c - Threads and only threads: Arch specific code
+ *                       for GNU/Linux emulation
+ *
+ * Copyright (C) 2017, 2018, 2019, 2021 Flying Stone Technology
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+/*
+ * NOTE: This code is not portable.  It's intended for GNU/Linux.
+ *
+ * This implementation depends on the feature of SA_SIGINFO of Linux,
+ * which signal handler takes three arguments.  Also, it depends on
+ * GNU C library for how to use the makecontext function on 64-bit
+ * machine.
+ *
+ */
+
+#include <unistd.h>
+#include <ucontext.h>
+#include <signal.h>
+#include <sys/time.h>
+
+static struct chx_thread *running;
+
+static struct chx_thread *
+chx_running (void)
+{
+  return running;
+}
+
+static void
+chx_set_running (struct chx_thread *r)
+{
+  running = r;
+}
+
+
+/* Data Memory Barrier.  */
+static void
+chx_dmb (void)
+{
+}
+
+
+static void preempted_context_switch (struct chx_thread *tp_next);
+
+static sigset_t ss_cur;
+
+static void
+chx_systick_init_arch (void)
+{
+  const struct itimerval it = { {0, 0}, {0, 0} };
+
+  setitimer (ITIMER_REAL, &it, 0);
+}
+
+static void
+chx_systick_reload (uint32_t ticks)
+{
+  struct itimerval it;
+
+  it.it_value.tv_sec = 0;
+  it.it_value.tv_usec = (ticks / MHZ);
+  it.it_interval.tv_sec = 0;
+  it.it_interval.tv_usec = 0;
+
+  setitimer (ITIMER_REAL, &it, 0);
+}
+
+static uint32_t
+chx_systick_get (void)
+{
+  struct itimerval it;
+  getitimer (ITIMER_REAL, &it);
+  return it.it_value.tv_usec * 72;
+}
+
+static uint32_t
+usec_to_ticks (uint32_t usec)
+{
+  return usec * MHZ;
+}
+
+static uint32_t
+ticks_to_usec (uint32_t ticks)
+{
+  return ticks / MHZ;
+}
+
+static void
+chx_enable_intr (uint8_t irq_num)
+{
+  sigdelset (&ss_cur, irq_num);
+}
+
+static void
+chx_clr_intr (uint8_t irq_num)
+{				/* Clear pending interrupt.  */
+  (void)irq_num;
+}
+
+static int
+chx_disable_intr (uint8_t irq_num)
+{
+  int already_disabled = sigismember (&ss_cur, irq_num);
+
+  sigaddset (&ss_cur, irq_num);
+  return already_disabled;
+}
+
+static void
+chx_set_intr_prio (uint8_t n)
+{
+  (void)n;
+}
+
+static void
+chx_interrupt_controller_init (void)
+{
+}
+
+static void
+chx_cpu_sched_lock (void)
+{
+  sigset_t ss;
+
+  sigfillset (&ss);
+  pthread_sigmask (SIG_BLOCK, &ss, &ss_cur);
+}
+
+static void
+chx_cpu_sched_unlock (void)
+{
+  pthread_sigmask (SIG_SETMASK, &ss_cur, NULL);
+}
+
+/* NOTE: Called holding the cpu_sched_lock.  */
+static struct chx_thread *
+chx_idle (void)
+{
+  struct chx_thread *tp_next = NULL;
+
+  while (tp_next == NULL)
+    {
+      int sig;
+      sigset_t set;
+
+      sigfillset (&set);
+      if (sigwait (&set, &sig))
+	continue;
+
+      if (sig == SIGALRM)
+	tp_next = chx_timer_expired ();
+      else
+	{
+	  tp_next = chx_recv_irq (sig);
+	  /* Exit when there is no waiter and it's INT or TERM.	 */
+	  if (tp_next == NULL
+	      && (sig == SIGINT || sig == SIGTERM))
+	    exit (1);
+	}
+    }
+
+  return tp_next;
+}
+
+void
+chx_handle_intr (uint32_t irq_num)
+{
+  struct chx_thread *tp_next;
+
+  tp_next = chx_recv_irq (irq_num);
+  if (!tp_next)
+    return;
+
+  tp_next = chx_running_preempted (tp_next);
+  preempted_context_switch (tp_next);
+}
+
+
+struct chx_thread main_thread;
+
+void
+chx_sigmask (ucontext_t *uc)
+{
+  /* Modify oldmask to SS_CUR, so that the signal mask will
+   * be set to SS_CUR.
+   *
+   * In user-level, sigset_t is big, but only the first word
+   * is used by the kernel.
+   */
+  memcpy (&uc->uc_sigmask, &ss_cur, sizeof (uint64_t));
+}
+
+static void
+sigalrm_handler (int sig, siginfo_t *siginfo, void *arg)
+{
+  struct chx_thread *tp_next;
+  ucontext_t *uc = arg;
+  (void)sig;
+  (void)siginfo;
+
+  tp_next = chx_timer_expired ();
+  if (tp_next)
+    {
+      tp_next = chx_running_preempted (tp_next);
+      preempted_context_switch (tp_next);
+    }
+  chx_sigmask (uc);
+}
+
+static void
+chx_init_arch (struct chx_thread *tp)
+{
+  struct sigaction sa;
+
+  sigemptyset (&ss_cur);
+
+  sa.sa_sigaction = sigalrm_handler;
+  sigfillset (&sa.sa_mask);
+  sa.sa_flags = SA_SIGINFO|SA_RESTART;
+  sigaction (SIGALRM, &sa, NULL); 
+
+  getcontext (&tp->tc);
+  chx_set_running (tp);
+}
+
+static void
+preempted_context_switch (struct chx_thread *tp_next)
+{
+  struct chx_thread *tp_prev = chx_running ();
+
+  /*
+   * The swapcontext implementation may reset sigmask in the
+   * middle of its execution, unfortunately.  It is best if
+   * sigmask restore is done at the end of the routine, but we
+   * can't assume that.
+   *
+   * Thus, there might be a race condition with regards to the
+   * user context TCP, if signal mask is cleared and signal comes
+   * in.  To avoid this situation, we block signals.
+   *
+   * We don't need to fill the mask here.  It keeps the condition
+   * of blocking signals before&after swapcontext call.  It is
+   * done by the signal mask for sigaction, the initial creation
+   * of the thread, and the condition of chx_sched function which
+   * mandates holding cpu_sched_lock.
+   */
+  chx_set_running (tp_next);
+  swapcontext (&tp_prev->tc, &tp_next->tc);
+}
+
+
+static uintptr_t
+voluntary_context_switch (struct chx_thread *tp_next)
+{
+  struct chx_thread *tp;
+  struct chx_thread *tp_prev;
+
+  tp_prev = chx_running ();
+  if (!tp_next)
+    {
+      chx_set_running (NULL);
+      tp_next = chx_idle ();
+      chx_set_running (tp_next);
+      if (tp_prev != tp_next)
+	swapcontext (&tp_prev->tc, &tp_next->tc);
+    }
+  else
+    {
+      chx_set_running (tp_next);
+      swapcontext (&tp_prev->tc, &tp_next->tc);
+    }
+  chx_cpu_sched_unlock ();
+
+  tp = chx_running ();
+  return tp->v;
+}
+
+static void __attribute__((__noreturn__))
+chx_thread_start (voidfunc thread_entry, void *arg)
+{
+  void *ret;
+
+  chx_cpu_sched_unlock ();
+  ret = thread_entry (arg);
+  chopstx_exit (ret);
+}
+
+static struct chx_thread *
+chopstx_create_arch (uintptr_t stack_addr, size_t stack_size,
+		     voidfunc thread_entry, void *arg)
+{
+  struct chx_thread *tp;
+  tp = malloc (sizeof (struct chx_thread));
+  if (!tp)
+    chx_fatal (CHOPSTX_ERR_THREAD_CREATE);
+
+  /*
+   * Calling getcontext with sched_lock held, the context is with
+   * signal blocked.  The sigmask will be cleared in chx_thread_start.
+   */
+  chx_cpu_sched_lock ();
+  memset (tp, 0, sizeof (struct chx_thread));
+  getcontext (&tp->tc);
+  tp->tc.uc_stack.ss_sp = (void *)stack_addr;
+  tp->tc.uc_stack.ss_size = stack_size;
+  tp->tc.uc_link = NULL;
+
+  /*
+   * makecontext is hard to use in a portable way, actually.
+   *
+   * On 64-bit machine, according to the standard, it should be coded
+   * to specify int (== 32-bit for LP64 machine) arguments that follow
+   * ARGC, so it is not that correct to specify two 64-bit arguments
+   * here.  However, GNU C library allows this.
+   */
+  makecontext (&tp->tc, (void (*)(void))chx_thread_start,
+	       2, thread_entry, arg);
+  chx_cpu_sched_unlock ();
+  return tp;
+}
--- a/chopstx-gnu-linux.h
+++ b/chopstx-gnu-linux.h
@@ -0,0 +1,10 @@
+#include <ucontext.h>
+/*
+ * The thread context: specific to GNU/Linux.
+ *
+ * We use the type ucontext_t, which includes all registers;
+ * Note that signal mask is also included in ucontext_t.
+ *
+ */
+
+typedef ucontext_t tcontext_t;
--- a/chopstx-riscv32.c
+++ b/chopstx-riscv32.c
@@ -0,0 +1,684 @@
+/*
+ * chopstx-riscv32.c - Threads and only threads: Arch specific code
+ *                     for RISC-V 32 IMAC (Bumblebee core)
+ *
+ * Copyright (C) 2019, 2021
+ *               Flying Stone Technology
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+/*
+ * Define Bumblebee specific CSRs
+ */
+asm (
+	".equ	msubm,0x7c4\n\t" /* No use (not needed to care about) */
+	".equ	mtvt,0x307\n\t"
+	".equ	mtvt2,0x7ec\n\t"
+);
+
+/* Data Memory Barrier.  */
+static void
+chx_dmb (void)
+{
+  asm volatile ("fence" : : : "memory");
+}
+
+/* No saved registers on the stack.  */
+
+/*
+ * Constants for RISC-V.
+ */
+#define REG_PC    0
+#define REG_RA    1
+#define REG_SP    2
+#define REG_GP    3
+#define REG_TP    4
+#define REG_A0   10
+#define MACHINE_STATUS_INIT 0x00001880 /* Machine-mode, interrupt enabled.  */
+
+/*
+ * We keep the TP register to the thread context address.
+ * Also, it is kept at the MSCRATCH register.
+ */
+static struct chx_thread *
+chx_running (void)
+{
+  uint32_t r;
+
+  asm ( "mv	%0,tp"       : "=r" (r));
+  if (r == 0)
+    return NULL;
+  return (struct chx_thread *)(r - 20);
+}
+
+static void
+chx_set_running (struct chx_thread *tp)
+{
+  asm (	"addi	tp,%0,20\n\t"
+	"csrw	mscratch,tp" : /* no output */ : "r" (tp) : "memory");
+}
+
+
+/*
+ * Lower layer architecture specific functions.
+ *
+ * system tick and interrupt
+ */
+
+/*
+ * System tick
+ *
+ * SYSTICK timer model is decreasing counter, where counter value 0
+ * means the timer stop.
+ *
+ * Since RISC-V MTIME is ever increasing counter, we need a bit of
+ * glue code here.  Fortunately, we have MSTOP register for Bumblebee
+ * core, so, we can use the register to stop the counter.  (If no such
+ * register stopping MTIME, we could put possible largest value in
+ * MTIMECMP, so that the timer won't be fired.)
+ */
+/* TIMER registers.  */
+struct TIMER {
+  volatile uint32_t mtime_lo;
+  volatile uint32_t mtime_hi;
+  volatile uint32_t mtimecmp_lo;
+  volatile uint32_t mtimecmp_hi;
+  uint32_t rsv0[1018];
+  volatile uint8_t mstop;
+  uint8_t rsv1[3];
+  volatile uint8_t msip;
+  uint8_t rsv2[3];
+} __attribute__ ((packed));
+static struct TIMER *const TIMER = (struct TIMER *)0xD1000000;
+
+/* In Chopstx, we only use the lower 32-bit of the timer.  */
+
+static void
+chx_systick_init_arch (void)
+{
+  TIMER->mstop |= 1;
+  TIMER->mtime_hi = TIMER->mtime_lo = 0;
+  TIMER->mtimecmp_lo = 0xffffffff;
+  TIMER->mtimecmp_hi = 0;
+}
+
+/*
+ * @ticks: 0 means to stop the timer, otherwise update the timer
+ */
+static void
+chx_systick_reload (uint32_t ticks)
+{
+  if (!ticks)
+    {
+      TIMER->mstop |= 1;
+      TIMER->mtimecmp_lo = 0xffffffff;
+    }
+  else
+    {
+      TIMER->mtime_lo = 0;
+      TIMER->mtimecmp_lo = ticks;
+      if ((TIMER->mstop & 1))
+	TIMER->mstop &= ~1;
+    }
+}
+
+static uint32_t
+chx_systick_get (void)
+{
+  int stopped = (TIMER->mstop & 1);
+
+  if (stopped)
+    return 0;
+  else
+    {
+      uint32_t now = TIMER->mtime_lo;
+
+      if (TIMER->mtimecmp_lo <= now)
+	return 0;
+
+      return TIMER->mtimecmp_lo - now;
+    }
+}
+
+/* TIMER runs at 1/4 of core clock.  */
+
+static uint32_t
+usec_to_ticks (uint32_t usec)
+{
+  return usec * (MHZ/4);
+}
+
+static uint32_t
+ticks_to_usec (uint32_t ticks)
+{
+  return ticks / (MHZ/4);
+}
+
+/*
+ * Interrupt Handling of (E)CLIC
+ */
+
+/* CLIC registers.  */
+struct CLIC {
+  volatile uint8_t cfg;
+  uint8_t rsv[3];
+  volatile uint32_t info;
+  volatile uint8_t uth;
+  volatile uint8_t sth;
+  volatile uint8_t hth;
+  volatile uint8_t mth;
+} __attribute__ ((packed));
+
+static struct CLIC *const CLIC = (struct CLIC *)0xD2000000;
+
+struct CLIC_INT {
+  volatile uint8_t ip;
+  volatile uint8_t ie;
+  volatile uint8_t attr;
+  volatile uint8_t ctl;
+} __attribute__ ((packed));
+static struct CLIC_INT *const CLIC_INT = (struct CLIC_INT *)0xD2001000;
+
+static void
+chx_enable_intr (uint8_t irq_num)
+{
+  CLIC_INT[irq_num].ie |= 1;
+}
+
+static void
+chx_clr_intr (uint8_t irq_num)
+{
+  /* Clear pending interrupt is done automatically by the hardware.  */
+  (void)irq_num;
+}
+
+static int
+chx_disable_intr (uint8_t irq_num)
+{
+  int already_disabled = !(CLIC_INT[irq_num].ie & 1);
+
+  CLIC_INT[irq_num].ie &= ~1;
+  return already_disabled;
+}
+
+static void
+chx_set_intr_prio (uint8_t irq_num)
+{
+  CLIC_INT[irq_num].attr = 0xc0; /* Level triggered, SHV=0 */
+  /* Note: SHV: Selective Hardware Vectoring: off (use common routine).  */
+
+  CLIC_INT[irq_num].ctl = 0xff;
+}
+
+#define SWINT_IRQ   3
+#define TIMER_IRQ   7
+#define MEMERR_IRQ 17           /* Why on earth it's IRQ??? */
+
+static void chx_handle_intr (void);
+static void exception_handler (void);
+
+/* Alignment to 64 is needed to enable ECLIC mode.  */
+static void __attribute__ ((naked,aligned(64)))
+exception_handler (void)
+{
+  asm volatile (
+"0:	j	0b"
+	: /* no output */);
+}
+
+static void __attribute__ ((naked))
+memory_error (void)
+{
+  asm volatile (
+"0:	j	0b"
+	: /* no output */);
+}
+
+typedef void (*handler)(void);
+
+/* Not used (because we always disable SHV for all interrupts),
+ * Just in case, if some interrupt uses SHV=1.
+ */
+static const handler vector_table[] __attribute__ ((aligned(512))) = {
+ 0, 0, 0, chx_handle_intr,
+ 0, 0, 0, chx_handle_intr,
+ 0, 0, 0, 0,
+ 0, 0, 0, 0,
+ 0, memory_error, 0, 0,
+};
+
+static void
+chx_interrupt_controller_init (void)
+{
+  asm volatile (
+	"csrw	mtvt,%0"
+	: /* no output */ : "r" (vector_table) : "memory" );
+
+  asm volatile (
+	"csrw	mtvt2,%0\n\t"
+	"csrsi	mtvt2,1"
+	: /* no output */ : "r" (chx_handle_intr) : "memory");
+
+  asm volatile (
+	"csrw	mtvec,%0\n\t"
+	"csrsi	mtvec,3"        /* Enable ECLC mode */
+	: /* no output */ : "r" (exception_handler) : "memory" );
+
+  CLIC->cfg &= 0xe1;            /* NLBITS = 0 */
+  CLIC->mth = 0;
+
+  /* In Bumblebee core, timer interrupt is also handled by CLIC.  */
+  chx_set_intr_prio (SWINT_IRQ);
+  chx_enable_intr (SWINT_IRQ);
+  chx_set_intr_prio (TIMER_IRQ);
+  chx_enable_intr (TIMER_IRQ);
+  chx_set_intr_prio (MEMERR_IRQ);
+  chx_enable_intr (MEMERR_IRQ);
+}
+
+/* Just for testing TIMER and ECLIC.  No real use for now.  */
+static void
+chx_sw_int (int go)
+{
+  if (go)
+    TIMER->msip |= 1;
+  else
+    TIMER->msip &= ~1;
+}
+
+static void
+chx_cpu_sched_lock (void)
+{
+  asm volatile ("csrci	mstatus,8" : : : "memory" );
+}
+
+static void
+chx_cpu_sched_unlock (void)
+{
+  asm volatile ("csrsi	mstatus,8" : : : "memory" );
+}
+
+static void
+chx_init_arch (struct chx_thread *tp)
+{
+  memset (&tp->tc, 0, sizeof (tp->tc));
+  chx_set_running (tp);
+}
+
+#define SAVE_CALLEE_SAVE_REGISTERS            \
+	"# Save callee save registers\n\t"    \
+	"sw	s0,32(sp)\n\t"                \
+	"sw	s1,36(sp)\n\t"                \
+	"sw	s2,72(sp)\n\t"                \
+	"sw	s3,76(sp)\n\t"                \
+	"sw	s4,80(sp)\n\t"                \
+	"sw	s5,84(sp)\n\t"                \
+	"sw	s6,88(sp)\n\t"                \
+	"sw	s7,92(sp)\n\t"                \
+	"sw	s8,96(sp)\n\t"                \
+	"sw	s9,100(sp)\n\t"               \
+	"sw	s10,104(sp)\n\t"              \
+	"sw	s11,108(sp)\n\t"
+
+#define RESTORE_CALLEE_SAVE_REGISTERS         \
+	"# Restore callee save registers\n\t" \
+	"lw	s0,32(sp)\n\t"                \
+	"lw	s1,36(sp)\n\t"                \
+	"lw	s2,72(sp)\n\t"                \
+	"lw	s3,76(sp)\n\t"                \
+	"lw	s4,80(sp)\n\t"                \
+	"lw	s5,84(sp)\n\t"                \
+	"lw	s6,88(sp)\n\t"                \
+	"lw	s7,92(sp)\n\t"                \
+	"lw	s8,96(sp)\n\t"                \
+	"lw	s9,100(sp)\n\t"               \
+	"lw	s10,104(sp)\n\t"              \
+	"lw	s11,108(sp)\n\t"
+
+#define SAVE_OTHER_REGISTERS            \
+	"# Save other registers\n\t"    \
+	"sw	ra,4(sp)\n\t"           \
+	"sw	gp,12(sp)\n\t"          \
+	"sw	t0,20(sp)\n\t"          \
+	"sw	t1,24(sp)\n\t"          \
+	"sw	t2,28(sp)\n\t"          \
+	"sw	a0,40(sp)\n\t"          \
+	"sw	a1,44(sp)\n\t"          \
+	"sw	a2,48(sp)\n\t"          \
+	"sw	a3,52(sp)\n\t"          \
+	"sw	a4,56(sp)\n\t"          \
+	"sw	a5,60(sp)\n\t"          \
+	"sw	a6,64(sp)\n\t"          \
+	"sw	a7,68(sp)\n\t"          \
+	"sw	t3,112(sp)\n\t"         \
+	"sw	t4,116(sp)\n\t"         \
+	"sw	t5,120(sp)\n\t"         \
+	"sw	t6,124(sp)\n\t"
+
+#define RESTORE_OTHER_REGISTERS         \
+	"# Restore other registers\n\t" \
+	"lw	ra,4(sp)\n\t"           \
+	"lw	gp,12(sp)\n\t"          \
+	"lw	t0,20(sp)\n\t"          \
+	"lw	t1,24(sp)\n\t"          \
+	"lw	t2,28(sp)\n\t"          \
+	"lw	a0,40(sp)\n\t"          \
+	"lw	a1,44(sp)\n\t"          \
+	"lw	a2,48(sp)\n\t"          \
+	"lw	a3,52(sp)\n\t"          \
+	"lw	a4,56(sp)\n\t"          \
+	"lw	a5,60(sp)\n\t"          \
+	"lw	a6,64(sp)\n\t"          \
+	"lw	a7,68(sp)\n\t"          \
+	"lw	t3,112(sp)\n\t"         \
+	"lw	t4,116(sp)\n\t"         \
+	"lw	t5,120(sp)\n\t"         \
+	"lw	t6,124(sp)\n\t"
+/*
+ * MSTATUS register:
+ *   31:    SD
+ *   16-15: XS (Extra Unit state)
+ *   14-13: FS (Floating-point Unit state)
+ *   12-11: MPP  (Previous Privilege)
+ *   7:     MPIE (Previous Interrupt Enable flag)
+ *   3:     MIE  (Interrupt Enable flag)
+ */
+/*
+ * MSUBM register:
+ *   9-8 PTYP (Previous Type-of-execution)
+ *   7-6 TYP  (Currunt Type-of-execution)
+ *   0: Normal, 1: Interrupt, 2: Excep, 3: NMI
+ *
+ * No need to store PTYP field of MSUBM in MACHINE_STATUS.
+ * No need to setup MSUBM for PTYP.
+ * Since it's always 0 when this is called.
+ *
+ * Save MPP..MPIE in MACHINE_STATUS in the thread context.
+ */
+#define SETUP_MSTATUS_FROM_MACHINE_STATUS                                 \
+	"lw	a0,128(sp)\n\t"   /* MPP..MPIE is in MACHINE_STATUS  */   \
+	"csrr	a1,mstatus\n\t"                                           \
+	"srli	a1,a1,13\n\t"                                             \
+	"slli	a1,a1,13\n\t"     /* SD, XS, and FS bits from MSTATUS */  \
+	"or	a0,a0,a1\n\t"                                             \
+	"csrw	mstatus,a0\n\t"   /* Note: keep MIE=0 */
+
+/* It is good if ISA has a single instruction for this operation.  */
+#define CATCH_AN_INTERRUPT_SYNCHRONOUSLY                                     \
+	"mv	a0,zero\n"                                                   \
+    "0:\n\t"                                                                 \
+	/*                                                                   \
+	 * Interrupt is masked here, and it executes the WFI                 \
+	 * instruction.  When an interrupt occurs, the core is waken         \
+	 * up (even if it is masked).                                        \
+	 */                                                                  \
+	"csrci	mstatus,8\n\t"  /* Interrupt should be masked already.   */  \
+				/* Nevertheless, make sure it's masked.  */  \
+	"wfi\n\t"                                                            \
+	/*                                                                   \
+	 * It is good if MCAUSE were updated here, but it is only            \
+	 * updated when the control goes into the interrupt service,         \
+	 * in a step of the interrupt handling steps of the core.  So,       \
+	 * we let it go to chx_handle_intr, by unmasking.                    \
+	 */                                                                  \
+	"csrsi	mstatus,8\n\t"  /* Unmask interrupts to catch one.  */       \
+	/* Just before this line, it is interrupted.  */                     \
+	/* And interrupt is masked and a0 is set.     */                     \
+	"beqz	a0,0b\n\t"      /* Just in case if not, loop.  */
+
+/*
+ * The idle function.
+ *
+ * NOTE: In this function, interrupt is masked (MIE=0) and interrupt
+ * is synchronously handled.
+ */
+static struct chx_thread * __attribute__ ((used))
+chx_idle (void)
+{
+  extern void chx_prepare_sleep_mode (void);
+  register struct chx_thread *tp_next asm ("a0") = NULL;
+
+  while (tp_next == NULL)
+    {
+      register uint32_t irq_num asm ("a0");
+
+      chx_prepare_sleep_mode ();  /* MCU specific sleep setup */
+
+      asm volatile (
+	CATCH_AN_INTERRUPT_SYNCHRONOUSLY
+	/*
+	 * In chx_handle_intr, a0 is set by the value of MCAUSE.
+	 */
+	"slli	a0,a0,20\n\t"
+	"srli	a0,a0,20"       /* Take lower 12-bit of MCAUSE */
+	: "=r" (irq_num));
+      /* Note: here, interrupt is masked again.  */
+
+      if (irq_num == SWINT_IRQ)
+	chx_sw_int (0);
+      else if (irq_num == TIMER_IRQ)
+	tp_next = chx_timer_expired ();
+      else if (irq_num == MEMERR_IRQ)
+	memory_error ();
+      else
+	tp_next = chx_recv_irq (irq_num);
+    }
+
+  return tp_next;
+}
+
+
+static uintptr_t
+voluntary_context_switch (struct chx_thread *tp_next)
+{
+  register uintptr_t result asm ("a0");
+
+  asm volatile (
+	/* Here, %0 (a0) points to pointer (struct chx_thread *) to be
+	 * switched.  We get the thread context pointer adding the
+	 * offset.
+	*/
+	"# Voluntary context switch\n\t"
+	"sw	sp,8(tp)\n\t"
+	"mv	sp,tp\n\t"        /* Using SP, we can use C.SWSP instruction */
+	"sw	zero,0(sp)\n\t"
+	SAVE_CALLEE_SAVE_REGISTERS
+	"# Check if going to IDLE function\n\t"
+	"bnez	%0,0f\n\t"
+	/*
+	 * NOTE: Here, for running chx_idle, we can use
+	 * __main_stack_end__, because neither any threads, nor
+	 * interrupt context use that.	Using __main_stack_end__, we
+	 * can minimize stack memory usage of each thread.
+	 */
+	"# Call the IDLE function, interrupt masked.\n\t"
+	"mv	tp,zero\n\t"
+	"csrw	mscratch,tp\n\t" /* chx_set_running */
+	"la	sp,__main_stack_end__\n\t"
+	"call	chx_idle\n"
+    ".L_V_CONTEXT_SWITCH_BEGIN:\n"
+    "0:\n\t"
+	"addi	%0,%0,20\n\t"
+	"mv	sp,%0\n\t"
+	RESTORE_CALLEE_SAVE_REGISTERS
+	/**/
+	"csrw	mscratch,sp\n\t" /* chx_set_running */
+	"lw	a0,0(sp)\n\t"
+	"beqz	a0,1f\n"
+    ".L_RETURN_TO_PREEMPTED_THREAD:\n\t"
+	"csrw	mepc,a0\n\t"
+	SETUP_MSTATUS_FROM_MACHINE_STATUS
+	RESTORE_OTHER_REGISTERS
+	"lw	tp,16(sp)\n\t"    /* Application is free to other use of TP */
+	"lw	sp,8(sp)\n\t"
+	"mret\n"
+    "1:\n\t"
+	"lw	a0,-4(sp)\n\t"  /* Get the result value */
+	"mv	tp,sp\n\t"
+	"lw	sp,8(sp)\n\t"
+	"csrsi	mstatus,8\n"  /* Unmask interrupts.  */
+    ".L_V_CONTEXT_SWITCH_FINISH:"
+	: "=r" (result)
+	: "0" (tp_next)
+	: "ra", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
+	  "a1", "a2", "a3", "a4", "a5", "a6", "a7",
+	  "memory");
+
+  return result;
+}
+
+extern void cause_link_time_error_unexpected_size_of_struct_chx_thread (void);
+
+static struct chx_thread *
+chopstx_create_arch (uintptr_t stack_addr, size_t stack_size,
+		     voidfunc thread_entry, void *arg)
+{
+  struct chx_thread *tp;
+  void *stack;
+  register uint32_t gp;
+
+  asm (	"mv	%0,gp" : "=r" (gp));
+
+  if (CHOPSTX_THREAD_SIZE != sizeof (struct chx_thread))
+    cause_link_time_error_unexpected_size_of_struct_chx_thread ();
+
+  if (stack_size < sizeof (struct chx_thread))
+    chx_fatal (CHOPSTX_ERR_THREAD_CREATE);
+
+  stack = (void *)(stack_addr + stack_size - sizeof (struct chx_thread));
+  tp = (struct chx_thread *)stack;
+  memset (&tp->tc, 0, sizeof (tp->tc));
+  tp->tc.reg[REG_A0] = (uint32_t)arg;
+  tp->tc.reg[REG_RA] = (uint32_t)chopstx_exit;
+  tp->tc.reg[REG_PC] = (uint32_t)thread_entry;
+  tp->tc.reg[REG_GP] = gp;
+  tp->tc.reg[REG_TP] = (uint32_t)&tp->tc;
+  tp->tc.reg[REG_SP] = (uint32_t)stack;
+  tp->tc.machine_status = MACHINE_STATUS_INIT;
+
+  return tp;
+}
+
+
+/*
+ * Note: Examine the assembler output carefully, because it has
+ * ((naked)) attribute
+ */
+static void __attribute__ ((naked,aligned(4)))
+chx_handle_intr (void)
+{
+  struct chx_thread *tp_next;
+  uint32_t irq_num;
+
+  /*
+   * stack setup to __main_stack_end__
+   * save registers.
+   */
+  asm volatile (
+	"csrrw	sp,mscratch,sp\n\t" /* SP to MSCRATCH, thread pointer into SP */
+	"# Check if it is IDLE\n\t"
+	"bnez	sp,0f\n\t"
+	/**/
+	"csrrw	sp,mscratch,sp\n\t" /* Recover MSCRATCH, the thread pointer */
+	"li	a0,0x80\n\t"
+	"csrrc	x0,mstatus,a0\n\t"  /* Clear MPIE bit to mask interrupt     */
+	"csrr	a0,mcause\n\t"
+	"mret\n"
+    "0:\n\t"
+	"sw	tp,16(sp)\n\t"      /* Application is free to other use of TP */
+	SAVE_OTHER_REGISTERS
+	"csrr	a0,mepc\n\t"
+	"sw	a0,0(sp)\n\t"
+	/**/
+	"mv	tp,sp\n\t"          /* TP is now the thread pointer */
+	"csrrw	sp,mscratch,sp\n\t" /* TP to MSCRATCH, SP_old into SP */
+	"sw	sp,8(tp)\n\t"
+	"la	sp,__main_stack_end__");
+
+  /*
+   * The stack at __main_stack_end__ is shared data between chx_idle
+   * and this handler.  When it comes here, there is no active chx_idle,
+   * so, it is safe to use the stack.
+   *
+   * Note that when there are multiple cores, we need this stack for
+   * each core.
+   */
+
+  asm (	"csrr	%0,mcause\n\t"
+	"slli	%0,%0,20\n\t"
+	"srli	%0,%0,20"       /* Take lower 12-bit of MCAUSE */
+	: "=r" (irq_num));
+
+  tp_next = NULL;
+  if (irq_num == SWINT_IRQ)
+    chx_sw_int (0);
+  else if (irq_num == TIMER_IRQ)
+    tp_next = chx_timer_expired ();
+  else if (irq_num == MEMERR_IRQ)
+    memory_error ();
+  else
+    tp_next = chx_recv_irq (irq_num);
+
+  if (!tp_next)
+    asm volatile (
+	"mv	sp,tp\n\t"      /* Using SP, we can use C.SWSP instruction */
+	RESTORE_OTHER_REGISTERS
+	"lw	tp,16(sp)\n\t"  /* Application is free to other use of TP */
+	"lw	sp,8(sp)\n\t"
+	"mret");
+
+  tp_next = chx_running_preempted (tp_next);
+
+  asm volatile (
+	"# Involuntary context switch\n\t"
+	"mv	sp,tp\n\t"      /* Using SP, we can use C.SWSP instruction */
+	SAVE_CALLEE_SAVE_REGISTERS
+	/*
+	 * MACHINE_STATUS = (MSTATUS & 0x00001f80)
+	 */
+	"csrr	a1,mstatus\n\t"
+	"andi	a1,a1,-9\n\t"     /* Clear MIE (bit3) */
+	"slli	a1,a1,19\n\t"     /* Clear bit31 to bit13 */
+	"srli	a1,a1,19\n\t"     /* MPP..MPIE from MSTATUS  */
+	"sw	a1,128(sp)\n"
+    ".L_IV_CONTEXT_SWITCH_BEGIN:\n\t"
+	"addi	%0,%0,20\n\t"
+	"mv	sp,%0\n\t"
+	RESTORE_CALLEE_SAVE_REGISTERS
+	/**/
+	"csrw	mscratch,sp\n\t" /* chx_set_running */
+	"lw	a0,0(sp)\n\t"
+	"bnez	a0,.L_RETURN_TO_PREEMPTED_THREAD\n\t"
+	/**/
+	"lw	a0,-4(sp)\n\t"    /* Get the result value */
+	"mv	tp,sp\n\t"
+	"lw	sp,8(sp)\n\t"
+	"la	a1,.L_V_CONTEXT_SWITCH_FINISH\n\t"
+	"csrw	mepc,a1\n\t"
+	"li	a1,0x188\n\t"     /* Set MPIE and MPP bits */
+	"slli	a1,a1,4\n\t"
+	"csrrs	x0,mstatus,a1\n\t"/* Prev: Machine mode, enable interrupt */
+	"mret"                    /* Return to Prev  */
+	: /* no output */ : "r" (tp_next) : "memory");
+}
--- a/chopstx-riscv32.h
+++ b/chopstx-riscv32.h
@@ -0,0 +1,61 @@
+/*
+ * The thread context: specific to RISC-V 32.
+ *
+ * Calling convention matters when we implement context switch.
+ *
+ * We implement a voluntary context switch function which follows
+ * standard calling convension.  The function doesn't need to save
+ * caller save registers (function arguments and temporaries) and
+ * fixed ones (global pointer and thread pointer) to a thread context
+ * struct.  Only it needs to care about stack pointer and saved
+ * registers.
+ *
+ * For interrupt handling when it returns directly to original thread,
+ * we can avoid saving all registers; It can only save registers used
+ * in that handling.  When it returns to another thread, that is, when
+ * it does involuntary context switch (also called "thread
+ * preemption"), all registers should be saved.
+ *
+ * In Chopstx, we don't use nested interrupt of machine.  So, when a
+ * thread is interrupted, the interrupted context is always one of
+ * application threads or the idle thread.  We have a dedicated stack
+ * for exception handling.
+ *
+ * Here is RISC-V calling convention.
+ *
+ * Register   ABI name   Description     Saver   other usage
+ * x0         zero       0, hard-wired   --
+ * x1         ra         return address  caller
+ * x2         sp         stack pointer   callEE
+ * x3         gp         global pointer  --
+ * x4         tp         thread pointer  --
+ * x5-7       t0-2       temporary       caller
+ * x8         s0/fp      saved register  callEE  frame pointer
+ * x9         s1         saved register  callEE
+ * x10-11     a0-1       argument        caller  return value
+ * x12-17     a2-7       argument        caller
+ * x18-27     s2-11      saved register  callEE
+ * x28-31     t3-6       temporary       caller
+ *
+ * Simply, we have entries of all registers in the thread context.  We
+ * don't use stack to save/restore part of its context.  We don't put
+ * any other constraints such that an application should always keep
+ * gp and/or tp registers; It is free for an application to
+ * temporarily use those registers beyond a conventional usage (e.g.,
+ * for some specific routines like hash computation).
+ *
+ * We use the first entry, reg[0], to store PC, because x0 is always 0,
+ * no need to save/restore it.
+ *
+ * Core specific machine status information is saved into the last
+ * entry, MACHINE_STATUS.  For Bumblebee core, it is composed by bits
+ * of mstatus and msubm.
+ */
+struct tcontext {
+  uint32_t reg[32];
+  uint32_t machine_status;
+};
+
+typedef struct tcontext tcontext_t;
+
+#define CHOPSTX_THREAD_SIZE 160
--- a/chopstx.c
+++ b/chopstx.c
--- a/chopstx.h
+++ b/chopstx.h
@@ -1,7 +1,8 @@
 /*
 * chopstx.h - Threads and only threads.
 *
- * Copyright (C) 2013, 2016 Flying Stone Technology
+ * Copyright (C) 2013, 2016, 2017, 2018, 2020
+ *               Flying Stone Technology
 * Author: NIIBE Yutaka <gniibe@fsij.org>
 *
 * This file is a part of Chopstx, a thread library for embedded.
@@ -22,7 +23,7 @@
 * As additional permission under GNU GPL version 3 section 7, you may
 * distribute non-source form of the Program without the copy of the
 * GNU GPL normally required by section 4, provided you inform the
- * receipents of GNU GPL by a written offer.
+ * recipients of GNU GPL by a written offer.
 *
 */

@@ -30,7 +31,7 @@ struct chx_qh {
  struct chx_pq *next, *prev;
 };

-typedef uint32_t chopstx_t;
+typedef uintptr_t chopstx_t;
 typedef uint8_t chopstx_prio_t;

 extern chopstx_t chopstx_main;
@@ -39,14 +40,12 @@ extern chopstx_t chopstx_main;
 /* NOTE: This signature is different to PTHREAD's one.  */
 chopstx_t
 chopstx_create (uint32_t flags_and_prio,
-		uint32_t stack_addr, size_t stack_size,
+		uintptr_t stack_addr, size_t stack_size,
 		void *(thread_entry) (void *), void *);
 #define CHOPSTX_PRIO_BITS 8
 #define CHOPSTX_DETACHED 0x10000
 #define CHOPSTX_SCHED_RR 0x20000

-#define CHOPSTX_PRIO_INHIBIT_PREEMPTION 248
-
 void chopstx_usec_wait (uint32_t usec);

 struct chx_spinlock {
@@ -155,9 +154,13 @@ typedef struct chx_intr chopstx_intr_t;

 void chopstx_claim_irq (chopstx_intr_t *intr, uint8_t irq_num);

-void chopstx_intr_wait (chopstx_intr_t *intr); /* DEPRECATED */
+void chopstx_intr_wait (chopstx_intr_t *intr);
+void chopstx_intr_done (chopstx_intr_t *intr);


-int chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *pd_array[]);
+int chopstx_poll (uint32_t *usec_p, int n,
+		  struct chx_poll_head *const pd_array[]);

-#define CHOPSTX_THREAD_SIZE 64
+int chopstx_conf_idle (int enable_sleep);
+
+void *chopstx_critical (void *func (void *), void *arg);
--- a/contrib/ackbtn-stm32f103.c
+++ b/contrib/ackbtn-stm32f103.c
@@ -0,0 +1,116 @@
+/*
+ * ackbtn-stm32f103.c - Acknowledge button support for STM32F103
+ *
+ * Copyright (C) 2018  g10 Code GmbH
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include <chopstx.h>
+#include <mcu/stm32f103.h>
+
+#include "board.h"
+#include "sys.h"
+
+/*
+ * All EXTI registers (EXTI_IMR, EXTI_EMR, EXTI_PR , EXTI_RTSR, and
+ * EXTI_FTSR) have same structure, where each bit of X is used for
+ * line X, from 0 up to 19.
+ *
+ * We use 31-bit of PIN_CONFIG to represent if it's for rising edge or
+ * falling edge.
+ */
+static uint32_t pin_config;
+#define PINCFG_EDGE        0x80000000
+#define PINCFG_EDGE_RISING PINCFG_EDGE
+
+void
+ackbtn_init (chopstx_intr_t *intr)
+{
+  uint8_t irq_num;
+  uint32_t afio_exticr_index;
+  uint32_t afio_exticr_extiX_pY;
+
+  switch (SYS_BOARD_ID)
+    {
+    case BOARD_ID_FST_01:
+    case BOARD_ID_FST_01G:
+    case BOARD_ID_GNUKEY_DS:
+      /* PA2 can be connected to a hall sensor or a switch */
+      afio_exticr_index = 0;
+      afio_exticr_extiX_pY = AFIO_EXTICR1_EXTI2_PA;
+      irq_num = EXTI2_IRQ;
+      pin_config = 0x0004; /* EXTI_PR_PR2 == EXTI_IMR_MR2 == EXTI_RTSR_TR2 */
+      pin_config |= PINCFG_EDGE_RISING;
+      break;
+
+    case BOARD_ID_FST_01SZ:
+    default:
+      /* PA3 is connected to a hall sensor DRV5032FA */
+      afio_exticr_index = 0;
+      afio_exticr_extiX_pY = AFIO_EXTICR1_EXTI3_PA;
+      irq_num = EXTI3_IRQ;
+      pin_config = 0x0008; /* EXTI_PR_PR3 == EXTI_IMR_MR3 == EXTI_RTSR_TR3 */
+      pin_config |= PINCFG_EDGE_RISING;
+      break;
+    }
+
+  /* Configure EXTI line */
+  if (afio_exticr_extiX_pY)
+    AFIO->EXTICR[afio_exticr_index] |= afio_exticr_extiX_pY;
+
+  /* Interrupt is masked, now */
+  EXTI->IMR &= ~(pin_config & ~PINCFG_EDGE);
+
+  chopstx_claim_irq (intr, irq_num);
+}
+
+void
+ackbtn_enable (void)
+{
+  /* Clear pending interrupt */
+  EXTI->PR |= (pin_config & ~PINCFG_EDGE);
+  /* Enable interrupt, clearing the mask */
+  EXTI->IMR |= (pin_config & ~PINCFG_EDGE);
+
+  /* Configure which edge is detected */
+  if ((pin_config & PINCFG_EDGE))
+    EXTI->RTSR |= (pin_config & ~PINCFG_EDGE);
+  else
+    EXTI->FTSR |= (pin_config & ~PINCFG_EDGE);
+}
+
+void
+ackbtn_disable (void)
+{
+  /* Disable interrupt having the mask */
+  EXTI->IMR &= ~(pin_config & ~PINCFG_EDGE);
+  /* Clear pending interrupt */
+  EXTI->PR |= (pin_config & ~PINCFG_EDGE);
+
+  /* Disable edge detection */
+  EXTI->RTSR &= ~(pin_config & ~PINCFG_EDGE);
+  EXTI->FTSR &= ~(pin_config & ~PINCFG_EDGE);
+}
--- a/contrib/ackbtn.h
+++ b/contrib/ackbtn.h
@@ -0,0 +1,3 @@
+void ackbtn_init (chopstx_intr_t *intr);
+void ackbtn_enable (void);
+void ackbtn_disable (void);
--- a/contrib/adc-gnu-linux.c
+++ b/contrib/adc-gnu-linux.c
@@ -0,0 +1,77 @@
+/*
+ * adc-gnu-linux.c - ADC driver for GNU/Linux emulation.
+ *                   This ADC driver just fills pseudo random values.
+ *                   It's completely useless other than for NeuG.
+ *
+ * Copyright (C) 2017  Free Software Initiative of Japan
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+#include "adc.h"
+
+#define ADC_RANDOM_SEED 0x01034649 /* "Hello, father!" in Japanese */
+
+/*
+ * Do calibration for ADC.
+ */
+int
+adc_init (void)
+{
+  srandom (ADC_RANDOM_SEED);
+  return 0;
+}
+
+void
+adc_start (void)
+{
+}
+
+uint32_t adc_buf[64];
+
+void
+adc_start_conversion (int offset, int count)
+{
+  while (count--)
+    adc_buf[offset++] = random ();
+}
+
+
+void
+adc_stop (void)
+{
+}
+
+
+/*
+ * Return 0 on success.
+ * Return 1 on error.
+ */
+int
+adc_wait_completion (void)
+{
+  return 0;
+}
--- a/contrib/adc-mkl27z.c
+++ b/contrib/adc-mkl27z.c
@@ -25,7 +25,7 @@
 * As additional permission under GNU GPL version 3 section 7, you may
 * distribute non-source form of the Program without the copy of the
 * GNU GPL normally required by section 4, provided you inform the
- * receipents of GNU GPL by a written offer.
+ * recipients of GNU GPL by a written offer.
 *
 */

@@ -295,19 +295,20 @@ adc_stop (void)
 int
 adc_wait_completion (void)
 {
-  struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr };
  int i;

  while (1)
    {
      /* Wait DMA completion */
-      chopstx_poll (NULL, 1, pd_array);
+      chopstx_intr_wait (&adc_intr);

      DMA0->DSR_BCR = (1 << 24);
      DMA1->DSR_BCR = (1 << 24);

      adc_stop_conversion ();

+      chopstx_intr_done (&adc_intr);
+
      for (i = 0; i < adc.count; i++)
 	*adc.p++ = (uint8_t)adc.buf[i];

--- a/contrib/adc-stm32f103.c
+++ b/contrib/adc-stm32f103.c
@@ -3,7 +3,7 @@
 *                   In this ADC driver, there are NeuG specific parts.
 *                   You need to modify to use this as generic ADC driver.
 *
- * Copyright (C) 2011, 2012, 2013, 2015, 2016
+ * Copyright (C) 2011, 2012, 2013, 2015, 2016, 2017, 2018
 *               Free Software Initiative of Japan
 * Author: NIIBE Yutaka <gniibe@fsij.org>
 *
@@ -25,7 +25,7 @@
 * As additional permission under GNU GPL version 3 section 7, you may
 * distribute non-source form of the Program without the copy of the
 * GNU GPL normally required by section 4, provided you inform the
- * receipents of GNU GPL by a written offer.
+ * recipients of GNU GPL by a written offer.
 *
 */

@@ -34,6 +34,8 @@
 #include <chopstx.h>
 #include <mcu/stm32f103.h>
 #include "adc.h"
+#include "board.h"
+#include "sys.h"

 #define STM32_ADC_ADC1_DMA_PRIORITY         2

@@ -46,6 +48,7 @@
 #define ADC_SMPR2_SMP_AN0(n)    ((n) << 0)
 #define ADC_SMPR2_SMP_AN1(n)    ((n) << 3)
 #define ADC_SMPR2_SMP_AN2(n)    ((n) << 6)
+#define ADC_SMPR2_SMP_AN8(n)    ((n) << 24)
 #define ADC_SMPR2_SMP_AN9(n)    ((n) << 27)

 #define ADC_SQR1_NUM_CH(n)      (((n) - 1) << 20)
@@ -60,6 +63,7 @@
 #define ADC_CHANNEL_IN0         0
 #define ADC_CHANNEL_IN1         1
 #define ADC_CHANNEL_IN2         2
+#define ADC_CHANNEL_IN8         8
 #define ADC_CHANNEL_IN9         9
 #define ADC_CHANNEL_IN10        10
 #define ADC_CHANNEL_IN11        11
@@ -67,7 +71,9 @@
 #define ADC_CHANNEL_VREFINT     17

 #define DELIBARATELY_DO_IT_WRONG_VREF_SAMPLE_TIME
+#ifndef MCU_STM32F1_GD32F1
 #define DELIBARATELY_DO_IT_WRONG_START_STOP
+#endif

 #ifdef DELIBARATELY_DO_IT_WRONG_VREF_SAMPLE_TIME
 #define ADC_SAMPLE_VREF ADC_SAMPLE_1P5
@@ -112,6 +118,8 @@ adc_init (void)

  ADC1->CR1 = 0;
  ADC1->CR2 = ADC_CR2_ADON;
+  chopstx_usec_wait (1000);
+
  ADC1->CR2 = ADC_CR2_ADON | ADC_CR2_RSTCAL;
  while ((ADC1->CR2 & ADC_CR2_RSTCAL) != 0)
    ;
@@ -122,6 +130,8 @@ adc_init (void)

  ADC2->CR1 = 0;
  ADC2->CR2 = ADC_CR2_ADON;
+  chopstx_usec_wait (1000);
+
  ADC2->CR2 = ADC_CR2_ADON | ADC_CR2_RSTCAL;
  while ((ADC2->CR2 & ADC_CR2_RSTCAL) != 0)
    ;
@@ -135,15 +145,13 @@ adc_init (void)
  return 0;
 }

-#include "board.h"
-#include "sys.h"
-
 static void
 get_adc_config (uint32_t config[4])
 {
  config[2] = ADC_SQR1_NUM_CH(2);
  switch (SYS_BOARD_ID)
    {
+    case BOARD_ID_FST_01G:
    case BOARD_ID_FST_01:
      config[0] = 0;
      config[1] = ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5)
@@ -169,14 +177,22 @@ get_adc_config (uint32_t config[4])
 		| ADC_SQR3_SQ2_N(ADC_CHANNEL_IN2);
      break;

+    case BOARD_ID_ST_NUCLEO_F103:
+      config[0] = 0;
+      config[1] = ADC_SMPR2_SMP_AN8(ADC_SAMPLE_1P5)
+		| ADC_SMPR2_SMP_AN9(ADC_SAMPLE_1P5);
+      config[3] = ADC_SQR3_SQ1_N(ADC_CHANNEL_IN8)
+		| ADC_SQR3_SQ2_N(ADC_CHANNEL_IN9);
+      break;
+
    case BOARD_ID_CQ_STARM:
    case BOARD_ID_FST_01_00:
    case BOARD_ID_MAPLE_MINI:
    case BOARD_ID_STM32_PRIMER2:
    case BOARD_ID_STM8S_DISCOVERY:
    case BOARD_ID_ST_DONGLE:
-    case BOARD_ID_ST_NUCLEO_F103:
    case BOARD_ID_NITROKEY_START:
+    case BOARD_ID_FST_01SZ:
    default:
      config[0] = 0;
      config[1] = ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5)
@@ -202,24 +218,26 @@ adc_start (void)

  RCC->APB2ENR |= (RCC_APB2ENR_ADC1EN | RCC_APB2ENR_ADC2EN);

-  ADC1->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0
-	       | ADC_CR1_SCAN);
-  ADC1->CR2 = (ADC_CR2_TSVREFE | ADC_CR2_EXTTRIG | ADC_CR2_SWSTART
-	       | ADC_CR2_EXTSEL | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON);
  ADC1->SMPR1 = NEUG_ADC_SETTING1_SMPR1;
  ADC1->SMPR2 = NEUG_ADC_SETTING1_SMPR2;
  ADC1->SQR1 = ADC_SQR1_NUM_CH(NEUG_ADC_SETTING1_NUM_CHANNELS);
  ADC1->SQR2 = 0;
  ADC1->SQR3 = NEUG_ADC_SETTING1_SQR3;
-
-  ADC2->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0
+  ADC1->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0
 	       | ADC_CR1_SCAN);
-  ADC2->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_CONT | ADC_CR2_ADON;
+  ADC1->CR2 = (ADC_CR2_TSVREFE | ADC_CR2_EXTTRIG | ADC_CR2_SWSTART
+	       | ADC_CR2_EXTSEL | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON);
+  chopstx_usec_wait (1000);
+
  ADC2->SMPR1 = config[0];
  ADC2->SMPR2 = config[1];
  ADC2->SQR1 = config[2];
  ADC2->SQR2 = 0;
  ADC2->SQR3 = config[3];
+  ADC2->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0
+	       | ADC_CR1_SCAN);
+  ADC2->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_CONT | ADC_CR2_ADON;
+  chopstx_usec_wait (1000);

 #ifdef DELIBARATELY_DO_IT_WRONG_START_STOP
  /*
@@ -298,11 +316,10 @@ int
 adc_wait_completion (void)
 {
  uint32_t flags;
-  struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr };

  while (1)
    {
-      chopstx_poll (NULL, 1, pd_array);
+      chopstx_intr_wait (&adc_intr);
      flags = DMA1->ISR & STM32_DMA_ISR_MASK; /* Channel 1 interrupt cause.  */
      /*
       * Clear interrupt cause of channel 1.
@@ -311,6 +328,7 @@ adc_wait_completion (void)
       * and TEIF.
       */
      DMA1->IFCR = (flags & ~1);
+      chopstx_intr_done (&adc_intr);

      if ((flags & STM32_DMA_ISR_TEIF) != 0)  /* DMA errors  */
 	{
--- a/contrib/spi-st.c
+++ b/contrib/spi-st.c
@@ -0,0 +1,207 @@
+/*
+ * spi-st.c - SPI driver for STM32F103/GD32F103/GD32VF103
+ *
+ * Copyright (C) 2019  Flying Stone Technology
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+#include <mcu/stm32.h>
+
+#ifndef SPI_USE_INTERRUPT
+#define SPI_BUSY_WAIT 1
+#endif
+
+/* Hardware registers */
+struct SPI {
+  volatile uint32_t CR1;
+  volatile uint32_t CR2;
+  volatile uint32_t SR;
+  volatile uint32_t DR;
+  volatile uint32_t CRCPR;
+  volatile uint32_t RXCRCR;
+  volatile uint32_t TXCRCR;
+};
+
+/* It is named SPI0 in GD32VF103, while it's "SPI1" in RM0008 of STM32F103 */
+#define SPI0_BASE           (APB2PERIPH_BASE + 0x3000)
+#define SPI0 ((struct SPI *)SPI0_BASE)
+
+#define INTR_REQ_SPI0 54        /* For GD32VF103 */
+
+static struct SPI *SPIx = SPI0;
+#ifndef SPI_BUSY_WAIT
+static struct chx_intr spi_intr;
+#endif
+static int tx_ready;
+static int rx_done;
+
+/*
+ * For now, it only support configuration of a specific use case:
+ *
+ *     SPI0 of GD32VF103
+ *     Master mode
+ *     Hardware NSS pin not used
+ *     Two unidirectional lines, full duplex
+ *     CRC enabled
+ *     8-bit data frame
+ *     MSBit first
+ *     Clock polarity: High==idle 
+ *
+ * We need to consider what kind of configuration can be specified
+ * by the API.  Perhaps, it should return an error code when it is
+ * not supported by the hardware.
+ */
+
+int
+spi_init (void)
+{
+  uint32_t cr1_reg = 0;
+
+  /* Enable SPI module */
+  RCC->APB2ENR |= (1 << 12);
+  RCC->APB2RSTR = (1 << 12);
+  RCC->APB2RSTR = 0;
+
+  /* Master mode */
+  cr1_reg |= (1 << 2);          /* In RM0008, it's called MSTR */
+
+  /* No use of hardware NSS pin */
+  cr1_reg |= (1 << 9);          /* In RM0008, it's called SSM */
+  cr1_reg |= (1 << 8);          /* In RM0008, it's called SSI */
+
+  /* Two unidirectional lines, full duplex: Bit15=0, Bit14=0, Bit10=0 */
+  /* Bit11: data-frame-format: 8-bit 0 (16-bit (1<<11)) */
+  /* But7:  bit-order: MSB first 0, LSB first (1<<7)  */
+
+  /* Enable CRC */
+  cr1_reg |= (1 << 13);
+
+  cr1_reg |= (0x02 << 3);            /* prescaler: fPCLK/8 */
+  cr1_reg |= (1 << 1);               /* clock polarity 1==idle */
+  cr1_reg |= (1 << 0);               /* second clock data capture edge */
+  cr1_reg |= (1 << 6);               /* SPI enable */
+
+  SPIx->CR1 = cr1_reg;
+
+  /* Don't touch CRCPR: Just use reset default value of 7 */
+  /* Don't touch I2SCFGR, I2SPR */
+
+
+#ifndef SPI_BUSY_WAIT
+  chopstx_claim_irq (&spi_intr, INTR_REQ_SPI0);
+  /* Enable notification for Tx empty, Rx done, or Error */
+  SPIx->CR2 = (1 << 7) | (1 << 6) | (1 << 5);
+#endif
+
+  tx_ready = 0;
+  rx_done = 0;
+
+  return 0;
+}
+
+static void
+clear_crc_err (void)
+{
+  SPIx->SR &= ~(1 << 4);
+}
+
+static void
+put_data (uint16_t data)
+{
+  tx_ready = 0;
+  rx_done = 0;
+  SPIx->DR = (uint32_t)data;
+}
+
+static uint16_t
+get_data (void)
+{
+  return ((uint16_t)SPIx->DR);
+}
+
+
+#define CHECK_TX 0
+#define CHECK_RX 1
+
+static void
+check_transmit (int for_what)
+{
+  for (;;)
+    {
+      uint16_t status;
+
+      if (for_what == CHECK_TX && tx_ready)
+	return;
+
+      if (for_what == CHECK_RX && rx_done)
+	return;
+
+#ifndef SPI_BUSY_WAIT
+      /* Wait an event */
+      chopstx_intr_wait (&spi_intr);
+#endif
+
+      status = SPIx->SR;
+
+      if ((status & (1 << 0)))
+	rx_done = 1;
+
+      if ((status & (1 << 1)))
+	tx_ready = 1;
+
+      if ((status & (1 << 4)))
+	{
+	  /*FIXME: stat crc_err_count++ */
+	  clear_crc_err ();
+	}
+
+#if 0
+      /*FIXME: stat err_count++ */
+      if ((status & 0x00fc))
+	{
+	}
+#endif
+
+#ifndef SPI_BUSY_WAIT
+      chopstx_intr_done (&spi_intr);
+#endif
+    }
+}
+
+void
+spi_send (uint16_t data)
+{
+  check_transmit (CHECK_TX);
+  put_data (data);
+}
+
+uint16_t
+spi_recv (void)
+{
+  check_transmit (CHECK_RX);
+  return get_data ();
+}
--- a/contrib/spi.h
+++ b/contrib/spi.h
@@ -0,0 +1,3 @@
+int spi_init (void);
+void spi_send (uint16_t data);
+uint16_t spi_recv (void);
--- a/contrib/usart-common-f103.c
+++ b/contrib/usart-common-f103.c
@@ -0,0 +1,386 @@
+static void
+usart_config_recv_enable (struct USART *USARTx, int on)
+{
+  if (on)
+    USARTx->CR1 |= USART_CR1_RE;
+  else
+    USARTx->CR1 &= ~USART_CR1_RE;
+}
+
+
+int
+usart_config (uint8_t dev_no, uint32_t config_bits)
+{
+  struct USART *USARTx = get_usart_dev (dev_no);
+  uint8_t baud_spec = (config_bits & MASK_BAUD);
+  int i;
+  uint32_t cr1_config = (USART_CR1_UE | USART_CR1_RXNEIE | USART_CR1_TE);
+				/* TXEIE/TCIE will be enabled when
+				   putting char */
+				/* No CTSIE, PEIE, IDLEIE, LBDIE */
+  if (USARTx == NULL)
+    return -1;
+
+  /* Disable USART before configure.  */
+  USARTx->CR1 &= ~USART_CR1_UE;
+
+  if (((config_bits & MASK_CS) == CS7 && (config_bits & PARENB))
+      || ((config_bits & MASK_CS) == CS8 && (config_bits & PARENB) == 0))
+    cr1_config &= ~USART_CR1_M;
+  else if ((config_bits & MASK_CS) == CS8)
+    cr1_config |=  USART_CR1_M;
+  else
+    return -1;
+
+  if ((config_bits & PARENB) == 0)
+    cr1_config &= ~(USART_CR1_PCE | USART_CR1_PEIE);
+  else
+    cr1_config |=  (USART_CR1_PCE | USART_CR1_PEIE);
+
+  if ((config_bits & PARODD) == 0)
+    cr1_config &= ~USART_CR1_PS;
+  else
+    cr1_config |=  USART_CR1_PS;
+
+  if ((config_bits & MASK_STOP) == STOP0B5)
+    USARTx->CR2 = (0x1 << 12);
+  else if ((config_bits & MASK_STOP) == STOP1B)
+    USARTx->CR2 = (0x0 << 12);
+  else if ((config_bits & MASK_STOP) == STOP1B5)
+    USARTx->CR2 = (0x3 << 12);
+  else /* if ((config_bits & MASK_STOP) == STOP2B) */
+    USARTx->CR2 = (0x2 << 12);
+
+  for (i = 0; i < NUM_BAUD; i++)
+    if (brr_table[i].baud_spec == baud_spec)
+      break;
+
+  if (i >= NUM_BAUD)
+    return -1;
+
+  USARTx->BRR = brr_table[i].brr_value;
+
+  if ((config_bits & MASK_FLOW))
+    USARTx->CR3 = USART_CR3_CTSE | USART_CR3_RTSE;
+  else
+    USARTx->CR3 = 0;
+
+  if (!(config_bits & MASK_MODE))
+    cr1_config |= USART_CR1_RE;
+
+  USARTx->CR1 = cr1_config;
+
+  /* SCEN (smartcard enable) should be set _after_ CR1.  */
+  if ((config_bits & MASK_MODE))
+    {
+      if ((config_bits & MASK_MODE) == MODE_SMARTCARD)
+	{
+	  USARTx->GTPR = (1 << 8) | 5;
+	  USARTx->CR3 |= (USART_CR3_SCEN | USART_CR3_NACK);
+	}
+      else if ((config_bits & MASK_MODE) == MODE_IRDA)
+	USARTx->CR3 |= (1 << 1);
+      else if ((config_bits & MASK_MODE) == MODE_IRDA_LP)
+	USARTx->CR3 |= (1 << 2) | (1 << 1);
+    }
+
+  return 0;
+}
+
+
+void
+usart_init0 (int (*cb) (uint8_t dev_no, uint16_t notify_bits))
+{
+  int i;
+
+  ss_notify_callback = cb;
+
+  for (i = 0; i < NUM_USART; i++)
+    {
+      if (usart_array[i].stat)
+	usart_array[i].stat->dev_no = i + USART_DEVNO_START;
+      chopstx_claim_irq (usart_array[i].intr, usart_array[i].irq_num);
+    }
+
+  usart_rcc_setup ();
+}
+
+#define UART_STATE_BITMAP_RX_CARRIER (1 << 0)
+#define UART_STATE_BITMAP_TX_CARRIER (1 << 1)
+#define UART_STATE_BITMAP_BREAK      (1 << 2)
+#define UART_STATE_BITMAP_RINGSIGNAL (1 << 3)
+#define UART_STATE_BITMAP_FRAMING    (1 << 4)
+#define UART_STATE_BITMAP_PARITY     (1 << 5)
+#define UART_STATE_BITMAP_OVERRUN    (1 << 6)
+
+static int
+handle_intr (struct USART *USARTx, struct rb *rb2a, struct usart_stat *stat)
+{
+  int tx_ready = 0;
+  uint32_t r = USARTx->SR;
+  int notify_bits = 0;
+  int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
+
+  if (smartcard_mode)
+    {
+      if ((r & USART_SR_TC))
+	{
+	  tx_ready = 1;
+	  USARTx->CR1 &= ~USART_CR1_TCIE;
+	}
+    }
+  else
+    {
+      if ((r & USART_SR_TXE))
+	{
+	  tx_ready = 1;
+	  USARTx->CR1 &= ~USART_CR1_TXEIE;
+	}
+    }
+
+  if ((r & USART_SR_RXNE))
+    {
+      uint32_t data = USARTx->DR;
+
+      /* DR register should be accessed even if data is not used.
+       * Its read-access has side effect of clearing error flags.
+       */
+      asm volatile ("" : : "r" (data) : "memory");
+
+      if ((r & USART_SR_NE))
+	stat->err_rx_noise++;
+      else if ((r & USART_SR_FE))
+	{
+	  /* NOTE: Noway to distinguish framing error and break  */
+
+	  stat->rx_break++;
+	  notify_bits |= UART_STATE_BITMAP_BREAK;
+	}
+      else if ((r & USART_SR_PE))
+	{
+	  stat->err_rx_parity++;
+	  notify_bits |= UART_STATE_BITMAP_PARITY;
+	}
+      else
+	{
+	  if ((r & USART_SR_ORE))
+	    {
+	      stat->err_rx_overrun++;
+	      notify_bits |= UART_STATE_BITMAP_OVERRUN;
+	    }
+
+	  /* XXX: if CS is 7-bit, mask it, or else parity bit in upper layer */
+	  if (rb_ll_put (rb2a, (data & 0xff)) < 0)
+	    stat->err_rx_overflow++;
+	  else
+	    stat->rx++;
+	}
+    }
+  else if ((r & USART_SR_ORE))
+    {				/* Clear ORE */
+      uint32_t data = USARTx->DR;
+      asm volatile ("" : : "r" (data) : "memory");
+      stat->err_rx_overrun++;
+      notify_bits |= UART_STATE_BITMAP_OVERRUN;
+    }
+
+  if (notify_bits)
+    {
+      if (ss_notify_callback
+	  && (*ss_notify_callback) (stat->dev_no, notify_bits))
+	stat->err_notify_overflow++;
+    }
+
+  return tx_ready;
+}
+
+static int
+handle_tx (struct USART *USARTx, struct rb *rb2h, struct usart_stat *stat)
+{
+  int tx_ready = 1;
+  int c = rb_ll_get (rb2h);
+
+  if (c >= 0)
+    {
+      uint32_t r;
+      int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
+
+      USARTx->DR = (c & 0xff);
+      stat->tx++;
+      r = USARTx->SR;
+      if (smartcard_mode)
+	{
+	  if ((r & USART_SR_TC) == 0)
+	    {
+	      tx_ready = 0;
+	      USARTx->CR1 |= USART_CR1_TCIE;
+	    }
+	}
+      else
+	{
+	  if ((r & USART_SR_TXE) == 0)
+	    {
+	      tx_ready = 0;
+	      USARTx->CR1 |= USART_CR1_TXEIE;
+	    }
+	}
+    }
+
+  return tx_ready;
+}
+
+int
+usart_send_break (uint8_t dev_no)
+{
+  struct USART *USARTx = get_usart_dev (dev_no);
+  if (USARTx == NULL)
+    return -1;
+
+  if ((USARTx->CR1 & 0x01))
+    return 1;	/* Busy sending break, which was requested before.  */
+
+  USARTx->CR1 |= 0x01;
+  return 0;
+}
+
+int
+usart_block_sendrecv (uint8_t dev_no, const char *s_buf, uint16_t s_buflen,
+		      char *r_buf, uint16_t r_buflen,
+		      uint32_t *timeout_block_p, uint32_t timeout_char)
+{
+  uint32_t timeout;
+  uint8_t *p;
+  int len;
+  uint32_t r;
+  uint32_t data;
+  struct USART *USARTx = get_usart_dev (dev_no);
+  int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
+  struct chx_intr *usartx_intr = get_usart_intr (dev_no);
+  struct chx_poll_head *ph[1];
+
+  if (usartx_intr == NULL)
+    return -1;
+
+  ph[0] = (struct chx_poll_head *)usartx_intr;
+
+  p = (uint8_t *)s_buf;
+  if (p)
+    {
+      if (smartcard_mode)
+	usart_config_recv_enable (USARTx, 0);
+
+      USARTx->CR1 |= USART_CR1_TXEIE;
+
+      /* Sending part */
+      while (1)
+	{
+	  chopstx_poll (NULL, 1, ph);
+
+	  r = USARTx->SR;
+
+	  /* Here, ignore recv error(s).  */
+	  if ((r & USART_SR_RXNE) || (r & USART_SR_ORE))
+	    {
+	      data = USARTx->DR;
+	      asm volatile ("" : : "r" (data) : "memory");
+	    }
+
+	  if ((r & USART_SR_TXE))
+	    {
+	      if (s_buflen == 0)
+		break;
+	      else
+		{
+		  /* Keep TXEIE bit */
+		  USARTx->DR = *p++;
+		  s_buflen--;
+		}
+	    }
+
+	  chopstx_intr_done (usartx_intr);
+	}
+
+      USARTx->CR1 &= ~USART_CR1_TXEIE;
+      if (smartcard_mode)
+	{
+	  if (timeout_block_p && (*timeout_block_p))
+	    do
+	      r = USARTx->SR;
+	    while (((r & USART_SR_TC) == 0));
+
+	  usart_config_recv_enable (USARTx, 1);
+
+	  if (timeout_block_p && *timeout_block_p == 0)
+	    {
+	      /* Ignoring the echo back.  */
+	      do
+		r = USARTx->SR;
+	      while (((r & USART_SR_TC) == 0));
+
+	      if ((r & USART_SR_RXNE))
+		{
+		  data = USARTx->DR;
+		  asm volatile ("" : : "r" (data) : "memory");
+		}
+
+	      *timeout_block_p = timeout_char;
+	    }
+	}
+
+      chopstx_intr_done (usartx_intr);
+    }
+
+  if (r_buf == NULL)
+    return 0;
+
+  if (!p)
+    if (smartcard_mode)
+      usart_config_recv_enable (USARTx, 1);
+
+  /* Receiving part */
+  r = chopstx_poll (timeout_block_p, 1, ph);
+  if (r == 0)
+    return 0;
+
+  p = (uint8_t *)r_buf;
+  len = 0;
+
+  while (1)
+    {
+      r = USARTx->SR;
+
+      data = USARTx->DR;
+      asm volatile ("" : : "r" (data) : "memory");
+
+      if ((r & USART_SR_RXNE))
+	{
+	  if ((r & USART_SR_NE) || (r & USART_SR_FE) || (r & USART_SR_PE))
+	    /* ignore error, for now.  XXX: ss_notify */
+	    ;
+	  else
+	    {
+	      *p++ = (data & 0xff);
+	      len++;
+	      r_buflen--;
+	      if (r_buflen == 0)
+		{
+		  chopstx_intr_done (usartx_intr);
+		  break;
+		}
+	    }
+	}
+      else if ((r & USART_SR_ORE))
+	{
+	  data = USARTx->DR;
+	  asm volatile ("" : : "r" (data) : "memory");
+	}
+
+      chopstx_intr_done (usartx_intr);
+      timeout = timeout_char;
+      r = chopstx_poll (&timeout, 1, ph);
+      if (r == 0)
+	break;
+    }
+
+  return len;
+}
--- a/contrib/usart-common.c
+++ b/contrib/usart-common.c
@@ -0,0 +1,448 @@
+static void *usart_main (void *arg);
+
+/*
+ * Ring buffer
+ */
+#define MAX_RB_BUF 1024
+
+struct rb {
+  uint8_t *buf;
+  chopstx_mutex_t m;
+  chopstx_cond_t data_available;
+  chopstx_cond_t space_available;
+  uint32_t head  :10;
+  uint32_t tail  :10;
+  uint32_t size  :10;
+  uint32_t full  : 1;
+  uint32_t empty : 1;
+};
+/* full && empty -> data is consumed fully */
+
+/*
+ * Note: size = 1024 can still work, regardless of the limit of 10-bit.
+ */
+static void
+rb_init (struct rb *rb, uint8_t *p, uint16_t size)
+{
+  rb->buf = p;
+  rb->size = size;
+  chopstx_mutex_init (&rb->m);
+  chopstx_cond_init (&rb->data_available);
+  chopstx_cond_init (&rb->space_available);
+  rb->head = rb->tail = 0;
+  rb->full = 0;
+  rb->empty = 1;
+}
+
+static void
+rb_add (struct rb *rb, uint8_t v)
+{
+  rb->buf[rb->tail++] = v;
+  if (rb->tail == rb->size)
+    rb->tail = 0;
+  if (rb->tail == rb->head)
+    rb->full = 1;
+  else
+    rb->full = 0;
+  rb->empty = 0;
+}
+
+static uint8_t
+rb_del (struct rb *rb)
+{
+  uint32_t v = rb->buf[rb->head++];
+
+  if (rb->head == rb->size)
+    rb->head = 0;
+  if (rb->head == rb->tail)
+    rb->empty = 1;
+  rb->full = 0;
+
+  return v;
+}
+
+/*
+ * Application: consumer
+ * Hardware:    generator
+ */
+static int
+rb_ll_put (struct rb *rb, uint8_t v)
+{
+  int r;
+
+  chopstx_mutex_lock (&rb->m);
+  if (rb->full && !rb->empty)
+    r = -1;
+  else
+    {
+      r = 0;
+      rb_add (rb, v);
+      chopstx_cond_signal (&rb->data_available);
+    }
+  chopstx_mutex_unlock (&rb->m);
+  return r;
+}
+
+/*
+ * Application: generator
+ * Hardware:    consumer
+ */
+static int
+rb_ll_get (struct rb *rb)
+{
+  int r;
+
+  chopstx_mutex_lock (&rb->m);
+  if (rb->empty)
+    {
+      if (!rb->full)
+	rb->full = 1;
+      r = -1;
+    }
+  else
+    r = rb_del (rb);
+  chopstx_cond_signal (&rb->space_available);
+  chopstx_mutex_unlock (&rb->m);
+  return r;
+}
+
+static void
+rb_ll_flush (struct rb *rb)
+{
+  chopstx_mutex_lock (&rb->m);
+  while (!rb->empty)
+    rb_del (rb);
+  chopstx_cond_signal (&rb->space_available);
+  chopstx_mutex_unlock (&rb->m);
+}
+
+/*
+ * Application: consumer
+ * Hardware:    generator
+ */
+static int
+rb_read (struct rb *rb, uint8_t *buf, uint16_t buflen)
+{
+  int i = 0;
+
+  chopstx_mutex_lock (&rb->m);
+  while (rb->empty)
+    chopstx_cond_wait (&rb->data_available, &rb->m);
+
+  while (i < buflen)
+    {
+      buf[i++] = rb_del (rb);
+      if (rb->empty)
+	break;
+    }
+  chopstx_cond_signal (&rb->space_available);
+  chopstx_mutex_unlock (&rb->m);
+
+  return i;
+}
+
+/*
+ * Application: generator
+ * Hardware:    consumer
+ */
+static void
+rb_write (struct rb *rb, uint8_t *buf, uint16_t buflen)
+{
+  int i = 0;
+
+  chopstx_mutex_lock (&rb->m);
+
+  do
+    {
+      while (rb->full && !rb->empty)
+	chopstx_cond_wait (&rb->space_available, &rb->m);
+
+      while (i < buflen)
+	{
+	  rb_add (rb, buf[i++]);
+	  if (rb->full)
+	    {
+	      chopstx_cond_signal (&rb->data_available);
+	      break;
+	    }
+	}
+    }
+  while (i < buflen);
+
+  if (i)
+    chopstx_cond_signal (&rb->data_available);
+  chopstx_mutex_unlock (&rb->m);
+}
+
+static int
+rb_empty_check (void *arg)
+{
+  struct rb *rb = arg;
+  return rb->empty == 0;
+}
+
+/* Can be used two ways:
+ *
+ *   When the ring buffer is rb_a2h:
+ *     Hardware-side polling if data is available from application.
+ *
+ *   When the ring buffer is rb_h2a:
+ *     Application-side polling if data is available from hardware.
+ */
+static void
+rb_get_prepare_poll (struct rb *rb, chopstx_poll_cond_t *poll_desc)
+{
+  poll_desc->type  = CHOPSTX_POLL_COND;
+  poll_desc->ready = 0;
+  poll_desc->cond  = &rb->data_available;
+  poll_desc->mutex = &rb->m;
+  poll_desc->check = rb_empty_check;
+  poll_desc->arg   = rb;
+}
+
+const struct usart_stat *
+usart_stat (uint8_t dev_no)
+{
+#if USART_DEVNO_START
+  if (dev_no < USART_DEVNO_START)
+    return NULL;
+#endif
+  if (dev_no > USART_DEVNO_END)
+    return NULL;
+  return usart_array[dev_no - USART_DEVNO_START].stat;
+}
+
+static struct USART *
+get_usart_dev (uint8_t dev_no)
+{
+#if USART_DEVNO_START
+  if (dev_no < USART_DEVNO_START)
+    return NULL;
+#endif
+  if (dev_no > USART_DEVNO_END)
+    return NULL;
+  return usart_array[dev_no - USART_DEVNO_START].USART;
+}
+
+static struct rb *
+get_usart_rb_h2a (uint8_t dev_no)
+{
+#if USART_DEVNO_START
+  if (dev_no < USART_DEVNO_START)
+    return NULL;
+#endif
+  if (dev_no > USART_DEVNO_END)
+    return NULL;
+  return usart_array[dev_no - USART_DEVNO_START].rb_h2a;
+}
+
+static struct rb *
+get_usart_rb_a2h (uint8_t dev_no)
+{
+#if USART_DEVNO_START
+  if (dev_no < USART_DEVNO_START)
+    return NULL;
+#endif
+  if (dev_no > USART_DEVNO_END)
+    return NULL;
+  return usart_array[dev_no - USART_DEVNO_START].rb_a2h;
+}
+
+static struct chx_intr *
+get_usart_intr (uint8_t dev_no)
+{
+#if USART_DEVNO_START
+  if (dev_no < USART_DEVNO_START)
+    return NULL;
+#endif
+  if (dev_no > USART_DEVNO_END)
+    return NULL;
+  return usart_array[dev_no - USART_DEVNO_START].intr;
+}
+
+void
+usart_init (uint16_t prio, uintptr_t stack_addr, size_t stack_size,
+	    int (*cb) (uint8_t dev_no, uint16_t notify_bits))
+{
+  usart_init0 (cb);
+  chopstx_create (prio, stack_addr, stack_size, usart_main, NULL);
+}
+
+static int (*ss_notify_callback) (uint8_t dev_no, uint16_t notify_bits);
+
+static struct chx_poll_head *usart_poll[NUM_USART*2];
+
+static void *
+usart_main (void *arg)
+{
+  int i;
+
+  (void)arg;
+
+  for (i = 0; i < NUM_USART; i++)
+    if (usart_array[i].tx_ready)
+      {
+	*usart_array[i].tx_ready = 1;
+	rb_init (usart_array[i].rb_a2h, usart_array[i].buf_a2h, BUF_A2H_SIZE);
+	rb_init (usart_array[i].rb_h2a, usart_array[i].buf_h2a, BUF_H2A_SIZE);
+	rb_get_prepare_poll (usart_array[i].rb_a2h, usart_array[i].app_write_event);
+      }
+
+  while (1)
+    {
+      int n = 0;
+
+      for (i = 0; i < NUM_USART; i++)
+	if (usart_array[i].tx_ready)
+	  {
+	    usart_poll[n++] = (struct chx_poll_head *)usart_array[i].intr;
+	    if (*usart_array[i].tx_ready)
+	      usart_poll[n++] = (struct chx_poll_head *)usart_array[i].app_write_event;
+	    else
+	      usart_array[i].app_write_event->ready = 0;
+	  }
+
+      chopstx_poll (NULL, n, usart_poll);
+
+      for (i = 0; i < NUM_USART; i++)
+	if (usart_array[i].tx_ready)
+	  {
+	    int tx_done = 0;
+
+	    if (usart_array[i].intr->ready)
+	      {
+		tx_done = handle_intr (usart_array[i].USART,
+				       usart_array[i].rb_h2a, usart_array[i].stat);
+		*usart_array[i].tx_ready |= tx_done;
+		chopstx_intr_done (usart_array[i].intr);
+	      }
+
+	    if (tx_done || (*usart_array[i].tx_ready
+			    && usart_array[i].app_write_event->ready))
+	      *usart_array[i].tx_ready = handle_tx (usart_array[i].USART,
+						    usart_array[i].rb_a2h, usart_array[i].stat);
+	  }
+    }
+
+  return NULL;
+}
+
+int
+usart_read (uint8_t dev_no, char *buf, uint16_t buflen)
+{
+  struct rb *rb = get_usart_rb_h2a (dev_no);
+
+  if (rb == NULL)
+    return -1;
+
+  if (buf == NULL && buflen == 0)
+    {
+      rb_ll_flush (rb);
+      return 0;
+    }
+  else
+    return rb_read (rb, (uint8_t *)buf, buflen);
+}
+
+void
+usart_read_prepare_poll (uint8_t dev_no, chopstx_poll_cond_t *poll_desc)
+{
+  struct rb *rb = get_usart_rb_h2a (dev_no);
+
+  if (rb == NULL)
+    return;
+
+  rb_get_prepare_poll (rb, poll_desc);
+}
+
+int
+usart_read_ext (uint8_t dev_no, char *buf, uint16_t buflen, uint32_t *timeout_p)
+{
+  chopstx_poll_cond_t poll_desc;
+  struct chx_poll_head *ph[] = { (struct chx_poll_head *)&poll_desc };
+  int r;
+  struct rb *rb = get_usart_rb_h2a (dev_no);
+
+  if (rb == NULL)
+    return -1;
+
+  rb_get_prepare_poll (rb, &poll_desc);
+  r = chopstx_poll (timeout_p, 1, ph);
+  if (r == 0)
+    return 0;
+  else
+    return rb_read (rb, (uint8_t *)buf, buflen);
+}
+
+static void
+usart_wait_write_completion (struct rb *rb)
+{
+  chopstx_mutex_lock (&rb->m);
+  while (!(rb->empty && rb->full))
+    chopstx_cond_wait (&rb->space_available, &rb->m);
+  chopstx_mutex_unlock (&rb->m);
+}
+
+int
+usart_write (uint8_t dev_no, char *buf, uint16_t buflen)
+{
+  struct rb *rb = get_usart_rb_a2h (dev_no);
+
+  if (rb == NULL)
+    return -1;
+
+  if (buf == NULL && buflen == 0)
+    rb_ll_flush (rb);
+  else
+    {
+      struct USART *USARTx = get_usart_dev (dev_no);
+      int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
+
+      if (smartcard_mode)
+	usart_config_recv_enable (USARTx, 0);
+
+      rb_write (rb, (uint8_t *)buf, buflen);
+
+      if (smartcard_mode)
+	{
+	  usart_wait_write_completion (rb);
+	  usart_config_recv_enable (USARTx, 1);
+	}
+    }
+
+  return 0;
+}
+
+
+int
+usart_config_baud (uint8_t dev_no, uint8_t baud_spec)
+{
+  struct USART *USARTx = get_usart_dev (dev_no);
+  uint32_t save_bits;
+  int i;
+
+  for (i = 0; i < NUM_BAUD; i++)
+    if (brr_table[i].baud_spec == baud_spec)
+      break;
+
+  if (i >= NUM_BAUD)
+    return -1;
+
+  save_bits = USARTx->CR1 & (USART_CR1_TE | USART_CR1_RE);
+  USARTx->CR1 &= ~(USART_CR1_TE | USART_CR1_RE | USART_CR1_UE);
+  USARTx->BRR = brr_table[i].brr_value;
+  USARTx->CR1 |= (save_bits | USART_CR1_UE);
+  return 0;
+}
+
+
+void
+usart_config_clken (uint8_t dev_no, int on)
+{
+  struct USART *USARTx = get_usart_dev (dev_no);
+
+  if (on)
+    USARTx->CR2 |= (1 << 11);
+  else
+    USARTx->CR2 &= ~(1 << 11);
+}
--- a/contrib/usart-gd32vf103.c
+++ b/contrib/usart-gd32vf103.c
@@ -0,0 +1,101 @@
+/*
+ * usart-gd32vf103.c - USART driver for GD32VF103 (USART0)
+ *
+ * Copyright (C) 2017, 2019  g10 Code GmbH
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+#include <mcu/stm32.h>
+#include <contrib/usart.h>
+#include <contrib/usart-impl.h>
+#include <contrib/usart-impl-f103.h>
+
+#define USART0_BASE           (APB2PERIPH_BASE + 0x3800)
+#define USART0 ((struct USART *)USART0_BASE)
+
+static struct usart_stat usart0_stat;
+
+static struct chx_intr usart0_intr;
+
+#define BUF_A2H_SIZE 256
+#define BUF_H2A_SIZE 512
+static uint8_t buf_usart0_rb_a2h[BUF_A2H_SIZE];
+static uint8_t buf_usart0_rb_h2a[BUF_H2A_SIZE];
+
+static struct rb usart0_rb_a2h;
+static struct rb usart0_rb_h2a;
+
+static chopstx_poll_cond_t usart0_app_write_event;
+
+/* Global variables so that it can be easier to debug.  */
+static int usart0_tx_ready;
+
+#define INTR_REQ_USART0 56
+
+#define USART_DEVNO_START 0
+#define USART_DEVNO_END 0
+
+static const struct usart usart_array[] =
+  {
+   { USART0, &usart0_intr, INTR_REQ_USART0,
+     &usart0_stat, &usart0_rb_a2h, &usart0_rb_h2a, buf_usart0_rb_a2h,
+     buf_usart0_rb_h2a, &usart0_app_write_event, &usart0_tx_ready },
+  };
+
+/* It's 96MHz f_PCLK */
+static const struct brr_setting brr_table[] = {
+  /* Can't be represented in 16-bit { B600,    (10000 << 4)}, */
+  /* Can't be represented in 16-bit { B1200,   (5000 << 4)},  */
+  { B2400,   ( 2500 << 4)|0},
+  { B9600,   (  625 << 4)|0},
+  { B19200,  (  312 << 4)|8},
+  { B57600,  (  104 << 4)|3},
+  { B115200, (   52 << 4)|1},
+  { B230400, (   26 << 4)|0},
+  { B460800, (   13 << 4)|0},
+  { B921600, (    6 << 4)|8},
+  { BSCARD1,  ( 620 << 4)|0},	/*   9677 */
+  { BSCARD2,  ( 310 << 4)|0},	/*  19354 */
+  { BSCARD4,  ( 155 << 4)|0},	/*  38709 */
+  { BSCARD8,  (  77 << 4)|8},	/*  77419 */
+  { BSCARD12, (  51 << 4)|11},	/* 116129 */
+  { BSCARD16, (  38 << 4)|13},	/* 154506 */
+  { BSCARD20, (  31 << 4)|0},	/* 193548 */
+};
+
+#include "usart-common.c"
+
+static void
+usart_rcc_setup (void)
+{
+  /* Enable USART0 clock, and strobe reset.  */
+  RCC->APB2ENR |= (1 << 14);
+  RCC->APB2RSTR = (1 << 14);
+  RCC->APB2RSTR = 0;
+}
+
+#include "usart-common-f103.c"
--- a/contrib/usart-impl-f103.h
+++ b/contrib/usart-impl-f103.h
@@ -0,0 +1,42 @@
+/* Hardware registers */
+struct USART {
+  volatile uint32_t SR;
+  volatile uint32_t DR;
+  volatile uint32_t BRR;
+  volatile uint32_t CR1;
+  volatile uint32_t CR2;
+  volatile uint32_t CR3;
+  volatile uint32_t GTPR;
+};
+
+#define USART_SR_CTS	(1 << 9)
+#define USART_SR_LBD	(1 << 8)
+#define USART_SR_TXE	(1 << 7)
+#define USART_SR_TC	(1 << 6)
+#define USART_SR_RXNE	(1 << 5)
+#define USART_SR_IDLE	(1 << 4)
+#define USART_SR_ORE	(1 << 3)
+#define USART_SR_NE	(1 << 2)
+#define USART_SR_FE	(1 << 1)
+#define USART_SR_PE	(1 << 0)
+
+
+#define USART_CR1_UE		(1 << 13)
+#define USART_CR1_M		(1 << 12)
+#define USART_CR1_WAKE		(1 << 11)
+#define USART_CR1_PCE		(1 << 10)
+#define USART_CR1_PS		(1 <<  9)
+#define USART_CR1_PEIE		(1 <<  8)
+#define USART_CR1_TXEIE		(1 <<  7)
+#define USART_CR1_TCIE		(1 <<  6)
+#define USART_CR1_RXNEIE	(1 <<  5)
+#define USART_CR1_IDLEIE	(1 <<  4)
+#define USART_CR1_TE		(1 <<  3)
+#define USART_CR1_RE		(1 <<  2)
+#define USART_CR1_RWU		(1 <<  1)
+#define USART_CR1_SBK		(1 <<  0)
+
+#define USART_CR3_CTSE		(1 <<  9)
+#define USART_CR3_RTSE		(1 <<  8)
+#define USART_CR3_SCEN		(1 <<  5)
+#define USART_CR3_NACK		(1 <<  4)
--- a/contrib/usart-impl.h
+++ b/contrib/usart-impl.h
@@ -0,0 +1,25 @@
+struct usart {
+  struct USART *USART;
+  struct chx_intr *intr;
+  uint8_t irq_num;
+  struct usart_stat *stat;
+  struct rb *rb_a2h;
+  struct rb *rb_h2a;
+  uint8_t *buf_a2h;
+  uint8_t *buf_h2a;
+  chopstx_poll_cond_t *app_write_event;
+  int *tx_ready;
+};
+
+
+static int handle_intr (struct USART *USARTx, struct rb *rb2a, struct usart_stat *stat);
+static int handle_tx (struct USART *USARTx, struct rb *rb2h, struct usart_stat *stat);
+static void usart_config_recv_enable (struct USART *USARTx, int on);
+
+struct brr_setting {
+  uint8_t baud_spec;
+  uint32_t brr_value;
+};
+#define NUM_BAUD (int)(sizeof (brr_table) / sizeof (struct brr_setting))
+
+#define NUM_USART ((int)(sizeof (usart_array) / sizeof (struct usart)))
--- a/contrib/usart-stm32f103.c
+++ b/contrib/usart-stm32f103.c
@@ -0,0 +1,115 @@
+/*
+ * usart-stm32.c - USART driver for STM32F103 (USART2 and USART3)
+ *
+ * Copyright (C) 2017, 2019  g10 Code GmbH
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+#include <mcu/stm32.h>
+#include <contrib/usart.h>
+#include <contrib/usart-impl.h>
+#include <contrib/usart-impl-f103.h>
+
+#define USART2_BASE           (APB1PERIPH_BASE + 0x4400)
+#define USART3_BASE           (APB1PERIPH_BASE + 0x4800)
+#define USART2 ((struct USART *)USART2_BASE)
+#define USART3 ((struct USART *)USART3_BASE)
+
+static struct usart_stat usart2_stat;
+static struct usart_stat usart3_stat;
+
+static struct chx_intr usart2_intr;
+static struct chx_intr usart3_intr;
+
+#define BUF_A2H_SIZE 256
+#define BUF_H2A_SIZE 512
+static uint8_t buf_usart2_rb_a2h[BUF_A2H_SIZE];
+static uint8_t buf_usart2_rb_h2a[BUF_H2A_SIZE];
+static uint8_t buf_usart3_rb_a2h[BUF_A2H_SIZE];
+static uint8_t buf_usart3_rb_h2a[BUF_H2A_SIZE];
+
+static struct rb usart2_rb_a2h;
+static struct rb usart2_rb_h2a;
+static struct rb usart3_rb_a2h;
+static struct rb usart3_rb_h2a;
+
+static chopstx_poll_cond_t usart2_app_write_event;
+static chopstx_poll_cond_t usart3_app_write_event;
+
+/* Global variables so that it can be easier to debug.  */
+static int usart2_tx_ready;
+static int usart3_tx_ready;
+
+#define INTR_REQ_USART2 38
+#define INTR_REQ_USART3 39
+
+#define USART_DEVNO_START 2
+#define USART_DEVNO_END 3
+
+static const struct usart usart_array[] =
+  {
+   { USART2, &usart2_intr, INTR_REQ_USART2,
+     &usart2_stat, &usart2_rb_a2h, &usart2_rb_h2a, buf_usart2_rb_a2h,
+     buf_usart2_rb_h2a, &usart2_app_write_event, &usart2_tx_ready },
+   { USART3, &usart3_intr, INTR_REQ_USART3,
+     &usart3_stat, &usart3_rb_a2h, &usart3_rb_h2a, buf_usart3_rb_a2h,
+     buf_usart3_rb_h2a, &usart3_app_write_event, &usart3_tx_ready },
+  };
+
+/* We assume 36MHz f_PCLK */
+static const struct brr_setting brr_table[] = {
+  { B600,    (3750 << 4)},
+  { B1200,   (1875 << 4)},
+  { B2400,   ( 937 << 4)|8},
+  { B9600,   ( 234 << 4)|6},
+  { B19200,  ( 117 << 4)|3},
+  { B57600,  (  39 << 4)|1},
+  { B115200, (  19 << 4)|8},
+  { B230400, (   9 << 4)|12},
+  { B460800, (   4 << 4)|14},
+  { B921600, (   2 << 4)|7},
+  { BSCARD1,  ( 232 << 4)|8},	/*   9677 */
+  { BSCARD2,  ( 116 << 4)|4},	/*  19354 */
+  { BSCARD4,  (  58 << 4)|2},	/*  38709 */
+  { BSCARD8,  (  29 << 4)|1},	/*  77419 */
+  { BSCARD12, (  19 << 4)|6},	/* 116129 */
+  { BSCARD16, (  14 << 4)|9},	/* 154506 */
+  { BSCARD20, (  11 << 4)|10},	/* 193548 */
+};
+
+#include "usart-common.c"
+
+static void
+usart_rcc_setup (void)
+{
+  /* Enable USART2 and USART3 clocks, and strobe reset.  */
+  RCC->APB1ENR |= ((1 << 18) | (1 << 17));
+  RCC->APB1RSTR = ((1 << 18) | (1 << 17));
+  RCC->APB1RSTR = 0;
+}
+
+#include "usart-common-f103.c"
--- a/contrib/usart-stm32l4.c
+++ b/contrib/usart-stm32l4.c
@@ -0,0 +1,534 @@
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+#include <mcu/stm32l.h>
+#include <contrib/usart.h>
+#include <contrib/usart-impl.h>
+
+#define RCC_APB1_1_USART2     (1 << 17)
+#define RCC_APB2_USART1       (1 << 14)
+
+/* Hardware registers */
+struct USART {
+  volatile uint32_t CR1;
+  volatile uint32_t CR2;
+  volatile uint32_t CR3;
+  volatile uint32_t BRR;
+  volatile uint32_t GTPR;
+  volatile uint32_t RTOR;
+  volatile uint32_t RQR;
+  volatile uint32_t ISR;
+  volatile uint32_t ICR;
+  volatile uint32_t RDR;
+  volatile uint32_t TDR;
+};
+
+#define USART1_BASE           (APB2PERIPH_BASE + 0x3800)
+#define USART1 ((struct USART *)USART1_BASE)
+
+#define USART2_BASE           (APB1PERIPH_BASE + 0x4400)
+#define USART2 ((struct USART *)USART2_BASE)
+
+#define USART_ISR_CTS	(1 << 10)
+#define USART_ISR_LBDF	(1 << 8)
+#define USART_ISR_TXE	(1 << 7)
+#define USART_ISR_TC	(1 << 6)
+#define USART_ISR_RXNE	(1 << 5)
+#define USART_ISR_IDLE	(1 << 4)
+#define USART_ISR_ORE	(1 << 3)
+#define USART_ISR_NE	(1 << 2)
+#define USART_ISR_FE	(1 << 1)
+#define USART_ISR_PE	(1 << 0)
+
+#define USART_CR1_M1		(1 << 28)
+#define USART_CR1_M0		(1 << 12)
+#define USART_CR1_WAKE		(1 << 11)
+#define USART_CR1_PCE		(1 << 10)
+#define USART_CR1_PS		(1 <<  9)
+#define USART_CR1_PEIE		(1 <<  8)
+#define USART_CR1_TXEIE		(1 <<  7)
+#define USART_CR1_TCIE		(1 <<  6)
+#define USART_CR1_RXNEIE	(1 <<  5)
+#define USART_CR1_IDLEIE	(1 <<  4)
+#define USART_CR1_TE		(1 <<  3)
+#define USART_CR1_RE		(1 <<  2)
+#define USART_CR1_UESM		(1 <<  1)
+#define USART_CR1_UE		(1 <<  0)
+
+#define USART_CR3_CTSE		(1 <<  9)
+#define USART_CR3_RTSE		(1 <<  8)
+#define USART_CR3_SCEN		(1 <<  5)
+#define USART_CR3_NACK		(1 <<  4)
+
+static struct usart_stat usart2_stat;
+
+static struct chx_intr usart1_intr;
+static struct chx_intr usart2_intr;
+
+#define BUF_A2H_SIZE 256
+#define BUF_H2A_SIZE 512
+static uint8_t buf_usart2_rb_a2h[BUF_A2H_SIZE];
+static uint8_t buf_usart2_rb_h2a[BUF_H2A_SIZE];
+
+static struct rb usart2_rb_a2h;
+static struct rb usart2_rb_h2a;
+
+static chopstx_poll_cond_t usart2_app_write_event;
+
+/* Global variables so that it can be easier to debug.  */
+static int usart2_tx_ready;
+
+#define INTR_REQ_USART1 37
+#define INTR_REQ_USART2 38
+
+#define USART_DEVNO_START 1
+#define USART_DEVNO_END   2
+
+static const struct usart usart_array[] =
+  {
+   { USART1, &usart1_intr, INTR_REQ_USART1,
+     NULL, NULL, NULL, NULL,
+     NULL, NULL, NULL,
+   },
+   { USART2, &usart2_intr, INTR_REQ_USART2,
+     &usart2_stat, &usart2_rb_a2h, &usart2_rb_h2a, buf_usart2_rb_a2h,
+     buf_usart2_rb_h2a, &usart2_app_write_event, &usart2_tx_ready,
+   },
+  };
+
+/* We assume 40MHz f_CK */
+static const struct brr_setting brr_table[] = {
+  { B600,    66667 },
+  { B1200,   33333 },
+  { B2400,   16667 },
+  { B9600,    4167 },
+  { B19200,   2083 },
+  { B57600,    694 },
+  { B115200,   347 },
+  { B230400,   174 },
+  { B460800,    87 },
+  { B921600,    43 },
+  { BSCARD1,  3720 },
+  { BSCARD2,  1860 },
+  { BSCARD4,   930 },
+  { BSCARD8,   465 },
+  { BSCARD12,  310 },
+  { BSCARD16,  233 },
+  { BSCARD20,  186 },
+};
+
+#include "usart-common.c"
+
+static void
+usart_config_recv_enable (struct USART *USARTx, int on)
+{
+  if (on)
+    {
+      USARTx->CR1 |= USART_CR1_RE;
+      /* Wait for REACK bit.  */
+      while ((USARTx->ISR & (1 << 22)) == 0)
+	;
+    }
+  else
+    USARTx->CR1 &= ~USART_CR1_RE;
+}
+
+int
+usart_config (uint8_t dev_no, uint32_t config_bits)
+{
+  struct USART *USARTx = get_usart_dev (dev_no);
+  uint8_t baud_spec = (config_bits & MASK_BAUD);
+  int i;
+  uint32_t cr1_config = (USART_CR1_UE | USART_CR1_RXNEIE | USART_CR1_TE);
+				/* TXEIE/TCIE will be enabled when
+				   putting char */
+				/* No CTSIE, PEIE, IDLEIE, LBDIE */
+  if (USARTx == NULL)
+    return -1;
+
+  /* Disable USART before configure.  */
+  USARTx->CR1 &= ~USART_CR1_UE;
+
+  if ((config_bits & MASK_CS) == CS7 && !(config_bits & PARENB))
+    cr1_config |=  USART_CR1_M1;
+  else if (((config_bits & MASK_CS) == CS7 && (config_bits & PARENB))
+      || ((config_bits & MASK_CS) == CS8 && (config_bits & PARENB) == 0))
+    ;
+  else if ((config_bits & MASK_CS) == CS8)
+    cr1_config |=  USART_CR1_M0;
+  else
+    return -1;
+
+  if ((config_bits & PARENB))
+    cr1_config |=  (USART_CR1_PCE | USART_CR1_PEIE);
+
+  if ((config_bits & PARODD))
+    cr1_config |=  USART_CR1_PS;
+
+  if ((config_bits & MASK_STOP) == STOP0B5)
+    USARTx->CR2 = (0x1 << 12);
+  else if ((config_bits & MASK_STOP) == STOP1B)
+    USARTx->CR2 = (0x0 << 12);
+  else if ((config_bits & MASK_STOP) == STOP1B5)
+    USARTx->CR2 = (0x3 << 12);
+  else /* if ((config_bits & MASK_STOP) == STOP2B) */
+    USARTx->CR2 = (0x2 << 12);
+
+  for (i = 0; i < NUM_BAUD; i++)
+    if (brr_table[i].baud_spec == baud_spec)
+      break;
+
+  if (i >= NUM_BAUD)
+    return -1;
+
+  USARTx->BRR = brr_table[i].brr_value;
+
+  if ((config_bits & MASK_FLOW))
+    USARTx->CR3 = USART_CR3_CTSE | USART_CR3_RTSE;
+  else
+    USARTx->CR3 = 0;
+
+  if ((config_bits & MASK_MODE))
+    {
+      if ((config_bits & MASK_MODE) == MODE_SMARTCARD)
+	{
+	  USARTx->GTPR = (1 << 8) | 5;
+	  USARTx->CR3 |= (USART_CR3_SCEN | USART_CR3_NACK);
+	}
+      else if ((config_bits & MASK_MODE) == MODE_IRDA)
+	USARTx->CR3 |= (1 << 1);
+      else if ((config_bits & MASK_MODE) == MODE_IRDA_LP)
+	USARTx->CR3 |= (1 << 2) | (1 << 1);
+    }
+  else
+    cr1_config |= USART_CR1_RE;
+
+  USARTx->CR1 = cr1_config;
+
+  /* Wait for TEACK bit.  */
+  while ((USARTx->ISR & (1 << 21)) == 0)
+    ;
+
+  return 0;
+}
+
+
+void
+usart_init0 (int (*cb) (uint8_t dev_no, uint16_t notify_bits))
+{
+  int i;
+
+  ss_notify_callback = cb;
+
+  for (i = 0; i < NUM_USART; i++)
+    {
+      if (usart_array[i].stat)
+	usart_array[i].stat->dev_no = i + USART_DEVNO_START;
+      chopstx_claim_irq (usart_array[i].intr, usart_array[i].irq_num);
+    }
+
+  /* Enable USART1 clock, and strobe reset.  */
+  RCC->APB2ENR |= RCC_APB2_USART1;
+  RCC->APB2RSTR = RCC_APB2_USART1;
+  RCC->APB2RSTR = 0;
+
+  /* Enable USART2 clock, and strobe reset.  */
+  RCC->APB1ENR1 |= RCC_APB1_1_USART2;
+  RCC->APB1RSTR1 = RCC_APB1_1_USART2;
+  RCC->APB1RSTR1 = 0;
+}
+
+#define UART_STATE_BITMAP_RX_CARRIER (1 << 0)
+#define UART_STATE_BITMAP_TX_CARRIER (1 << 1)
+#define UART_STATE_BITMAP_BREAK      (1 << 2)
+#define UART_STATE_BITMAP_RINGSIGNAL (1 << 3)
+#define UART_STATE_BITMAP_FRAMING    (1 << 4)
+#define UART_STATE_BITMAP_PARITY     (1 << 5)
+#define UART_STATE_BITMAP_OVERRUN    (1 << 6)
+
+static int
+handle_intr (struct USART *USARTx, struct rb *rb2a, struct usart_stat *stat)
+{
+  int tx_ready = 0;
+  uint32_t r = USARTx->ISR;
+  int notify_bits = 0;
+  int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
+
+  if (smartcard_mode)
+    {
+      if ((r & USART_ISR_TC))
+	{
+	  tx_ready = 1;
+	  USARTx->CR1 &= ~USART_CR1_TCIE;
+	}
+    }
+  else
+    {
+      if ((r & USART_ISR_TXE))
+	{
+	  tx_ready = 1;
+	  USARTx->CR1 &= ~USART_CR1_TXEIE;
+	}
+    }
+
+  if ((r & USART_ISR_RXNE))
+    {
+      uint32_t data = USARTx->RDR;
+
+      /* RDR register should be accessed even if data is not used.  */
+      asm volatile ("" : : "r" (data) : "memory");
+
+      if ((r & USART_ISR_NE))
+	{
+	  USARTx->ICR |= (1 << 2);
+	  stat->err_rx_noise++;
+	}
+      else if ((r & USART_ISR_FE))
+	{
+	  /* NOTE: Noway to distinguish framing error and break  */
+
+	  USARTx->ICR |= (1 << 1);
+	  stat->rx_break++;
+	  notify_bits |= UART_STATE_BITMAP_BREAK;
+	}
+      else if ((r & USART_ISR_PE))
+	{
+	  USARTx->ICR |= (1 << 0);
+	  stat->err_rx_parity++;
+	  notify_bits |= UART_STATE_BITMAP_PARITY;
+	}
+      else
+	{
+	  if ((r & USART_ISR_ORE))
+	    {
+	      USARTx->ICR |= (1 << 3);
+	      stat->err_rx_overrun++;
+	      notify_bits |= UART_STATE_BITMAP_OVERRUN;
+	    }
+
+	  /* XXX: if CS is 7-bit, mask it, or else parity bit in upper layer */
+	  if (rb_ll_put (rb2a, (data & 0xff)) < 0)
+	    stat->err_rx_overflow++;
+	  else
+	    stat->rx++;
+	}
+    }
+  else if ((r & USART_ISR_ORE))
+    {				/* Clear ORE */
+      USARTx->ICR |= (1 << 3);
+      stat->err_rx_overrun++;
+      notify_bits |= UART_STATE_BITMAP_OVERRUN;
+    }
+
+  if (notify_bits)
+    {
+      if (ss_notify_callback
+	  && (*ss_notify_callback) (stat->dev_no, notify_bits))
+	stat->err_notify_overflow++;
+    }
+
+  return tx_ready;
+}
+
+static int
+handle_tx (struct USART *USARTx, struct rb *rb2h, struct usart_stat *stat)
+{
+  int tx_ready = 1;
+  int c = rb_ll_get (rb2h);
+
+  if (c >= 0)
+    {
+      uint32_t r;
+      int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
+
+      USARTx->TDR = (c & 0xff);
+      stat->tx++;
+      r = USARTx->ISR;
+      if (smartcard_mode)
+	{
+	  if ((r & USART_ISR_TC) == 0)
+	    {
+	      tx_ready = 0;
+	      USARTx->CR1 |= USART_CR1_TCIE;
+	    }
+	}
+      else
+	{
+	  if ((r & USART_ISR_TXE) == 0)
+	    {
+	      tx_ready = 0;
+	      USARTx->CR1 |= USART_CR1_TXEIE;
+	    }
+	}
+    }
+
+  return tx_ready;
+}
+
+int
+usart_send_break (uint8_t dev_no)
+{
+  struct USART *USARTx = get_usart_dev (dev_no);
+  if (USARTx == NULL)
+    return -1;
+
+  if ((USARTx->ISR & (1 << 18)))
+    return 1;	/* Busy sending break, which was requested before.  */
+
+  /* ??? Should we check TX is empty? */
+
+  USARTx->RQR |= 0x02;
+  return 0;
+}
+
+int
+usart_block_sendrecv (uint8_t dev_no, const char *s_buf, uint16_t s_buflen,
+		      char *r_buf, uint16_t r_buflen,
+		      uint32_t *timeout_block_p, uint32_t timeout_char)
+{
+  uint32_t timeout;
+  uint8_t *p;
+  int len;
+  uint32_t r;
+  uint32_t data;
+  struct USART *USARTx = get_usart_dev (dev_no);
+  int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
+  struct chx_intr *usartx_intr = get_usart_intr (dev_no);
+  struct chx_poll_head *ph[1];
+
+  if (usartx_intr == NULL)
+    return -1;
+
+  ph[0] = (struct chx_poll_head *)usartx_intr;
+
+  p = (uint8_t *)s_buf;
+  if (p)
+    {
+      if (smartcard_mode)
+	usart_config_recv_enable (USARTx, 0);
+
+      USARTx->CR1 |= USART_CR1_TXEIE;
+
+      /* Sending part */
+      while (1)
+	{
+	  chopstx_poll (NULL, 1, ph);
+
+	  r = USARTx->ISR;
+
+	  /* Here, ignore recv error(s).  */
+	  if ((r & USART_ISR_RXNE))
+	    {
+	      data = USARTx->RDR;
+	      asm volatile ("" : : "r" (data) : "memory");
+
+	      USARTx->ICR |= ((1 << 2) | (1 << 1) | (1 << 0));
+	    }
+	  else if ((r & USART_ISR_ORE))
+	    {
+	      USARTx->ICR |= (1 << 3);
+	    }
+
+	  if ((r & USART_ISR_TXE))
+	    {
+	      if (s_buflen == 0)
+		break;
+	      else
+		{
+		  /* Keep TXEIE bit */
+		  USARTx->TDR = *p++;
+		  s_buflen--;
+		}
+	    }
+
+	  chopstx_intr_done (usartx_intr);
+	}
+
+      USARTx->CR1 &= ~USART_CR1_TXEIE;
+      if (smartcard_mode)
+	{
+	  if (timeout_block_p && (*timeout_block_p))
+	    do
+	      r = USARTx->ISR;
+	    while (((r & USART_ISR_TC) == 0));
+
+	  usart_config_recv_enable (USARTx, 1);
+
+	  if (timeout_block_p && *timeout_block_p == 0)
+	    {
+	      /* Ignoring the echo back.  */
+	      do
+		r = USARTx->ISR;
+	      while (((r & USART_ISR_TC) == 0));
+
+	      if ((r & USART_ISR_RXNE))
+		{
+		  data = USARTx->RDR;
+		  asm volatile ("" : : "r" (data) : "memory");
+		}
+
+	      *timeout_block_p = timeout_char;
+	    }
+	}
+
+      chopstx_intr_done (usartx_intr);
+    }
+
+  if (r_buf == NULL)
+    return 0;
+
+  if (!p)
+    if (smartcard_mode)
+      usart_config_recv_enable (USARTx, 1);
+
+  /* Receiving part */
+  r = chopstx_poll (timeout_block_p, 1, ph);
+  if (r == 0)
+    return 0;
+
+  p = (uint8_t *)r_buf;
+  len = 0;
+
+  while (1)
+    {
+      r = USARTx->ISR;
+
+      data = USARTx->RDR;
+      asm volatile ("" : : "r" (data) : "memory");
+
+      if ((r & USART_ISR_RXNE))
+	{
+	  if ((r & USART_ISR_NE) || (r & USART_ISR_FE) || (r & USART_ISR_PE))
+	    {
+	      /* ignore error, for now.  XXX: ss_notify */
+	      /* Clear the error flag(s) */
+	      USARTx->ICR |= ((1 << 2) | (1 << 1) | (1 << 0));
+	    }
+	  else
+	    {
+	      *p++ = (data & 0xff);
+	      len++;
+	      r_buflen--;
+	      if (r_buflen == 0)
+		{
+		  chopstx_intr_done (usartx_intr);
+		  break;
+		}
+	    }
+	}
+      else if ((r & USART_ISR_ORE))
+	{
+	  /* ignore error, for now.  XXX: ss_notify */
+	  /* Clear the error flag */
+	  USARTx->ICR |= (1 << 3);
+	}
+
+      chopstx_intr_done (usartx_intr);
+      timeout = timeout_char;
+      r = chopstx_poll (&timeout, 1, ph);
+      if (r == 0)
+	break;
+    }
+
+  return len;
+}
--- a/contrib/usart.h
+++ b/contrib/usart.h
@@ -0,0 +1,90 @@
+#define B0       0 /* POSIX to hang up */
+
+/* POSIX supports B75 to B300 */
+#define B600        16
+#define B1200       17
+#define B2400       19
+#define B9600       21
+#define B19200      22
+#define B57600      24
+#define B115200     25
+#define B230400     26
+#define B460800     27
+#define B921600     28
+#define BSCARD1     57
+#define BSCARD2     58
+#define BSCARD4     59
+#define BSCARD8     60
+#define BSCARD12    61
+#define BSCARD16    62
+#define BSCARD20    63
+#define MASK_BAUD 0x3f
+
+/* POSIX supports 5, 6.  USB suppots 16 */
+#define CS7       (2 << 6)
+#define CS8       (3 << 6)
+#define MASK_CS   (0x7 << 6)
+
+#define STOP0B5	  (0 << 9) /* USART Hardware only */
+#define STOP1B	  (1 << 9) /* USB, POSIX  */
+#define STOP1B5	  (2 << 9) /* USB         */
+#define STOP2B	  (3 << 9) /* USB, POSIX  */
+#define MASK_STOP (0x3 << 9)
+
+#define PARENB    (1 << 11)
+#define PARODD    (2 << 11)
+#define MASK_PAR  (0x7 << 11)
+/* USB  0: none, 1: odd, 2: even, 3: mark, 4: space */
+
+#define CRTSCTS   (1 << 14)
+#define MASK_FLOW (0x1 << 14)
+
+/*
+BAUD_BITS 6
+CS_BITS   3
+STOP_BITS 2
+PAR_BITS  3
+*/
+/* USB: SET_CONTROL_LINE_STATE
+   DTR RTS */
+/* USB: SERIAL_STATE
+   DSR DCD RI */
+
+/* non-POSIX, non-USB-CDC configs */
+#define MODE_SMARTCARD (1 << 30)
+#define MODE_IRDA      (2UL << 30)
+#define MODE_IRDA_LP   (3UL << 30)
+#define MASK_MODE      (0x3UL << 30)
+/* 0: standard, 1: smartcard, 2: IrDA, 3: IrDA-LP */
+
+struct usart_stat {
+  uint8_t dev_no;
+
+  uint32_t tx;
+  uint32_t rx;
+  uint32_t rx_break;
+  uint32_t err_notify_overflow;
+  uint32_t err_rx_overflow;	/* software side */
+  uint32_t err_rx_overrun;	/* hardware side */
+  uint32_t err_rx_noise;
+  uint32_t err_rx_parity;
+};
+
+
+void usart_init (uint16_t prio, uintptr_t stack_addr, size_t stack_size,
+		 int (*ss_notify_callback) (uint8_t dev_no, uint16_t notify_bits));
+int usart_config (uint8_t dev_no, uint32_t config_bits);
+int usart_read (uint8_t dev_no, char *buf, uint16_t buflen);
+int usart_write (uint8_t dev_no, char *buf, uint16_t buflen);
+const struct usart_stat *usart_stat (uint8_t dev_no);
+int usart_send_break (uint8_t dev_no);
+void usart_config_clken (uint8_t dev_no, int on);
+int usart_config_baud (uint8_t dev_no, uint8_t baud_spec);
+
+void usart_read_prepare_poll (uint8_t dev_no, chopstx_poll_cond_t *poll_desc);
+int usart_read_ext (uint8_t dev_no, char *buf, uint16_t buflen, uint32_t *timeout_p);
+
+void usart_init0 (int (*cb) (uint8_t dev_no, uint16_t notify_bits));
+int usart_block_sendrecv (uint8_t dev_no, const char *s_buf, uint16_t s_buflen,
+			  char *r_buf, uint16_t r_buflen,
+			  uint32_t *timeout_block_p, uint32_t timeout_char);
--- a/doc/chopstx-api.texi
+++ b/doc/chopstx-api.texi
@@ -9,7 +9,7 @@ stop further execution of code.  It never returns.

@subheading chopstx_create
@anchor{chopstx_create}
-@deftypefun {chopstx_t} {chopstx_create} (uint32_t @var{flags_and_prio}, uint32_t @var{stack_addr}, size_t @var{stack_size}, voidfunc @var{thread_entry}, void * @var{arg})
+@deftypefun {chopstx_t} {chopstx_create} (uint32_t @var{flags_and_prio}, uintptr_t @var{stack_addr}, size_t @var{stack_size}, voidfunc @var{thread_entry}, void * @var{arg})
@var{flags_and_prio}: Flags and priority

@var{stack_addr}: Stack address
@@ -107,6 +107,14 @@ Claim interrupt @var{intr} with @var{irq_num}
 Wait for the interrupt @var{intr} to be occured.
@end deftypefun

+@subheading chopstx_intr_done
+@anchor{chopstx_intr_done}
+@deftypefun {void} {chopstx_intr_done} (chopstx_intr_t * @var{intr})
+@var{intr}: Pointer to INTR structure
+
+Finish for the interrupt @var{intr} occurred.
+@end deftypefun
+
@subheading chopstx_cleanup_push
@anchor{chopstx_cleanup_push}
@deftypefun {void} {chopstx_cleanup_push} (struct chx_cleanup * @var{clp})
@@ -176,8 +184,9 @@ Returns old state which is 0 when it was enabled.

@subheading chopstx_poll
@anchor{chopstx_poll}
-@deftypefun {int} {chopstx_poll} (uint32_t * @var{usec_p}, int @var{n}, struct chx_poll_head * [] @var{pd_array})
-@var{usec_p}: Pointer to usec for timeout.  Forever if NULL.
+@deftypefun {int} {chopstx_poll} (uint32_t * @var{usec_p}, int @var{n}, struct chx_poll_head *const [] @var{pd_array})
+@var{usec_p}: Pointer to usec for timeout.  Forever if NULL.  It is
+updated on return

@var{n}: Number of poll descriptors

@@ -201,3 +210,30 @@ which starts its execution with priority of CHX_PRIO_MAIN_INIT, and
 let it change its priority after initialization of other threads.
@end deftypefun

+@subheading chx_sleep_mode
+@anchor{chx_sleep_mode}
+@deftypefun {extern void} {chx_sleep_mode} (int @var{enable_sleep})
+@var{enable_sleep}: Enable sleep on idle or not
+
+If @var{enable_sleep} is > 0, allow sleep for the idle thread.
+
+Behavior of @var{enable_sleep} >= 1 depends on MCU.
+
+For STM32F0, 1 for Sleep (CPU clock OFF only), 2 for Stop (Wakeup
+by EXTI, voltage regulator on), 3 for Stop (Wakeup by EXTI, voltage
+regulator low-power), 4 for Standby (Wakeup by RESET, voltage
+regulator off).
+
+For STM32F103, 1 for normal sleep, and 2 for sleep with lower 8MHz
+clock.
+
+Return previous value of @var{enable_sleep}.
+@end deftypefun
+
+@subheading chopstx_critical
+@anchor{chopstx_critical}
+@deftypefun {void *} {chopstx_critical} (void *func (void * @var{})
+Run the function @var{func} with @var{arg} under CPU schedule lock.
+Return void * pointer.
+@end deftypefun
+
--- a/doc/chopstx.texi
+++ b/doc/chopstx.texi
@@ -1,7 +1,7 @@
 \input texinfo                      @c -*-texinfo-*-
@c %**start of header
@setfilename chopstx.info
-@set VERSION 1.2
+@set VERSION 2.1
@settitle Chopstx Reference Manual
@c Unify some of the indices.
@syncodeindex tp fn
@@ -11,7 +11,7 @@
 This manual is for Chopstx (version @value{VERSION}).

@noindent
-Copyright @copyright{} 2013, 2015, 2016 Flying Stone Technology @*
+Copyright @copyright{} 2013, 2015, 2016, 2017, 2018, 2019, 2020, 2021 Flying Stone Technology @*

@quotation
 Permission is granted to copy, distribute and/or modify this document
@@ -59,7 +59,12 @@ section entitled ``Copying''.

@menu
 * Introduction::                 What is Chopstx.
+* Threads and only Threads::     Threads and only Threads.
+* Poll or Pole::
+* Use of sleep mode::            Use it carefully.
+* Compile-time macro::           Macro to be defined.
 * API::                          API.
+* Memorandom::                   Memorandom for the implementation.

 Appendix

@@ -83,22 +88,183 @@ Indexes
@node Introduction
@chapter Introduction

-Chopstx is an RT thread library for ARM Cortex-M0, Cortex-M0plus and
-Cortex-M3.  Specifically, it is used for STM32F030, MKL27Z and
-STM32F103.
+Chopstx is an RT thread library for ARM Cortex-M0, Cortex-M0plus,
+Cortex-M3, Cortex-M4 with no FPU or DSP, RISC-V Bumblebee, and
+GNU/Linux emulation.  Specifically, it is used for STM32F030, MKL27Z,
+STM32F103, GD32F103, STM32L432, GD32VF103 and as a command on
+GNU/Linux.

 While most RTOSes come with many features, drivers, and stacks,
-Chopstx just offers a RT thread library.
+Chopstx just offers an RT thread library.

 With Chopstx, interrupt handling is also done by a thread.  This
 enables coherent code for ease of maintenance.

+While threads are important, we don't need more threads than
+necessary.  Chopstx provides a feature of poll, so that we can
+handle multiple events by a single thread.
+
+
+@node Threads and only Threads
+@chapter Threads and only Threads
+
+Chopstx doesn't use the feature of (prioritized) nested vector
+interrupt mechanism at all.  All interrupts are equally handled by a
+single entry of chx_handle_intr which just wakes up a corresponding
+thread.  This is the feature of Chopstx.
+
+Nested vector interrupt machanism would be useful for interrupt-driven
+programming style for specific application targets, or, some other
+programing style like the one with spl of Unix.  Some engineers
+(especially, hardware side) still seem to believe that it is a good
+feature to have.  But from the view point of programming and
+maintenance of software, this is one of the most difficult part with
+little benefit, if any.
+
+With traditional interrupt handling, a demarcation of what should be
+done by interrupt handler, bottom half, and thead is crucial for
+applications' performance.  And because the demarcation should be done
+at an early stage of an application development, it has a tendency,
+many parts are getting demanding higher priority.  Amount of code for
+higher priority interrupt handler is getting bigger and bigger, while
+losing performance.
+
+On the other hand, ``Threads (and only Threads)'' programming style
+gives us best flexibility and it can make an application more
+predictable, deterministic and easy to maintain.
+
+There are some applications, like square wave generator, which are not
+suited to this programming style; Another programming style can
+support more performance (frequency).  In general, such an example is
+best suited by hardware (not software).
+
+
+@node Poll or Pole
+@chapter Poll or Pole
+Chopstx provides the @code{chopstx_poll} function to wait on multiple events.
+
+Using @code{chopstx_poll}, we can write an application by event-driven
+programming style, with minimum number of threads, avoiding
+complicated dependency between threads.
+
+
+@node Use of sleep mode
+@chapter Use of sleep mode
+
+Calling the chopstx_conf_idle function (> 0) to allow the idle thread
+going to sleep.  MCU will be in sleep mode when no threads are
+running.  By setting relevant bits of system registers, MCU will be
+able to be into stop or stand-by mode, which is MCU dependent.
+
+If you use this sleep feature, please consider and implement your
+program carefully.  Enabling sleep, it may result a bricked board; A
+board with no RESET pin cannot be debugged by JTAG/SWD.
+
+
+@node Compile-time macro
+@chapter Compile-time macro
+
+Compiling Chopstx, a macro MHZ should be supplied.
+
+For example, when using the makefile rule of chopstx/rules.mk, please
+define the make variable DEFS with -DMHZ=72 before inclusion of the rule file.
+
+@subheading MHZ
+@anchor{MHZ}
+@defmac {MHZ}
+Running CPU clock in MHz.  Used for chopstx_usec_wait.
+@end defmac
+

@node API
@chapter API

@include chopstx-api.texi

+@node Memorandom
+@chapter Memorandom for the implementation
+
+@menu
+* Honourable poverty::          Wabi and Sabi.
+* Better interrupt handling::
+* Static and deterministic when possible::
+@end menu
+
+@node Honourable poverty
+@section Honourable poverty
+
+Chopstx is an effort against many features.  It encourages doing
+harder decision earlier (because of less features).
+
+Along with Moore's law, MCU implementations and their software are
+getting more complex.  It's been getting more flexibile, versatile,
+and powerful.
+
+Here is a question: the bigger is the better?
+
+Historically, it used to be ``Yes, and it's even cheaper!''.  And, for
+a while, this trend continues.
+
+However, in my opinion, it has been arrived to the point where
+complexity matters.  Now, it's more difficult to manage the
+complexity.
+
+With full of resources, it became possible deferring difficult
+hardware or lower-level decisions to upper layer, by supporting both
+ways, when we have a choice.  It used to be considered a good
+practice.
+
+But, eventually, as a system, it may result many knobs, full of
+options, which might be too difficult to manage.
+
+In this situation, against existing practice, Chopstx is a challenge
+to handle all food by only two wooden sticks.  It's not fork and exec
+nor forks and knives.
+
+In Japan, it is common among families, to have private chopsticks for
+each individual at home.  It's like: these chopsticks are father's,
+these chopsticks are mother's... son's and daughter's.
+
+I hope Chopstx is the one for you.
+
+
+@node Better interrupt handling
+@section Better interrupt handling
+
+In Chopstx, all interrupt handling is done by a single routine named
+chx_handle_intr.  It uses linear list search to find a thread which
+handles the interrupt.  In the fixed vector_table, we see many of
+chx_handle_intr entries.
+
+Obviously, this is suboptimal.  It kills the hardware effort to
+decrease interrupt latency.
+
+It is certainly possible to support configurable vector table and/or
+better dispatch.
+
+The reason why I keep this badness is that I believe that when
+interrupt latency matters (to the level of supporting larger vector
+table, despite only few cycles elimination), something is going wrong.
+You should have better solution or work around, instead of eliminating
+few cycles in an interrupt handler.
+
+When I have an opportunity to design MCU, I don't support larger
+interrupt vector table.
+
+
+@node Static and deterministic when possible
+@section Static and deterministic when possible
+
+When an application enables features dynamically, it may invite
+non-deterministic bugs.  Typical example: the order of driver
+initialization matters, because of hidden dependency in a hardware
+implementation.  To cover all the cases, tests needed can become huge.
+
+A simple practice like following is good when it's enough: doing all
+initialization at start, then running threads to work.
+
+If possible, it's better to avoid supporting fine grain power control
+and/or dynamic clock frequency change.

@c ********************************************

--- a/entry-cortex-m.c
+++ b/entry-cortex-m.c
@@ -1,7 +1,7 @@
 /*
- * entry.c - Entry routine when reset and interrupt vectors.
+ * entry-cortex-m.c - Entry routine when reset and interrupt vectors.
 *
- * Copyright (C) 2013, 2014, 2015, 2016
+ * Copyright (C) 2013, 2014, 2015, 2016, 2017, 2019, 2021
 *               Flying Stone Technology
 * Author: NIIBE Yutaka <gniibe@fsij.org>
 *
@@ -23,15 +23,16 @@
 * As additional permission under GNU GPL version 3 section 7, you may
 * distribute non-source form of the Program without the copy of the
 * GNU GPL normally required by section 4, provided you inform the
- * receipents of GNU GPL by a written offer.
+ * recipients of GNU GPL by a written offer.
 *
 */

 #include <stdint.h>
 #include <stdlib.h>
-#include <chopstx.h>
+#include <chopstx-cortex-m.h>

 #include "board.h"
+
 #if defined(USE_SYS3) || defined(USE_SYS_CLOCK_GPIO_SETTING)
 #define REQUIRE_CLOCK_GPIO_SETTING_IN_SYS
 #include "sys.h"
@@ -39,12 +40,16 @@
 * Avoid medium density specific code and prepare for high density
 * device, too.
 */
-#undef STM32F10X_MD
+#if !defined(MCU_STM32L4)
+#define STM32F10X_HD
+#endif
 #else
 #if defined (MCU_KINETIS_L)
 #include "mcu/clk_gpio_init-mkl27z.c"
+#elif defined (MCU_STM32L4)
+#include "mcu/clk_gpio_init-stm32l.c"
 #else
-#include "mcu/clk_gpio_init-stm32.c"
+#include "mcu/clk_gpio_init-stm32f.c"
 #endif
 #endif

@@ -56,11 +61,10 @@
 #endif

 extern uint8_t __main_stack_end__;
-#if defined(__ARM_ARCH_7M__)
+#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
 extern void svc (void);
 #endif
-extern void preempt (void);
-extern void chx_timer_expired (void);
+
 extern void chx_handle_intr (void);

 static void nmi (void)
@@ -152,7 +156,7 @@ entry (void)
 		"bl	chx_systick_init\n\t"
 		"bl	gpio_init\n\t"
 		/* Enable interrupts.  */
-#if defined(__ARM_ARCH_7M__)
+#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
 		"mov	r0, #0\n\t"
 		"msr	BASEPRI, r0\n\t"
 #endif
@@ -182,31 +186,31 @@ handler vector_table[] __attribute__ ((section(".startup.vectors"))) = {
  none, none, none,		/* reserved */
 #if defined(__ARM_ARCH_6M__)
  none,				/* SVCall */
-#elif defined(__ARM_ARCH_7M__)
+#elif defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
  svc,				/* SVCall */
 #endif  
  none,				/* Debug */
  none,				/* reserved */
-  preempt,			/* PendSV */
-  chx_timer_expired,		/* SysTick */
+  none,				/* PendSV */
+  chx_handle_intr,		/* SysTick */
  /* 0x40 */
-  chx_handle_intr /* WWDG */,     chx_handle_intr /* PVD */,
-  chx_handle_intr /* TAMPER */,   chx_handle_intr /* RTC */,
-  chx_handle_intr /* FLASH */,    chx_handle_intr /* RCC */,
-  chx_handle_intr /* EXTI0 */,    chx_handle_intr /* EXTI1 */,
+  chx_handle_intr /* WWDG */,      chx_handle_intr /* PVD */,
+  chx_handle_intr /* TAMPER */,    chx_handle_intr /* RTC */,
+  chx_handle_intr /* FLASH */,     chx_handle_intr /* RCC */,
+  chx_handle_intr /* EXTI0 */,     chx_handle_intr /* EXTI1 */,
  /* 0x60 */
-  chx_handle_intr /* EXTI2 */,    chx_handle_intr /* EXTI3 */,
-  chx_handle_intr /* EXTI4 */,    chx_handle_intr /* DMA1 CH1 */,
-  chx_handle_intr /* DMA1 CH2 */, chx_handle_intr /* DMA1 CH3 */,
-  chx_handle_intr /* DMA1 CH4 */, chx_handle_intr /* DMA1 CH5 */,
+  chx_handle_intr /* EXTI2 */,     chx_handle_intr /* EXTI3 */,
+  chx_handle_intr /* EXTI4 */,     chx_handle_intr /* DMA1 CH1 */,
+  chx_handle_intr /* DMA1 CH2 */,  chx_handle_intr /* DMA1 CH3 */,
+  chx_handle_intr /* DMA1 CH4 */,  chx_handle_intr /* DMA1 CH5 */,
  /* 0x80 */
-  chx_handle_intr /* DMA1 CH6 */, chx_handle_intr /* DMA1 CH7 */,
-  chx_handle_intr /* ADC1_2 */,   chx_handle_intr /* USB HP */,
+  chx_handle_intr /* DMA1 CH6 */,  chx_handle_intr /* DMA1 CH7 */,
+  chx_handle_intr /* ADC1_2 */,    chx_handle_intr /* USB HP */,
  /* 0x90 */
-  chx_handle_intr /* USB LP */,   chx_handle_intr /* CAN */,
-  /* ... and more.  EXT9_5, TIMx, I2C, SPI, USART, EXT15_10 */
-  chx_handle_intr,                chx_handle_intr,
-  /* 0xA0 */
+  chx_handle_intr /* USB LP */,    chx_handle_intr /* CAN RX1 */,
+  chx_handle_intr /* CAN SCE */,   chx_handle_intr /* EXT9_5 */,
+  /* 0xa0 */
+  /* ... and more.  TIMx, I2C, SPI, USART... */
  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
  /* 0xc0 */
@@ -214,14 +218,28 @@ handler vector_table[] __attribute__ ((section(".startup.vectors"))) = {
  /* STM32F0 doesn't have more.  */
  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
-  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+  /* 0xe0 */
+  chx_handle_intr /* EXT15_10 */,  chx_handle_intr /* RTCAlarm */,
+  chx_handle_intr /* USBWakeup */, chx_handle_intr,
 #endif
-#if !defined(STM32F10X_MD)
-  /* High-density chips have more; RTCAlarm, USBWakeup, ... , DMA2_Channel4_5 */
+#if defined(STM32F10X_HD)
+  /* High-density chips have more; ... DMA2_Channel4_5 */
  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
-  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+#elif defined(MCU_STM32L4)
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
+  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,  chx_handle_intr,
 #endif
 };
--- a/entry-gnu-linux.c
+++ b/entry-gnu-linux.c
@@ -0,0 +1,45 @@
+/*
+ * entry.c - Entry routine.
+ *
+ * Copyright (C) 2017, 2019
+ *               Flying Stone Technology
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+
+int emulated_main (int, const char **);
+void chx_init (struct chx_thread *);
+void chx_systick_init (void);
+extern struct chx_thread main_thread;
+
+int
+main (int argc, const char *argv[])
+{
+  chx_init (&main_thread);
+  chx_systick_init ();
+  emulated_main (argc, argv);
+}
--- a/entry-riscv32.c
+++ b/entry-riscv32.c
@@ -0,0 +1,84 @@
+/*
+ * entry-riscv32.c - Entry routine when reset.
+ *
+ * Copyright (C) 2019
+ *               Flying Stone Technology
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * recipients of GNU GPL by a written offer.
+ *
+ */
+
+#include "board.h"
+#include "mcu/clk_gpio_init-gd32vf103.c"
+
+/*
+ * Startup entry point.
+ */
+void __attribute__ ((naked,section(".text.startup.0")))
+entry (void)
+{
+  /* Start at 0x00000000 (alias 0x08000000), interrupt masked */
+  asm volatile (
+	"li	a0,0x0800000c\n\t"
+        "jr	a0\n\t"		/* Jump to physical address */
+        ".align	2\n\t"
+    ".option push\n"
+    ".option norelax\n\t"
+	"la	gp,__global_pointer$\n"
+    ".option pop\n\t"
+	"la	sp,__main_stack_end__\n\t"
+	"call	clock_init\n\t"
+	/* Clear BSS section.  */
+	"la	a0,_bss_start\n\t"
+	"la	a1,_bss_end\n\t"
+    "0:\n\t"
+	"beq	a0,a1,1f\n"
+	"sw	zero,(a0)\n\t"
+	"addi	a0,a0,4\n\t"
+	"j	0b\n"
+    "1:\n\t"
+	/* Copy data section.  */
+	"la	a0,_textdata\n\t"
+	"la	a1,_data\n\t"
+	"la	a2,_edata\n"
+    "0:\n\t"
+	"beq	a1,a2,1f\n\t"
+	"lw	t0,(a0)\n\t"
+	"sw	t0,(a1)\n\t"
+	"addi	a0,a0,4\n\t"
+	"addi	a1,a1,4\n\t"
+	"j	0b\n"
+    "1:\n\t"
+	/* Switch to application stack.  */
+	"la	sp,__process0_stack_end__-160\n\t"
+	"mv	a0,sp\n\t"
+	"call	chx_init\n\t"
+	"call	chx_systick_init\n\t"
+	"call	gpio_init\n\t"
+	/* Enable interrupts.  */
+	"csrsi	mstatus,8\n\t"
+	/* Call main.  */
+	"call	main\n\t"
+    "3:\n\t"
+	"j	3b"
+	: /* no output */ : /* no input */ : "memory");
+}
--- a/eventflag.c
+++ b/eventflag.c
@@ -1,7 +1,7 @@
 /*
 * eventflag.c - Eventflag
 *
- * Copyright (C) 2013, 2016  Flying Stone Technology
+ * Copyright (C) 2013, 2016, 2018  Flying Stone Technology
 * Author: NIIBE Yutaka <gniibe@fsij.org>
 *
 * This file is a part of Chopstx, a thread library for embedded.
@@ -22,7 +22,7 @@
 * As additional permission under GNU GPL version 3 section 7, you may
 * distribute non-source form of the Program without the copy of the
 * GNU GPL normally required by section 4, provided you inform the
- * receipents of GNU GPL by a written offer.
+ * recipients of GNU GPL by a written offer.
 *
 */

@@ -36,17 +36,29 @@ void
 eventflag_init (struct eventflag *ev)
 {
  ev->flags = 0;
+  ev->mask = ~0;
  chopstx_cond_init (&ev->cond);
  chopstx_mutex_init (&ev->mutex);
 }


+void
+eventflag_set_mask (struct eventflag *ev, eventmask_t m)
+{
+  chopstx_mutex_lock (&ev->mutex);
+  ev->mask = m;
+  if ((ev->flags & ev->mask))
+    chopstx_cond_signal (&ev->cond);
+  chopstx_mutex_unlock (&ev->mutex);
+}
+
+
 static int
 eventflag_check (void *arg)
 {
  struct eventflag *ev = arg;

-  return ev->flags != 0;
+  return (ev->flags & ev->mask) != 0;
 }


@@ -62,6 +74,9 @@ eventflag_prepare_poll (struct eventflag *ev, chopstx_poll_cond_t *poll_desc)
 }


+/* When multiple events are marked, event with lower bit has precedence.
+   Because __builtin_ffs returns the least significant 1-bit.  */
+
 eventmask_t
 eventflag_get (struct eventflag *ev)
 {
@@ -69,7 +84,7 @@ eventflag_get (struct eventflag *ev)
  eventmask_t m;

  chopstx_mutex_lock (&ev->mutex);
-  n = __builtin_ffs (ev->flags);
+  n = __builtin_ffs ((ev->flags & ev->mask));
  if (n)
    {
      m = (1 << (n - 1));
@@ -90,10 +105,10 @@ eventflag_wait (struct eventflag *ev)
  eventmask_t m;

  chopstx_mutex_lock (&ev->mutex);
-  if (!ev->flags)
+  while (!(ev->flags & ev->mask))
    chopstx_cond_wait (&ev->cond, &ev->mutex);

-  n = __builtin_ffs (ev->flags);
+  n = __builtin_ffs ((ev->flags & ev->mask));
  if (n) /* Always n > 0 when waked up, but make sure no bad things.  */
    {
      m = (1 << (n - 1));
@@ -124,6 +139,7 @@ eventflag_signal (struct eventflag *ev, eventmask_t m)
 {
  chopstx_mutex_lock (&ev->mutex);
  ev->flags |= m;
-  chopstx_cond_signal (&ev->cond);
+  if ((ev->flags & ev->mask))
+    chopstx_cond_signal (&ev->cond);
  chopstx_mutex_unlock (&ev->mutex);
 }
--- a/eventflag.h
+++ b/eventflag.h
@@ -2,11 +2,13 @@ typedef uint32_t eventmask_t;

 struct eventflag {
  eventmask_t flags;
+  eventmask_t mask;
  chopstx_mutex_t mutex;
  chopstx_cond_t cond;
 };

 void eventflag_init (struct eventflag *ev);
+void eventflag_set_mask (struct eventflag *ev, eventmask_t m);
 eventmask_t eventflag_wait (struct eventflag *ev);
 eventmask_t eventflag_wait_timeout (struct eventflag *ev, uint32_t usec);
 void eventflag_signal (struct eventflag *ev, eventmask_t m);
--- a/example-cdc-gnu-linux/Makefile
+++ b/example-cdc-gnu-linux/Makefile
@@ -0,0 +1,44 @@
+# Makefile for example application of Chopstx
+
+PROJECT = sample
+
+### This is for GNU/Linux
+
+CHOPSTX = ..
+LDSCRIPT=
+CSRC = sample.c usb-cdc.c command.c
+
+ARCH=gnu-linux
+CHIP=gnu-linux
+USE_SYS = yes
+USE_USB = yes
+USE_ADC = yes
+EMULATION=yes
+
+###################################
+CROSS =
+CC   = $(CROSS)gcc
+LD   = $(CROSS)gcc
+OBJCOPY   = $(CROSS)objcopy
+
+MCU   = none
+CWARN = -Wall -Wextra -Wstrict-prototypes
+DEFS  = -DGNU_LINUX_EMULATION -DUSE_SYS_BOARD_ID
+OPT   = -g # -O3 -Os
+LIBS  = -lpthread
+
+####################
+include ../rules.mk
+
+board.h:
+	@echo Please make a symbolic link \'board.h\' to a file in ../board;
+	@exit 1
+
+distclean: clean
+
+build/flash.data: Makefile
+	@echo 'Generating 8192-byte flash.data'
+	@/bin/echo -n -e '\xff\xff\xff\xff\xff\xff\xff\xff' >$@
+	@for i in $(shell seq 1023); do /bin/echo -n -e '\xff\xff\xff\xff\xff\xff\xff\xff' >>$@; done
+
+
--- a/example-cdc-gnu-linux/README
+++ b/example-cdc-gnu-linux/README
@@ -0,0 +1,41 @@
+(0) Build and generate initial flash data
+
+$ make
+$ make build/flash.data
+
+
+(1) preparation as root 
+
+Don't run ModemManager
+
+# systemctl stop ModemManager
+
+Install USBIP host module
+# modprobe vhci_hcd
+
+
+(2) Run sample program of USBIP server
+
+$ ./sample
+
+
+(3) Use the USB device as root
+
+Attach the Chopstx application program (USBIP device) to USBIP host.
+
+# usbip attach -r 127.0.0.1 -b 1-1
+
+
+(4) Connect CDC-ACM device
+
+$ cu -l /dev/ttyACM0
+
+Then, you see the message from Chopstx.  As you type lines, it echos.
+
+Type RET, ~ then . , you can terminate the session.
+
+
+(5) Detach the USBIP device as root
+
+# usbip detach -p 0
+
--- a/example-cdc-gnu-linux/board.h
+++ b/example-cdc-gnu-linux/board.h
@@ -0,0 +1 @@
+../board/board-gnu-linux.h
--- a/example-cdc-gnu-linux/command.c
+++ b/example-cdc-gnu-linux/command.c
@@ -0,0 +1,579 @@
+#include <string.h>
+#include <stdint.h>
+#include <chopstx.h>
+#include "tty.h"
+#include "config.h"
+#ifdef ADC_SUPPORT
+#include "adc.h"
+static int adc_initialized = 0;
+#endif
+#include "board.h"
+#include "sys.h"
+
+struct command_table
+{
+  const char *name;
+  void (*handler) (struct tty *tty, const char *line);
+};
+
+/*
+ * Put a line (or lines) to TTY.
+ * LINE should be terminated with newline.
+ */
+static void
+put_line (struct tty *tty, const char *line)
+{
+  tty_send (tty, line, strlen (line));
+}
+
+static const char *help_string = 
+  "mdb ADDR [COUNT];       memory display byte\r\n"
+  "mwh ADDR VALUE [COUNT]; memory write halfword\r\n"
+  "fes ADDR [COUNT];       flash erase sector\r\n"
+  "fwh ADDR VALUE [COUNT]; flash write halfword\r\n"
+#ifdef CRC32_SUPPORT
+  "crc32 string;           CRC32 calc string\r\n"
+#endif
+#ifdef ADC_SUPPORT
+  "adc;                    get 256-byte from ADC\r\n"
+#endif
+  "sysinfo;                system information\r\n"
+  "help\r\n";
+
+static char hexchar (uint8_t x)
+{
+  x &= 0x0f;
+  if (x <= 0x09)
+    return '0' + x;
+  else if (x <= 0x0f)
+    return 'a' + x - 10;
+  else
+    return '?';
+}
+
+#ifdef TOUCH_SUPPORT
+static char *
+compose_decimal (char *s, int value)
+{
+  uint32_t v;
+  int col = 1000000000;
+  int d;
+  int digit_output = 0;
+
+  if (value < 0)
+    {
+      *s++ = '-';
+      v = 1 + ~((uint32_t)value);
+    }
+  else
+    v = (uint32_t)value;
+
+  while (col >= 10)
+    {
+      if (v >= (uint32_t)col)
+	{
+	  d = v / col;
+	  v = v - d * col;
+	  *s++ = d + '0';
+	  digit_output = 1;
+	}
+      else if (digit_output)
+	*s++ = '0';
+
+      col = col / 10;
+    }
+
+  *s++ = v + '0';
+
+  return s;
+}
+#endif
+
+
+char *
+compose_hex_ptr (char *s, uintptr_t v)
+{
+  s[0] = hexchar (v >> 60);
+  s[1] = hexchar (v >> 56);
+  s[2] = hexchar (v >> 52);
+  s[3] = hexchar (v >> 48);
+  s[4] = hexchar (v >> 44);
+  s[5] = hexchar (v >> 40);
+  s[6] = hexchar (v >> 36);
+  s[7] = hexchar (v >> 32);
+  s[8] = hexchar (v >> 28);
+  s[9] = hexchar (v >> 24);
+  s[10] = hexchar (v >> 20);
+  s[11] = hexchar (v >> 16);
+  s[12] = hexchar (v >> 12);
+  s[13] = hexchar (v >> 8);
+  s[14] = hexchar (v >> 4);
+  s[15] = hexchar (v);
+  return s+16;
+}
+
+static char *
+compose_hex (char *s, uint32_t v)
+{
+  s[0] = hexchar (v >> 28);
+  s[1] = hexchar (v >> 24);
+  s[2] = hexchar (v >> 20);
+  s[3] = hexchar (v >> 16);
+  s[4] = hexchar (v >> 12);
+  s[5] = hexchar (v >> 8);
+  s[6] = hexchar (v >> 4);
+  s[7] = hexchar (v);
+  return s+8;
+}
+
+static char *
+compose_hex_byte (char *s, uint8_t v)
+{
+  s[0] = hexchar (v >> 4);
+  s[1] = hexchar (v);
+  return s+2;
+}
+
+static const char *
+get_hex (struct tty *tty, const char *s, uintptr_t *v_p)
+{
+  uintptr_t v = 0;
+  char c;
+
+  if (s[0] == '0' && s[1] == 'x')
+    s = s + 2;
+  while (1)
+    {
+      c = *s++;
+
+      if (c == 0)
+	{
+	  s--;
+	  break;
+	}
+
+      if (c == ' ')
+	break;
+
+      v = (v << 4);
+      if (c >= '0' && c <= '9')
+	v += (c - '0');
+      else if (c >= 'a' && c <= 'f')
+	v += (c - 'a') + 10;
+      else if (c >= 'A' && c <= 'F')
+	v += (c - 'A') + 10;
+      else
+	{
+	  put_line (tty, "hex error\r\n");
+	  return NULL;
+	}
+    }
+
+  *v_p = v;
+  return s;
+}
+
+
+#ifdef TOUCH_SUPPORT
+#define TOUCH_VALUE_HIGH 100
+#define TOUCH_VALUE_LOW  50
+static void
+cmd_button (struct tty *tty, const char *line)
+{
+  int i = 0;
+  extern uint16_t touch_get (void);
+  uint16_t v0 = 0;
+  int touched = 0;
+
+  (void)line;
+  put_line (tty, "Please touch the bear.\r\n");
+
+  while (i < 16)
+    {
+      uint16_t v = touch_get ();
+      v0 = (v0 * 2 + v)/3;
+
+      if (touched == 0 && v0 > TOUCH_VALUE_HIGH)
+	{
+	  tty_send (tty, "!", 1);
+	  touched = 1;
+	}
+      else if (touched == 1 && v0 < TOUCH_VALUE_LOW)
+	{
+	  tty_send (tty, ".", 1);
+	  touched = 0;
+	  i++;
+	}
+
+      chopstx_usec_wait (10*1000);
+    }
+
+  tty_send (tty, "\r\n", 2);
+}
+
+static void
+cmd_touch (struct tty *tty, const char *line)
+{
+  int i;
+  extern uint16_t touch_get (void);
+
+  (void)line;
+  put_line (tty, "Please touch the bear.\r\n");
+
+  for (i = 0; i < 20; i++)
+    {
+      uint16_t v;
+      char output[8];
+      char *s;
+
+      chopstx_usec_wait (1000*1000);
+      v = touch_get ();
+      s = compose_decimal (output, v);
+      *s++ = '\r';
+      *s++ = '\n';
+      tty_send (tty, output, s - output);
+    }
+}
+#endif
+
+
+static void
+cmd_mdb (struct tty *tty, const char *line)
+{
+  int i;
+  uintptr_t addr = 0;
+  int count = 0;
+  char c;
+  const char *s = line;
+  
+  s = get_hex (tty, s, &addr);
+  addr &= ~3;
+  if (s == NULL)
+    return;
+
+  if (*s == 0)
+    count = 1;
+  else
+    {
+      while (1)
+	{
+	  c = *s++;
+
+	  if (c == 0 || c == ' ')
+	    break;
+
+	  count = count * 10;
+	  if (c >= '0' && c <= '9')
+	    count += c - '0';
+	  else
+	    {
+	      put_line (tty, "mdb error\r\n");
+	      return;
+	    }
+	}
+    }
+
+  i = 0;
+  while (i < count)
+    {
+      uint8_t v;
+      char output[68];
+      char *s;
+
+      s = compose_hex_ptr (output, addr);
+      *s++ = ':';
+      *s++ = ' ';
+
+      while (1)
+	{
+	  v = *(uint8_t *)addr;
+	  s = compose_hex_byte (s, v);
+	  i++;
+	  addr += 1;
+	  if (i >= count || (i % 16) == 0)
+	    break;
+	  *s++ = ' ';
+	}
+
+      *s++ = '\r';
+      *s++ = '\n';
+      tty_send (tty, output, s - output);
+    }
+}
+
+static void
+cmd_mwh (struct tty *tty, const char *line)
+{
+  (void)tty;
+  (void)line;
+  put_line (tty, "mwh not yet supported\r\n");
+}
+
+static void
+cmd_fes (struct tty *tty, const char *line)
+{
+  int i;
+  uintptr_t addr = 0;
+  int count = 0;
+  char c;
+  const char *s = line;
+  
+  s = get_hex (tty, s, &addr);
+  if (s == NULL)
+    return;
+
+  if (*s == 0)
+    count = 1;
+  else
+    {
+      while (1)
+	{
+	  c = *s++;
+
+	  if (c == 0 || c == ' ')
+	    break;
+
+	  count = count * 10;
+	  if (c >= '0' && c <= '9')
+	    count += c - '0';
+	  else
+	    {
+	      put_line (tty, "fww error\r\n");
+	      return;
+	    }
+	}
+    }
+
+  for (i = 0; i < count; i++)
+    {
+      flash_erase_page (addr);
+      addr += 1024;
+    }
+}
+
+static void
+cmd_fwh (struct tty *tty, const char *line)
+{
+  int i;
+  uintptr_t addr = 0;
+  uintptr_t d;
+  uint16_t value = 0;
+  int count = 0;
+  char c;
+  const char *s = line;
+  
+  s = get_hex (tty, s, &addr);
+  if (s == NULL)
+    return;
+
+  if (*s == 0)
+    return;
+
+  s = get_hex (tty, s, &d);
+  value = (uint16_t)d;
+  if (s == NULL)
+    return;
+
+  if (*s == 0)
+    count = 1;
+  else
+    {
+      while (1)
+	{
+	  c = *s++;
+
+	  if (c == 0 || c == ' ')
+	    break;
+
+	  count = count * 10;
+	  if (c >= '0' && c <= '9')
+	    count += c - '0';
+	  else
+	    {
+	      put_line (tty, "fww error\r\n");
+	      return;
+	    }
+	}
+    }
+
+  for (i = 0; i < count; i++)
+    {
+      flash_program_halfword (addr, value);
+      addr += 4;
+    }
+}
+
+
+#ifdef CRC32_SUPPORT
+static unsigned int crc_value;
+
+static void
+cmd_crc32  (struct tty *tty, const char *line)
+{
+  uint32_t v;
+  char string[10];
+  char *s;
+
+  crc32_init (&crc_value);
+  while (*line)
+    crc32_u8 (&crc_value, *line++);
+  v = crc_value ^ 0xffffffff;
+
+  s = compose_hex (string, v);
+  *s++ = '\r';
+  *s++ = '\n';
+  tty_send (tty, string, sizeof (string));
+}
+#endif
+
+#ifdef ADC_SUPPORT
+static void
+cmd_adc  (struct tty *tty, const char *line)
+{
+  int i;
+  char output[73];
+  char *s;
+
+  (void)line;
+
+  if (!adc_initialized)
+    {
+      if (adc_init ())
+	{
+	  put_line (tty, "adc_init error\r\n");
+	  return;
+	}
+      else
+	{
+	  adc_start ();
+	  adc_initialized = 1;
+	}
+    }
+
+  adc_start_conversion (0, 64);
+  adc_wait_completion ();
+
+  i = 0;
+  s = output;
+  while (1)
+    {
+      s = compose_hex (s, adc_buf[i]);
+      i++;
+      if ((i % 8))
+	*s++ = ' ';
+      else
+	{
+	  *s++ = '\r';
+	  *s++ = '\n';
+	  tty_send (tty, output, s - output);
+	  s = output;
+	  if (i >= 64)
+	    break;
+	}
+    }
+}
+#endif
+
+static void
+cmd_sysinfo (struct tty *tty, const char *line)
+{
+  char output[73];
+  char *s;
+  int i;
+
+  (void)line;
+  memcpy (output, "SYS version: ", 13);
+  s = output + 13; 
+  *s++ = sys_version[2];
+  *s++ = sys_version[4];
+  *s++ = sys_version[6];
+  *s++ = '\r';
+  *s++ = '\n';
+  tty_send (tty, output, s - output);
+
+  memcpy (output, "Board ID: ", 10);
+  s = output + 10; 
+  s = compose_hex (s, sys_board_id);
+  *s++ = '\r';
+  *s++ = '\n';
+  tty_send (tty, output, s - output);
+
+  memcpy (output, "Board name: ", 12);
+  s = output + 12; 
+  for (i = 0; i < (int)sizeof (output) - 2; i ++)
+    if ((*s = sys_board_name[i]) == 0)
+      break;
+    else
+      s++;
+
+  *s++ = '\r';
+  *s++ = '\n';
+  tty_send (tty, output, s - output);
+}
+
+
+static void
+cmd_help (struct tty *tty, const char *line)
+{
+  (void)line;
+  put_line (tty, help_string);
+}
+
+
+struct command_table command_table[] = {
+#ifdef TOUCH_SUPPORT
+  { "button", cmd_button },
+  { "touch", cmd_touch },
+#endif
+  { "mdb", cmd_mdb },
+  { "mwh", cmd_mwh },
+  { "fes", cmd_fes },
+  { "fwh", cmd_fwh },
+#ifdef CRC32_SUPPORT
+  { "crc32", cmd_crc32 },
+#endif
+#ifdef ADC_SUPPORT
+  { "adc", cmd_adc },
+#endif
+  { "sysinfo", cmd_sysinfo },
+  { "help", cmd_help },
+};
+
+#define N_CMDS (int)(sizeof (command_table) / sizeof (struct command_table))
+
+
+/*
+ * Dispatch a command parsing LINE.
+ * Line is NULL terminated with no newline.
+ */
+void
+cmd_dispatch (struct tty *tty, const char *line)
+{
+  int i;
+  const char *p;
+  unsigned int n = 0;
+
+  p = line;
+  while (*p)
+    {
+      if (*p++ == ' ')
+	break;
+      n++;
+    }
+
+  for (i = 0; i < N_CMDS; i++)
+    if (n == strlen (command_table[i].name)
+	&& strncmp ((const char *)line, command_table[i].name, n) == 0)
+      break;
+
+  if (i != N_CMDS)
+    (*command_table[i].handler) (tty, p);
+  else
+    {
+      char crlf[] = { '\r', '\n' };
+
+      put_line (tty, "No such command: ");
+      tty_send (tty, line, n);
+      tty_send (tty, crlf, sizeof (crlf));
+    }
+}
--- a/example-cdc-gnu-linux/command.h
+++ b/example-cdc-gnu-linux/command.h
@@ -0,0 +1,2 @@
+void cmd_dispatch (struct tty *tty, const char *line);
+char * compose_hex_ptr (char *s, uintptr_t v);
--- a/example-cdc-gnu-linux/config.h
+++ b/example-cdc-gnu-linux/config.h
@@ -0,0 +1,2 @@
+#undef CRC32_SUPPORT
+#define ADC_SUPPORT
--- a/example-cdc-gnu-linux/sample.c
+++ b/example-cdc-gnu-linux/sample.c
@@ -0,0 +1,204 @@
+#include <stdint.h>
+#include <stdlib.h>
+#include <string.h>
+#include <ucontext.h>
+
+#include <chopstx.h>
+
+#include "sys.h"
+
+#include "usb_lld.h"
+#include "tty.h"
+#include "command.h"
+
+#include <unistd.h>
+#include <stdio.h>
+
+static chopstx_mutex_t mtx;
+static chopstx_cond_t cnd0;
+static chopstx_cond_t cnd1;
+
+static uint8_t u, v;
+static uint8_t m;		/* 0..100 */
+
+static void *
+pwm (void *arg)
+{
+  (void)arg;
+
+  chopstx_mutex_lock (&mtx);
+  chopstx_cond_wait (&cnd0, &mtx);
+  chopstx_mutex_unlock (&mtx);
+
+  while (1)
+    {
+      set_led (u&v);
+      chopstx_usec_wait (m);
+      set_led (0);
+      chopstx_usec_wait (100-m);
+    }
+
+  return NULL;
+}
+
+static void *
+blk (void *arg)
+{
+  (void)arg;
+
+  chopstx_mutex_lock (&mtx);
+  chopstx_cond_wait (&cnd1, &mtx);
+  chopstx_mutex_unlock (&mtx);
+
+  while (1)
+    {
+      v = 0;
+      chopstx_usec_wait (200*1000);
+      v = 1;
+      chopstx_usec_wait (200*1000);
+    }
+
+  return NULL;
+}
+
+
+#define PRIO_PWM 3
+#define PRIO_BLK 2
+
+static char __process1_stack_base__[4096];
+static char __process2_stack_base__[4096];
+
+#define STACK_ADDR_PWM ((uintptr_t)__process1_stack_base__)
+#define STACK_SIZE_PWM (sizeof __process1_stack_base__)
+
+#define STACK_ADDR_BLK ((uintptr_t)__process2_stack_base__)
+#define STACK_SIZE_BLK (sizeof __process2_stack_base__)
+
+
+static char hexchar (uint8_t x)
+{
+  x &= 0x0f;
+  if (x <= 0x09)
+    return '0' + x;
+  else if (x <= 0x0f)
+    return 'a' + x - 10;
+  else
+    return '?';
+}
+
+
+#ifdef GNU_LINUX_EMULATION
+#define main emulated_main
+#endif
+
+int
+main (int argc, const char *argv[])
+{
+  struct tty *tty;
+  uint8_t count;
+  uintptr_t addr;
+
+  if (argc >= 2 && !strncmp (argv[1], "--debug=", 8))
+    debug = strtol (&argv[1][8], NULL, 10);
+
+  chopstx_mutex_init (&mtx);
+  chopstx_cond_init (&cnd0);
+  chopstx_cond_init (&cnd1);
+
+  m = 10;
+
+  chopstx_create (PRIO_PWM, STACK_ADDR_PWM, STACK_SIZE_PWM, pwm, NULL);
+  chopstx_create (PRIO_BLK, STACK_ADDR_BLK, STACK_SIZE_BLK, blk, NULL);
+
+  chopstx_usec_wait (200*1000);
+
+  chopstx_mutex_lock (&mtx);
+  chopstx_cond_signal (&cnd0);
+  chopstx_cond_signal (&cnd1);
+  chopstx_mutex_unlock (&mtx);
+
+  addr = flash_init ("flash.data");
+  flash_unlock ();
+
+  u = 1;
+
+  tty = tty_open ();
+  tty_wait_configured (tty);
+
+  count = 0;
+  m = 50;
+  while (1)
+    {
+      char s[LINEBUFSIZE];
+
+    connection_loop:
+      u = 1;
+      tty_wait_connection (tty);
+
+      chopstx_usec_wait (50*1000);
+
+      puts("send ZLP");
+      /* Send ZLP at the beginning.  */
+      tty_send (tty, s, 0);
+
+      memcpy (s, "xx: Hello, World with Chopstx!\r\n", 32);
+      s[0] = hexchar (count >> 4);
+      s[1] = hexchar (count & 0x0f);
+
+      puts("send hello");
+      if (tty_send (tty, s, 32) < 0)
+	continue;
+
+      s[0] = hexchar (count >> 4);
+      s[1] = hexchar (count & 0x0f);
+      s[2] = ':';
+      s[3] = ' ';
+      compose_hex_ptr (s+4, addr);
+      s[20] = '\r';
+      s[21] = '\n';
+
+      count++;
+
+      if (tty_send (tty, s, 22) < 0)
+	continue;
+
+      while (1)
+	{
+	  uint32_t usec;
+
+	  /* Prompt */
+	  if (tty_send (tty, "> ", 2) < 0)
+	    break;
+
+	  usec = 3000000;	/* 3.0 seconds */
+	  while (1)
+	    {
+	      int size = tty_recv (tty, s, &usec);
+	      u ^= 1;
+
+	      if (size < 0)
+		goto connection_loop;
+
+	      if (size == 0)
+		/* Timeout */
+		{
+		  if (tty_send (tty, "\r\n", 2) < 0)
+		    return 0;
+		  break;
+		}
+	      else if (size == 1)
+		/* Do nothing but prompt again.  */
+		break;
+	      else if (size)
+		{
+		  /* Newline into NUL */
+		  s[size - 1] = 0;
+		  cmd_dispatch (tty, (char *)s);
+		  break;
+		}
+	    }
+	}
+    }
+
+  return 0;
+}
--- a/example-cdc-gnu-linux/tty.h
+++ b/example-cdc-gnu-linux/tty.h
@@ -0,0 +1,9 @@
+#define LINEBUFSIZE 128
+
+struct tty;
+
+struct tty *tty_open (void);
+void tty_wait_configured (struct tty *tty);
+void tty_wait_connection (struct tty *tty);
+int tty_send (struct tty *tty, const char *buf, int count);
+int tty_recv (struct tty *tty, char *buf, uint32_t *timeout);
--- a/example-cdc-gnu-linux/usb-cdc.c
+++ b/example-cdc-gnu-linux/usb-cdc.c
@@ -0,0 +1,937 @@
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+#include <string.h>
+#include "usb_lld.h"
+#include "tty.h"
+
+static chopstx_intr_t usb_intr;
+
+struct line_coding
+{
+  uint32_t bitrate;
+  uint8_t format;
+  uint8_t paritytype;
+  uint8_t datatype;
+}  __attribute__((packed));
+
+static const struct line_coding line_coding0 = {
+  115200, /* baud rate: 115200    */
+  0x00,   /* stop bits: 1         */
+  0x00,   /* parity:    none      */
+  0x08    /* bits:      8         */
+};
+
+/*
+ * Currently, we only support a single TTY.
+ *
+ * It is possible to extend to support multiple TTYs, for multiple
+ * interfaces.
+ *
+ * In that case, add argument to TTY_OPEN function and
+ * modify TTY_GET function to get the TTY structure.  Functions which
+ * directy accesses TTY0 (usb_device_reset and usb_set_configuration)
+ * should be modified, too.
+ *
+ * Modification of TTY_MAIN thread will be also needed to echo back
+ * input for each TTY, and the thread should run if one of TTY is
+ * opened.
+ */
+
+struct tty {
+  chopstx_mutex_t mtx;
+  chopstx_cond_t cnd;
+  uint8_t inputline[LINEBUFSIZE];   /* Line editing is supported */
+  uint8_t send_buf[LINEBUFSIZE];    /* Sending ring buffer for echo back */
+  uint8_t send_buf0[64];
+  uint8_t recv_buf0[64];
+  uint32_t inputline_len    : 8;
+  uint32_t send_head        : 8;
+  uint32_t send_tail        : 8;
+  uint32_t flag_connected   : 1;
+  uint32_t flag_send_ready  : 1;
+  uint32_t flag_input_avail : 1;
+  uint32_t                  : 2;
+  uint32_t device_state     : 3;     /* USB device status */
+  struct line_coding line_coding;
+};
+
+static struct tty tty0;
+
+/*
+ * Locate TTY structure from interface number or endpoint number.
+ * Currently, it always returns tty0, because we only have the one.
+ */
+static struct tty *
+tty_get (int interface, uint8_t ep_num)
+{
+  struct tty *t = &tty0;
+
+  if (interface >= 0)
+    {
+      if (interface == 0)
+	t = &tty0;
+    }
+  else
+    {
+      if (ep_num == ENDP1 || ep_num == ENDP2 || ep_num == ENDP3)
+	t = &tty0;
+    }
+
+  return t;
+}
+
+
+#define USB_CDC_REQ_SET_LINE_CODING             0x20
+#define USB_CDC_REQ_GET_LINE_CODING             0x21
+#define USB_CDC_REQ_SET_CONTROL_LINE_STATE      0x22
+#define USB_CDC_REQ_SEND_BREAK                  0x23
+
+/* USB Device Descriptor */
+static const uint8_t vcom_device_desc[18] = {
+  18,   /* bLength */
+  DEVICE_DESCRIPTOR,		/* bDescriptorType */
+  0x10, 0x01,			/* bcdUSB = 1.1 */
+  0x02,				/* bDeviceClass (CDC).              */
+  0x00,				/* bDeviceSubClass.                 */
+  0x00,				/* bDeviceProtocol.                 */
+  0x40,				/* bMaxPacketSize.                  */
+  0xFF, 0xFF, /* idVendor  */
+  0x01, 0x00, /* idProduct */
+  0x00, 0x01, /* bcdDevice  */
+  1,				/* iManufacturer.                   */
+  2,				/* iProduct.                        */
+  3,				/* iSerialNumber.                   */
+  1				/* bNumConfigurations.              */
+};
+
+#define VCOM_FEATURE_BUS_POWERED	0x80
+
+/* Configuration Descriptor tree for a CDC.*/
+static const uint8_t vcom_config_desc[67] = {
+  9,
+  CONFIG_DESCRIPTOR,		/* bDescriptorType: Configuration */
+  /* Configuration Descriptor.*/
+  67, 0x00,			/* wTotalLength.                    */
+  0x02,				/* bNumInterfaces.                  */
+  0x01,				/* bConfigurationValue.             */
+  0,				/* iConfiguration.                  */
+  VCOM_FEATURE_BUS_POWERED,	/* bmAttributes.                    */
+  50,				/* bMaxPower (100mA).               */
+  /* Interface Descriptor.*/
+  9,
+  INTERFACE_DESCRIPTOR,
+  0x00,		   /* bInterfaceNumber.                */
+  0x00,		   /* bAlternateSetting.               */
+  0x01,		   /* bNumEndpoints.                   */
+  0x02,		   /* bInterfaceClass (Communications Interface Class,
+		      CDC section 4.2).  */
+  0x02,		   /* bInterfaceSubClass (Abstract Control Model, CDC
+		      section 4.3).  */
+  0x01,		   /* bInterfaceProtocol (AT commands, CDC section
+		      4.4).  */
+  0,	           /* iInterface.                      */
+  /* Header Functional Descriptor (CDC section 5.2.3).*/
+  5,	      /* bLength.                         */
+  0x24,	      /* bDescriptorType (CS_INTERFACE).  */
+  0x00,	      /* bDescriptorSubtype (Header Functional Descriptor). */
+  0x10, 0x01, /* bcdCDC.                          */
+  /* Call Management Functional Descriptor. */
+  5,            /* bFunctionLength.                 */
+  0x24,         /* bDescriptorType (CS_INTERFACE).  */
+  0x01,         /* bDescriptorSubtype (Call Management Functional
+		   Descriptor). */
+  0x03,         /* bmCapabilities (D0+D1).          */
+  0x01,         /* bDataInterface.                  */
+  /* ACM Functional Descriptor.*/
+  4,            /* bFunctionLength.                 */
+  0x24,         /* bDescriptorType (CS_INTERFACE).  */
+  0x02,         /* bDescriptorSubtype (Abstract Control Management
+		   Descriptor).  */
+  0x02,         /* bmCapabilities.                  */
+  /* Union Functional Descriptor.*/
+  5,            /* bFunctionLength.                 */
+  0x24,         /* bDescriptorType (CS_INTERFACE).  */
+  0x06,         /* bDescriptorSubtype (Union Functional
+		   Descriptor).  */
+  0x00,         /* bMasterInterface (Communication Class
+		   Interface).  */
+  0x01,         /* bSlaveInterface0 (Data Class Interface).  */
+  /* Endpoint 2 Descriptor.*/
+  7,
+  ENDPOINT_DESCRIPTOR,
+  ENDP2|0x80,    /* bEndpointAddress.    */
+  0x03,          /* bmAttributes (Interrupt).        */
+  0x08, 0x00,	 /* wMaxPacketSize.                  */
+  0xFF,		 /* bInterval.                       */
+  /* Interface Descriptor.*/
+  9,
+  INTERFACE_DESCRIPTOR, /* bDescriptorType: */
+  0x01,          /* bInterfaceNumber.                */
+  0x00,          /* bAlternateSetting.               */
+  0x02,          /* bNumEndpoints.                   */
+  0x0A,          /* bInterfaceClass (Data Class Interface, CDC section 4.5). */
+  0x00,          /* bInterfaceSubClass (CDC section 4.6). */
+  0x00,          /* bInterfaceProtocol (CDC section 4.7). */
+  0x00,		 /* iInterface.                      */
+  /* Endpoint 3 Descriptor.*/
+  7,
+  ENDPOINT_DESCRIPTOR,		/* bDescriptorType: Endpoint */
+  ENDP3,    /* bEndpointAddress. */
+  0x02,				/* bmAttributes (Bulk).             */
+  0x40, 0x00,			/* wMaxPacketSize.                  */
+  0x00,				/* bInterval.                       */
+  /* Endpoint 1 Descriptor.*/
+  7,
+  ENDPOINT_DESCRIPTOR,		/* bDescriptorType: Endpoint */
+  ENDP1|0x80,			/* bEndpointAddress. */
+  0x02,				/* bmAttributes (Bulk).             */
+  0x40, 0x00,			/* wMaxPacketSize.                  */
+  0x00				/* bInterval.                       */
+};
+
+
+/*
+ * U.S. English language identifier.
+ */
+static const uint8_t vcom_string0[4] = {
+  4,				/* bLength */
+  STRING_DESCRIPTOR,
+  0x09, 0x04			/* LangID = 0x0409: US-English */
+};
+
+static const uint8_t vcom_string1[] = {
+  23*2+2,			/* bLength */
+  STRING_DESCRIPTOR,		/* bDescriptorType */
+  /* Manufacturer: "Flying Stone Technology" */
+  'F', 0, 'l', 0, 'y', 0, 'i', 0, 'n', 0, 'g', 0, ' ', 0, 'S', 0,
+  't', 0, 'o', 0, 'n', 0, 'e', 0, ' ', 0, 'T', 0, 'e', 0, 'c', 0,
+  'h', 0, 'n', 0, 'o', 0, 'l', 0, 'o', 0, 'g', 0, 'y', 0, 
+};
+
+static const uint8_t vcom_string2[] = {
+  14*2+2,			/* bLength */
+  STRING_DESCRIPTOR,		/* bDescriptorType */
+  /* Product name: "Chopstx Sample" */
+  'C', 0, 'h', 0, 'o', 0, 'p', 0, 's', 0, 't', 0, 'x', 0, ' ', 0,
+  'S', 0, 'a', 0, 'm', 0, 'p', 0, 'l', 0, 'e', 0,
+};
+
+/*
+ * Serial Number string.
+ */
+static const uint8_t vcom_string3[28] = {
+  28,				    /* bLength */
+  STRING_DESCRIPTOR,		    /* bDescriptorType */
+  '0', 0,  '.', 0,  '0', 0, '0', 0, /* Version number */
+};
+
+
+#define NUM_INTERFACES 2
+
+
+static void
+usb_device_reset (struct usb_dev *dev)
+{
+  usb_lld_reset (dev, VCOM_FEATURE_BUS_POWERED);
+
+  /* Initialize Endpoint 0 */
+  usb_lld_setup_endp (dev, ENDP0, 1, 1);
+
+  chopstx_mutex_lock (&tty0.mtx);
+  tty0.inputline_len = 0;
+  tty0.send_head = tty0.send_tail = 0;
+  tty0.flag_connected = 0;
+  tty0.flag_send_ready = 1;
+  tty0.flag_input_avail = 0;
+  tty0.device_state = USB_DEVICE_STATE_ATTACHED;
+  memcpy (&tty0.line_coding, &line_coding0, sizeof (struct line_coding));
+  chopstx_mutex_unlock (&tty0.mtx);
+}
+
+
+#define CDC_CTRL_DTR            0x0001
+
+static void
+usb_ctrl_write_finish (struct usb_dev *dev)
+{
+  struct device_req *arg = &dev->dev_req;
+  uint8_t type_rcp = arg->type & (REQUEST_TYPE|RECIPIENT);
+
+  if (type_rcp == (CLASS_REQUEST | INTERFACE_RECIPIENT) && arg->index == 0
+      && USB_SETUP_SET (arg->type)
+      && arg->request == USB_CDC_REQ_SET_CONTROL_LINE_STATE)
+    {
+      struct tty *t = tty_get (arg->index, 0);
+
+      /* Open/close the connection.  */
+      chopstx_mutex_lock (&t->mtx);
+      t->flag_connected = ((arg->value & CDC_CTRL_DTR) != 0);
+      chopstx_cond_signal (&t->cnd);
+      chopstx_mutex_unlock (&t->mtx);
+    }
+
+  /*
+   * The transaction was already finished.  So, it is no use to call
+   * usb_lld_ctrl_error when the condition does not match.
+   */
+}
+
+
+
+static int
+vcom_port_data_setup (struct usb_dev *dev)
+{
+  struct device_req *arg = &dev->dev_req;
+
+  if (USB_SETUP_GET (arg->type))
+    {
+      struct tty *t = tty_get (arg->index, 0);
+
+      if (arg->request == USB_CDC_REQ_GET_LINE_CODING)
+	return usb_lld_ctrl_send (dev, &t->line_coding,
+				  sizeof (struct line_coding));
+    }
+  else  /* USB_SETUP_SET (req) */
+    {
+      if (arg->request == USB_CDC_REQ_SET_LINE_CODING
+	  && arg->len == sizeof (struct line_coding))
+	{
+	  struct tty *t = tty_get (arg->index, 0);
+
+	  return usb_lld_ctrl_recv (dev, &t->line_coding,
+				    sizeof (struct line_coding));
+	}
+      else if (arg->request == USB_CDC_REQ_SET_CONTROL_LINE_STATE)
+	return usb_lld_ctrl_ack (dev);
+    }
+
+  return -1;
+}
+
+static int
+usb_setup (struct usb_dev *dev)
+{
+  struct device_req *arg = &dev->dev_req;
+  uint8_t type_rcp = arg->type & (REQUEST_TYPE|RECIPIENT);
+
+  if (type_rcp == (CLASS_REQUEST | INTERFACE_RECIPIENT) && arg->index == 0)
+    return vcom_port_data_setup (dev);
+
+  return -1;
+}
+
+static int
+usb_get_descriptor (struct usb_dev *dev)
+{
+  struct device_req *arg = &dev->dev_req;
+  uint8_t rcp = arg->type & RECIPIENT;
+  uint8_t desc_type = (arg->value >> 8);
+  uint8_t desc_index = (arg->value & 0xff);
+
+  if (rcp != DEVICE_RECIPIENT)
+    return -1;
+
+  if (desc_type == DEVICE_DESCRIPTOR)
+    return usb_lld_ctrl_send (dev,
+			      vcom_device_desc, sizeof (vcom_device_desc));
+  else if (desc_type == CONFIG_DESCRIPTOR)
+    return usb_lld_ctrl_send (dev,
+			      vcom_config_desc, sizeof (vcom_config_desc));
+  else if (desc_type == STRING_DESCRIPTOR)
+    {
+      const uint8_t *str;
+      int size;
+
+      switch (desc_index)
+	{
+	case 0:
+	  str = vcom_string0;
+	  size = sizeof (vcom_string0);
+	  break;
+	case 1:
+	  str = vcom_string1;
+	  size = sizeof (vcom_string1);
+	  break;
+	case 2:
+	  str = vcom_string2;
+	  size = sizeof (vcom_string2);
+	  break;
+	case 3:
+	  str = vcom_string3;
+	  size = sizeof (vcom_string3);
+	  break;
+	default:
+	  return -1;
+	}
+
+      return usb_lld_ctrl_send (dev, str, size);
+    }
+
+  return -1;
+}
+
+static void
+vcom_setup_endpoints_for_interface (struct usb_dev *dev,
+				    uint16_t interface, int stop)
+{
+  if (interface == 0)
+    {
+      if (!stop)
+	usb_lld_setup_endp (dev, ENDP2, 0, 1);
+      else
+	usb_lld_stall_tx (ENDP2);
+    }
+  else if (interface == 1)
+    {
+      if (!stop)
+	{
+	  usb_lld_setup_endp (dev, ENDP1, 0, 1);
+	  usb_lld_setup_endp (dev, ENDP3, 1, 0);
+	  /* Start with no data receiving (ENDP3 not enabled)*/
+	}
+      else
+	{
+	  usb_lld_stall_tx (ENDP1);
+	  usb_lld_stall_rx (ENDP3);
+	}
+    }
+}
+
+static int
+usb_set_configuration (struct usb_dev *dev)
+{
+  int i;
+  uint8_t current_conf;
+
+  current_conf = usb_lld_current_configuration (dev);
+  if (current_conf == 0)
+    {
+      if (dev->dev_req.value != 1)
+	return -1;
+
+      usb_lld_set_configuration (dev, 1);
+      for (i = 0; i < NUM_INTERFACES; i++)
+	vcom_setup_endpoints_for_interface (dev, i, 0);
+      chopstx_mutex_lock (&tty0.mtx);
+      tty0.device_state = USB_DEVICE_STATE_CONFIGURED;
+      chopstx_cond_signal (&tty0.cnd);
+      chopstx_mutex_unlock (&tty0.mtx);
+    }
+  else if (current_conf != dev->dev_req.value)
+    {
+      if (dev->dev_req.value != 0)
+	return -1;
+
+      usb_lld_set_configuration (dev, 0);
+      for (i = 0; i < NUM_INTERFACES; i++)
+	vcom_setup_endpoints_for_interface (dev, i, 1);
+      chopstx_mutex_lock (&tty0.mtx);
+      tty0.device_state = USB_DEVICE_STATE_ADDRESSED;
+      chopstx_cond_signal (&tty0.cnd);
+      chopstx_mutex_unlock (&tty0.mtx);
+    }
+
+  return usb_lld_ctrl_ack (dev);
+}
+
+
+static int
+usb_set_interface (struct usb_dev *dev)
+{
+  uint16_t interface = dev->dev_req.index;
+  uint16_t alt = dev->dev_req.value;
+
+  if (interface >= NUM_INTERFACES)
+    return -1;
+
+  if (alt != 0)
+    return -1;
+  else
+    {
+      vcom_setup_endpoints_for_interface (dev, interface, 0);
+      return usb_lld_ctrl_ack (dev);
+    }
+}
+
+static int
+usb_get_interface (struct usb_dev *dev)
+{
+  const uint8_t zero = 0;
+  uint16_t interface = dev->dev_req.index;
+
+  if (interface >= NUM_INTERFACES)
+    return -1;
+
+  /* We don't have alternate interface, so, always return 0.  */
+  return usb_lld_ctrl_send (dev, &zero, 1);
+}
+
+static int
+usb_get_status_interface (struct usb_dev *dev)
+{
+  const uint16_t status_info = 0;
+  uint16_t interface = dev->dev_req.index;
+
+  if (interface >= NUM_INTERFACES)
+    return -1;
+
+  return usb_lld_ctrl_send (dev, &status_info, 2);
+}
+
+
+/*
+ * Put a character into the ring buffer to be send back.
+ */
+static void
+put_char_to_ringbuffer (struct tty *t, int c)
+{
+  uint32_t next = (t->send_tail + 1) % LINEBUFSIZE;
+
+  if (t->send_head == next)
+    /* full */
+    /* All that we can do is ignore this char. */
+    return;
+  
+  t->send_buf[t->send_tail] = c;
+  t->send_tail = next;
+}
+
+/*
+ * Get characters from ring buffer into S.
+ */
+static int
+get_chars_from_ringbuffer (struct tty *t, uint8_t *s, int len)
+{
+  int i = 0;
+
+  if (t->send_head == t->send_tail)
+    /* Empty */
+    return i;
+
+  do
+    {
+      s[i++] = t->send_buf[t->send_head];
+      t->send_head = (t->send_head + 1) % LINEBUFSIZE;
+    }
+  while (t->send_head != t->send_tail && i < len);
+
+  return i;
+}
+
+
+static void
+tty_echo_char (struct tty *t, int c)
+{
+  put_char_to_ringbuffer (t, c);
+}
+
+static void
+usb_tx_done (uint8_t ep_num, uint16_t len)
+{
+  struct tty *t = tty_get (-1, ep_num);
+
+  (void)len;
+  if (ep_num == ENDP1)
+    {
+      chopstx_mutex_lock (&t->mtx);
+      if (t->flag_send_ready == 0)
+	{
+	  t->flag_send_ready = 1;
+	  chopstx_cond_signal (&t->cnd);
+	}
+      chopstx_mutex_unlock (&t->mtx);
+    }
+  else if (ep_num == ENDP2)
+    {
+      /* Nothing */
+    }
+}
+
+
+static int
+tty_input_char (struct tty *t, int c)
+{
+  unsigned int i;
+  int r = 0;
+
+  /* Process DEL, C-U, C-R, and RET as editing command. */
+  chopstx_mutex_lock (&t->mtx);
+  switch (c)
+    {
+    case 0x0d: /* Control-M */
+      t->inputline[t->inputline_len++] = '\n';
+      tty_echo_char (t, 0x0d);
+      tty_echo_char (t, 0x0a);
+      t->flag_input_avail = 1;
+      r = 1;
+      chopstx_cond_signal (&t->cnd);
+      break;
+    case 0x12: /* Control-R */
+      tty_echo_char (t, '^');
+      tty_echo_char (t, 'R');
+      tty_echo_char (t, 0x0d);
+      tty_echo_char (t, 0x0a);
+      for (i = 0; i < t->inputline_len; i++)
+	tty_echo_char (t, t->inputline[i]);
+      break;
+    case 0x15: /* Control-U */
+      for (i = 0; i < t->inputline_len; i++)
+	{
+	  tty_echo_char (t, 0x08);
+	  tty_echo_char (t, 0x20);
+	  tty_echo_char (t, 0x08);
+	}
+      t->inputline_len = 0;
+      break;
+    case 0x7f: /* DEL    */
+      if (t->inputline_len > 0)
+	{
+	  tty_echo_char (t, 0x08);
+	  tty_echo_char (t, 0x20);
+	  tty_echo_char (t, 0x08);
+	  t->inputline_len--;
+	}
+      break;
+    default:
+      if (t->inputline_len < sizeof (t->inputline) - 1)
+	{
+	  tty_echo_char (t, c);
+	  t->inputline[t->inputline_len++] = c;
+	}
+      else
+	/* Beep */
+	tty_echo_char (t, 0x0a);
+      break;
+    }
+  chopstx_mutex_unlock (&t->mtx);
+  return r;
+}
+
+static void
+usb_rx_ready (uint8_t ep_num, uint16_t len)
+{
+  struct tty *t = tty_get (-1, ep_num);
+  if (ep_num == ENDP3)
+    {
+      int i;
+
+      for (i = 0; i < len; i++)
+	if (tty_input_char (t, t->recv_buf0[i]))
+	  break;
+
+      chopstx_mutex_lock (&t->mtx);
+      if (t->flag_input_avail == 0)
+	usb_lld_rx_enable_buf (ENDP3, t->recv_buf0, 64);
+      chopstx_mutex_unlock (&t->mtx);
+    }
+}
+
+static void *tty_main (void *arg);
+
+#define PRIO_TTY      4
+
+static char __process3_stack_base__[4096];
+#define STACK_ADDR_TTY ((uintptr_t)__process3_stack_base__)
+#define STACK_SIZE_TTY (sizeof __process3_stack_base__)
+
+struct tty *
+tty_open (void)
+{
+  chopstx_mutex_init (&tty0.mtx);
+  chopstx_cond_init (&tty0.cnd);
+  tty0.inputline_len = 0;
+  tty0.send_head = tty0.send_tail = 0;
+  tty0.flag_connected = 0;
+  tty0.flag_send_ready = 1;
+  tty0.flag_input_avail = 0;
+  tty0.device_state = USB_DEVICE_STATE_UNCONNECTED;
+  memcpy (&tty0.line_coding, &line_coding0, sizeof (struct line_coding));
+
+  chopstx_create (PRIO_TTY, STACK_ADDR_TTY, STACK_SIZE_TTY, tty_main, &tty0);
+  return &tty0;
+}
+
+
+static void *
+tty_main (void *arg)
+{
+  struct tty *t = arg;
+  struct usb_dev dev;
+  int e;
+
+  chopstx_claim_irq (&usb_intr, INTR_REQ_USB);
+  usb_lld_init (&dev, VCOM_FEATURE_BUS_POWERED);
+
+  while (1)
+    {
+      chopstx_intr_wait (&usb_intr);
+      if (usb_intr.ready)
+	{
+	  uint8_t ep_num;
+
+	  /*
+	   * When interrupt is detected, call usb_lld_event_handler.
+	   * The event may be one of following:
+	   *    (1) Transfer to endpoint (bulk or interrupt)
+	   *        In this case EP_NUM is encoded in the variable E.
+	   *    (2) "NONE" event: some trasfer was done, but all was
+	   *        done by lower layer, no other work is needed in
+	   *        upper layer.
+	   *    (3) Device events: Reset or Suspend
+	   *    (4) Device requests to the endpoint zero.
+	   *        
+	   */
+	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&usb_intr);
+	  ep_num = USB_EVENT_ENDP (e);
+
+	  if (ep_num != 0)
+	    {
+	      if (USB_EVENT_TXRX (e))
+		usb_tx_done (ep_num, USB_EVENT_LEN (e));
+	      else
+		usb_rx_ready (ep_num, USB_EVENT_LEN (e));
+	    }
+	  else
+	    switch (USB_EVENT_ID (e))
+	      {
+	      case USB_EVENT_DEVICE_RESET:
+		usb_device_reset (&dev);
+		continue;
+
+	      case USB_EVENT_DEVICE_ADDRESSED:
+		/* The addres is assigned to the device.  We don't
+		 * need to do anything for this actually, but in this
+		 * application, we maintain the USB status of the
+		 * device.  Usually, just "continue" as EVENT_OK is
+		 * OK.
+		 */
+		chopstx_mutex_lock (&tty0.mtx);
+		tty0.device_state = USB_DEVICE_STATE_ADDRESSED;
+		chopstx_cond_signal (&tty0.cnd);
+		chopstx_mutex_unlock (&tty0.mtx);
+		continue;
+
+	      case USB_EVENT_GET_DESCRIPTOR:
+		if (usb_get_descriptor (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_SET_CONFIGURATION:
+		if (usb_set_configuration (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_SET_INTERFACE:
+		if (usb_set_interface (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_CTRL_REQUEST:
+		/* Device specific device request.  */
+		if (usb_setup (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_GET_STATUS_INTERFACE:
+		if (usb_get_status_interface (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_GET_INTERFACE:
+		if (usb_get_interface (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_SET_FEATURE_DEVICE:
+	      case USB_EVENT_SET_FEATURE_ENDPOINT:
+	      case USB_EVENT_CLEAR_FEATURE_DEVICE:
+	      case USB_EVENT_CLEAR_FEATURE_ENDPOINT:
+		usb_lld_ctrl_ack (&dev);
+		continue;
+
+	      case USB_EVENT_CTRL_WRITE_FINISH:
+		/* Control WRITE transfer finished.  */
+		usb_ctrl_write_finish (&dev);
+		continue;
+
+	      case USB_EVENT_OK:
+	      case USB_EVENT_DEVICE_SUSPEND:
+	      default:
+		continue;
+	      }
+	}
+
+      chopstx_mutex_lock (&t->mtx);
+      if (t->device_state == USB_DEVICE_STATE_CONFIGURED && t->flag_connected
+	  && t->flag_send_ready)
+	{
+	  uint8_t line[32];
+	  int len = get_chars_from_ringbuffer (t, line, sizeof (line));
+
+	  if (len)
+	    {
+	      memcpy (t->send_buf0, line, len);
+	      usb_lld_tx_enable_buf (ENDP1, t->send_buf0, len);
+	      t->flag_send_ready = 0;
+	    }
+	}
+      chopstx_mutex_unlock (&t->mtx);
+    }
+
+  return NULL;
+}
+
+
+void
+tty_wait_configured (struct tty *t)
+{
+  chopstx_mutex_lock (&t->mtx);
+  while (t->device_state != USB_DEVICE_STATE_CONFIGURED)
+    chopstx_cond_wait (&t->cnd, &t->mtx);
+  chopstx_mutex_unlock (&t->mtx);
+}
+
+
+void
+tty_wait_connection (struct tty *t)
+{
+  chopstx_mutex_lock (&t->mtx);
+  while (t->flag_connected == 0)
+    chopstx_cond_wait (&t->cnd, &t->mtx);
+  t->flag_send_ready = 1;
+  t->flag_input_avail = 0;
+  t->send_head = t->send_tail = 0;
+  t->inputline_len = 0;
+  usb_lld_rx_enable_buf (ENDP3, t->recv_buf0, 64); /* Accept input for line */
+  chopstx_mutex_unlock (&t->mtx);
+}
+
+static int
+check_tx (struct tty *t)
+{
+  if (t->flag_send_ready)
+    /* TX done */
+    return 1;
+  if (t->flag_connected == 0)
+    /* Disconnected */
+    return -1;
+  return 0;
+}
+
+int
+tty_send (struct tty *t, const char *buf, int len)
+{
+  int r;
+  const char *p;
+  int count;
+
+  p = buf;
+  count = len >= 64 ? 64 : len;
+
+  while (1)
+    {
+      chopstx_mutex_lock (&t->mtx);
+      while ((r = check_tx (t)) == 0)
+	chopstx_cond_wait (&t->cnd, &t->mtx);
+      if (r > 0)
+	{
+	  usb_lld_tx_enable_buf (ENDP1, p, count);
+	  t->flag_send_ready = 0;
+	}
+      chopstx_mutex_unlock (&t->mtx);
+
+      len -= count;
+      p += count;
+      if (len == 0 && count != 64)
+	/*
+	 * The size of the last packet should be != 0
+	 * If 64, send ZLP (zelo length packet)
+	 */
+	break;
+      count = len >= 64 ? 64 : len;
+    }
+
+  /* Wait until all sent. */
+  chopstx_mutex_lock (&t->mtx);
+  while ((r = check_tx (t)) == 0)
+    chopstx_cond_wait (&t->cnd, &t->mtx);
+  chopstx_mutex_unlock (&t->mtx);
+  return r;
+}
+
+
+static int
+check_rx (void *arg)
+{
+  struct tty *t = arg;
+
+  if (t->flag_input_avail)
+    /* RX */
+    return 1;
+  if (t->flag_connected == 0)
+    /* Disconnected */
+    return 1;
+  return 0;
+}
+
+/*
+ * Returns -1 on connection close
+ *          0 on timeout.
+ *          >0 length of the inputline (including final \n) 
+ *
+ */
+int
+tty_recv (struct tty *t, char *buf, uint32_t *timeout)
+{
+  int r;
+  chopstx_poll_cond_t poll_desc;
+
+  poll_desc.type = CHOPSTX_POLL_COND;
+  poll_desc.ready = 0;
+  poll_desc.cond = &t->cnd;
+  poll_desc.mutex = &t->mtx;
+  poll_desc.check = check_rx;
+  poll_desc.arg = t;
+
+  while (1)
+    {
+      struct chx_poll_head *pd_array[1] = {
+	(struct chx_poll_head *)&poll_desc
+      };
+      chopstx_poll (timeout, 1, pd_array);
+      chopstx_mutex_lock (&t->mtx);
+      r = check_rx (t);
+      chopstx_mutex_unlock (&t->mtx);
+      if (r)
+	break;
+      else if (timeout != NULL && *timeout == 0)
+	{
+	  int i;
+
+	  /* Cancel the input.	*/
+	  for (i = 0; i < t->inputline_len; i++)
+	    tty_send (t, "\x08\x20\x08", 3);
+	  t->inputline_len = 0;
+	  break;
+	}
+    }
+
+  chopstx_mutex_lock (&t->mtx);
+  if (t->flag_connected == 0)
+    r = -1;
+  else if (t->flag_input_avail)
+    {
+      r = t->inputline_len;
+      memcpy (buf, t->inputline, r);
+      t->flag_input_avail = 0;
+      usb_lld_rx_enable_buf (ENDP3, t->recv_buf0, 64);
+      t->inputline_len = 0;
+    }
+  else
+    r = 0;
+  chopstx_mutex_unlock (&t->mtx);
+
+  return r;
+}
--- a/example-cdc/Makefile
+++ b/example-cdc/Makefile
@@ -3,13 +3,15 @@
 PROJECT = sample

 CHOPSTX = ..
-LDSCRIPT= sample.ld
+LDSCRIPT= sample.ld.m4
 CSRC = sample.c usb-cdc.c

-CHIP=stm32f103
+ARCH=cortex-m
+CHIP=stm32l4

 USE_SYS = yes
 USE_USB = yes
+ENABLE_OUTPUT_HEX=yes

 ###################################
 CROSS = arm-none-eabi-
@@ -17,9 +19,9 @@ CC   = $(CROSS)gcc
 LD   = $(CROSS)gcc
 OBJCOPY   = $(CROSS)objcopy

-MCU   = cortex-m3
+MCU   = cortex-m4
 CWARN = -Wall -Wextra -Wstrict-prototypes
-DEFS  = -DUSE_SYS3 -DFREE_STANDING
+DEFS  = -DUSE_SYS3 -DFREE_STANDING -DMHZ=80
 OPT   = -O3 -Os -g
 LIBS  =

--- a/example-cdc/board.h
+++ b/example-cdc/board.h
@@ -1 +1 @@
-../board/board-fst-01.h
+../board/board-st-nucleo-l432.h
--- a/example-cdc/sample.c
+++ b/example-cdc/sample.c
@@ -61,14 +61,14 @@ blk (void *arg)
 #define PRIO_PWM 3
 #define PRIO_BLK 2

-extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
-extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
-
-#define STACK_ADDR_PWM ((uint32_t)__process1_stack_base__)
-#define STACK_SIZE_PWM ((uint32_t)__process1_stack_size__)
-
-#define STACK_ADDR_BLK ((uint32_t)__process2_stack_base__)
-#define STACK_SIZE_BLK ((uint32_t)__process2_stack_size__)
+#define STACK_MAIN
+#define STACK_PROCESS_1
+#define STACK_PROCESS_2
+#include "stack-def.h"
+#define STACK_ADDR_PWM ((uint32_t)process1_base)
+#define STACK_SIZE_PWM (sizeof process1_base)
+#define STACK_ADDR_BLK ((uint32_t)process2_base)
+#define STACK_SIZE_BLK (sizeof process2_base)


 static char hexchar (uint8_t x)
--- a/example-cdc/sample.ld
+++ b/example-cdc/sample.ld
@@ -1,11 +1,6 @@
 /*
 * ST32F103 memory setup.
 */
-__main_stack_size__      = 0x0100; /* Idle+Exception handlers */
-__process0_stack_size__  = 0x0400; /* Main program            */
-__process1_stack_size__  = 0x0200; /* first thread program    */
-__process2_stack_size__  = 0x0200; /* second thread program   */
-__process3_stack_size__  = 0x0200; /* third thread program    */

 MEMORY
 {
@@ -78,34 +73,21 @@ SECTIONS
    _etext = .;
    _textdata = _etext;

-    .process_stack :
+    .process_stack (NOLOAD) :
    {
        . = ALIGN(8);
-        __process3_stack_base__ = .;
-        . += __process3_stack_size__;
+        *(.process_stack.3)
+        *(.process_stack.2)
+        *(.process_stack.1)
+        *(.process_stack.0)
        . = ALIGN(8);
-        __process3_stack_end__ = .;
-        __process2_stack_base__ = .;
-        . += __process2_stack_size__;
-        . = ALIGN(8);
-        __process2_stack_end__ = .;
-        __process1_stack_base__ = .;
-        . += __process1_stack_size__;
-        . = ALIGN(8);
-        __process1_stack_end__ = .;
-        __process0_stack_base__ = .;
-        . += __process0_stack_size__;
-        . = ALIGN(8);
-        __process0_stack_end__ = .;
    } > ram

-    .main_stack :
+    .main_stack (NOLOAD) :
    {
        . = ALIGN(8);
-        __main_stack_base__ = .;
-        . += __main_stack_size__;
+        *(.main_stack)
        . = ALIGN(8);
-        __main_stack_end__ = .;
    } > ram

    .data :
--- a/example-cdc/sample.ld.m4
+++ b/example-cdc/sample.ld.m4
@@ -0,0 +1,107 @@
+/*
+ * ST32L4 memory setup.
+ */
+MEMORY
+{
+    flash  : org = 0x08000000, len = 256k
+    ram : org = 0x20000000, len = 48k
+}
+
+__ram_start__           = ORIGIN(ram);
+__ram_size__            = 20k;
+__ram_end__             = __ram_start__ + __ram_size__;
+
+SECTIONS
+{
+    . = 0;
+
+    _text = .;
+
+    .startup : ALIGN(128) SUBALIGN(128)
+    {
+        KEEP(*(.startup.vectors))
+        . = ALIGN(16);
+	_sys = .;
+	. = ALIGN(16);
+	KEEP(*(.sys.version))
+	KEEP(*(.sys.board_id))
+	KEEP(*(.sys.board_name))
+	build/sys-*.o(.text)
+	build/sys-*.o(.text.*)
+	build/sys-*.o(.rodata)
+	build/sys-*.o(.rodata.*)
+	. = ALIGN(1024);
+    } > flash =0xffffffff
+
+    .text : ALIGN(16) SUBALIGN(16)
+    {
+        *(.text.startup.*)
+        *(.text)
+        *(.text.*)
+        *(.rodata)
+        *(.rodata.*)
+        *(.glue_7t)
+        *(.glue_7)
+        *(.gcc*)
+	. = ALIGN(8);
+    } > flash
+
+    .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
+
+    .ARM.exidx : {
+        PROVIDE(__exidx_start = .);
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+        PROVIDE(__exidx_end = .);
+     } > flash
+
+    .eh_frame_hdr : {*(.eh_frame_hdr)} > flash
+
+    .eh_frame : ONLY_IF_RO {*(.eh_frame)} > flash
+
+    .textalign : ONLY_IF_RO { . = ALIGN(8); } > flash
+
+    _etext = .;
+    _textdata = _etext;
+
+    .stacks (NOLOAD) :
+    {
+        *(.main_stack)
+        *(.process_stack.0)
+        *(.process_stack.1)
+        *(.process_stack.2)
+        *(.process_stack.3)
+        . = ALIGN(8);
+    } > ram
+
+    .data :
+    {
+        . = ALIGN(4);
+        PROVIDE(_data = .);
+        *(.data)
+        . = ALIGN(4);
+        *(.data.*)
+        . = ALIGN(4);
+        *(.ramtext)
+        . = ALIGN(4);
+        PROVIDE(_edata = .);
+    } > ram AT > flash
+
+    .bss :
+    {
+        . = ALIGN(4);
+        PROVIDE(_bss_start = .);
+        *(.bss)
+        . = ALIGN(4);
+        *(.bss.*)
+        . = ALIGN(4);
+        *(COMMON)
+        . = ALIGN(4);
+        PROVIDE(_bss_end = .);
+    } > ram
+
+    PROVIDE(end = .);
+    _end            = .;
+}
+
+__heap_base__   = _end;
+__heap_end__    = __ram_end__;
--- a/example-cdc/stack-def.h
+++ b/example-cdc/stack-def.h
@@ -0,0 +1,24 @@
+#if defined(STACK_MAIN)
+/* Idle+Exception handlers */
+char __main_stack_end__[0] __attribute__ ((section(".main_stack")));
+char main_base[0x0100] __attribute__ ((section(".main_stack")));
+
+/* Main program            */
+char __process0_stack_end__[0] __attribute__ ((section(".process_stack.0")));
+char process0_base[0x0400] __attribute__ ((section(".process_stack.0")));
+#endif
+
+/* First thread program    */
+#if defined(STACK_PROCESS_1)
+char process1_base[0x0200] __attribute__ ((section(".process_stack.1"))); 
+#endif
+
+/* Second thread program   */
+#if defined(STACK_PROCESS_2)
+char process2_base[0x0200] __attribute__ ((section(".process_stack.2")));
+#endif
+
+/* Third thread program    */
+#if defined(STACK_PROCESS_3)
+char process3_base[0x0200] __attribute__ ((section(".process_stack.3")));
+#endif
--- a/example-cdc/usb-cdc.c
+++ b/example-cdc/usb-cdc.c
@@ -2,6 +2,7 @@
 #include <stdlib.h>
 #include <chopstx.h>
 #include <string.h>
+#include "board.h"
 #include "usb_lld.h"
 #include "tty.h"

@@ -248,7 +249,7 @@ usb_device_reset (struct usb_dev *dev)
  tty0.flag_connected = 0;
  tty0.flag_send_ready = 1;
  tty0.flag_input_avail = 0;
-  tty0.device_state = ATTACHED;
+  tty0.device_state = USB_DEVICE_STATE_ATTACHED;
  memcpy (&tty0.line_coding, &line_coding0, sizeof (struct line_coding));
  chopstx_mutex_unlock (&tty0.mtx);
 }
@@ -417,7 +418,7 @@ usb_set_configuration (struct usb_dev *dev)
      for (i = 0; i < NUM_INTERFACES; i++)
 	vcom_setup_endpoints_for_interface (i, 0);
      chopstx_mutex_lock (&tty0.mtx);
-      tty0.device_state = CONFIGURED;
+      tty0.device_state = USB_DEVICE_STATE_CONFIGURED;
      chopstx_cond_signal (&tty0.cnd);
      chopstx_mutex_unlock (&tty0.mtx);
    }
@@ -430,7 +431,7 @@ usb_set_configuration (struct usb_dev *dev)
      for (i = 0; i < NUM_INTERFACES; i++)
 	vcom_setup_endpoints_for_interface (i, 1);
      chopstx_mutex_lock (&tty0.mtx);
-      tty0.device_state = ADDRESSED;
+      tty0.device_state = USB_DEVICE_STATE_ADDRESSED;
      chopstx_cond_signal (&tty0.cnd);
      chopstx_mutex_unlock (&tty0.mtx);
    }
@@ -639,12 +640,12 @@ usb_rx_ready (uint8_t ep_num, uint16_t len)

 static void *tty_main (void *arg);

-#define INTR_REQ_USB 20
 #define PRIO_TTY      4

-extern uint8_t __process3_stack_base__[], __process3_stack_size__[];
-#define STACK_ADDR_TTY ((uint32_t)__process3_stack_base__)
-#define STACK_SIZE_TTY ((uint32_t)__process3_stack_size__)
+#define STACK_PROCESS_3
+#include "stack-def.h"
+#define STACK_ADDR_TTY ((uint32_t)process3_base)
+#define STACK_SIZE_TTY (sizeof process3_base)

 struct tty *
 tty_open (void)
@@ -656,7 +657,7 @@ tty_open (void)
  tty0.flag_connected = 0;
  tty0.flag_send_ready = 1;
  tty0.flag_input_avail = 0;
-  tty0.device_state = UNCONNECTED;
+  tty0.device_state = USB_DEVICE_STATE_UNCONNECTED;
  memcpy (&tty0.line_coding, &line_coding0, sizeof (struct line_coding));

  chopstx_create (PRIO_TTY, STACK_ADDR_TTY, STACK_SIZE_TTY, tty_main, &tty0);
@@ -671,31 +672,8 @@ tty_main (void *arg)
  struct usb_dev dev;
  int e;

-#if defined(OLDER_SYS_H)
-  /*
-   * Historically (before sys < 3.0), NVIC priority setting for USB
-   * interrupt was done in usb_lld_sys_init.  Thus this code.
-   *
-   * When USB interrupt occurs between usb_lld_init (which assumes
-   * ISR) and chopstx_claim_irq (which clears pending interrupt),
-   * invocation of usb_lld_event_handler won't occur.
-   *
-   * Calling usb_lld_event_handler is no harm even if there were no
-   * interrupts, thus, we call it unconditionally here, just in case
-   * if there is a request.
-   *
-   * We can't call usb_lld_init after chopstx_claim_irq, as
-   * usb_lld_init does its own setting for NVIC.  Calling
-   * chopstx_claim_irq after usb_lld_init overrides that.
-   *
-   */
-  usb_lld_init (&dev, VCOM_FEATURE_BUS_POWERED);
-  chopstx_claim_irq (&usb_intr, INTR_REQ_USB);
-  goto event_handle;
-#else
  chopstx_claim_irq (&usb_intr, INTR_REQ_USB);
  usb_lld_init (&dev, VCOM_FEATURE_BUS_POWERED);
-#endif

  while (1)
    {
@@ -703,9 +681,7 @@ tty_main (void *arg)
      if (usb_intr.ready)
 	{
 	  uint8_t ep_num;
-#if defined(OLDER_SYS_H)
-	event_handle:
-#endif
+
 	  /*
 	   * When interrupt is detected, call usb_lld_event_handler.
 	   * The event may be one of following:
@@ -719,6 +695,7 @@ tty_main (void *arg)
 	   *        
 	   */
 	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&usb_intr);
 	  ep_num = USB_EVENT_ENDP (e);

 	  if (ep_num != 0)
@@ -743,7 +720,7 @@ tty_main (void *arg)
 		 * OK.
 		 */
 		chopstx_mutex_lock (&tty0.mtx);
-		tty0.device_state = ADDRESSED;
+		tty0.device_state = USB_DEVICE_STATE_ADDRESSED;
 		chopstx_cond_signal (&tty0.cnd);
 		chopstx_mutex_unlock (&tty0.mtx);
 		continue;
@@ -799,11 +776,11 @@ tty_main (void *arg)
 	}

      chopstx_mutex_lock (&t->mtx);
-      if (t->device_state == CONFIGURED && t->flag_connected
+      if (t->device_state == USB_DEVICE_STATE_CONFIGURED && t->flag_connected
 	  && t->flag_send_ready)
 	{
 	  uint8_t line[32];
-	  int len = get_chars_from_ringbuffer (t, line, sizeof (len));
+	  int len = get_chars_from_ringbuffer (t, line, sizeof (line));

 	  if (len)
 	    {
@@ -823,7 +800,7 @@ void
 tty_wait_configured (struct tty *t)
 {
  chopstx_mutex_lock (&t->mtx);
-  while (t->device_state != CONFIGURED)
+  while (t->device_state != USB_DEVICE_STATE_CONFIGURED)
    chopstx_cond_wait (&t->cnd, &t->mtx);
  chopstx_mutex_unlock (&t->mtx);
 }
--- a/example-fraucheky/EXAMPLE-README
+++ b/example-fraucheky/EXAMPLE-README
@@ -0,0 +1,43 @@
+(0) configure and make
+
+This example assumes that you have fraucheky source code
+along with chopstx.
+
+    --- chopstx --- chostx --- example-fraucheky
+                 |
+                 \- fraucheky
+
+
+If you use vendor id and product id of 234b:0004 under
+the condition of FSIJ, you can configure this program as:
+
+    $ ./configure --vidpid=234b:0004
+
+then, invoke make.
+
+    $ make
+
+
+(1) preparation as root 
+
+Install USBIP host module
+# modprobe vhci_hcd
+
+
+(2) Run sample program of USBIP server
+
+$ ./sample-msc
+
+
+(3) Use the USB device as root
+
+Attach the Chopstx application program (USBIP device) to USBIP host.
+
+# usbip attach -r 127.0.0.1 -b 1-1
+
+
+(4) Use the USB Mass Storage Class device
+
+You can mount the storage.
+
+Unmounting the storage, the program will exit.
--- a/example-fraucheky/INDEX.HTM
+++ b/example-fraucheky/INDEX.HTM
@@ -0,0 +1,62 @@
+<!DOCTYPE html PUBLIC "-//W3C//DTD XHTML 1.0 Strict//EN"
+    "http://www.w3.org/TR/xhtml1/DTD/xhtml1-strict.dtd">
+<html xmlns="http://www.w3.org/1999/xhtml" xml:lang="en" lang="en">
+<head><title>How to use this device</title>
+<meta http-equiv="content-type" content="text/html; charset=utf-8" />
+</head>
+
+<body>
+<h1>How to use this device</h1>
+<h2>Introduction</h2>
+<p>This is an example program for GNU/Linux to see how 
+   Chopstx works with USB emulation by USBIP.</p>
+<p>Now, you are accessing this file.
+   It means that the device is running as USB memory
+   (USB Mass Storage Class device).</p>
+
+<h2>README, GNU GPL and Corresponding Source code</h2>
+<p>In this program, it contains copyrighted software that is licensed under
+   the GPLv3.  Please see README for the explanation of the software and see
+   GNU GPLv3 for terms and conditions.</p>
+<p>You may obtain the complete Corresponding Source code from git repositories.
+   This program uses Chopstx for RTOS, and Fraucheky for
+   GPL container.  Those code are availabe in the Chopstx repository.</p>
+<p>You can also download tarballs from the repository.</p>
+<ul>
+  <li><a href="README">README</a></li>
+  <li><a href="COPYING">GNU GPLv3</a></li>
+  <li><a href="https://anonscm.debian.org/cgit/gnuk/chopstx/">Chopstx Repository</a></li>
+  <li><a href="https://git.gniibe.org/gitweb/?p=chopstx/chopstx.git;a=snapshot;h=@REVISION_CHOPSTX@;sf=tgz">Chopstx tarball</a></li>
+  <li><a href="https://git.gniibe.org/gitweb/?p=chopstx/fraucheky.git;a=snapshot;h=@REVISION_FRAUCHEKY@;sf=tgz">Fraucheky tarball</a></li>
+</ul>
+
+<h3>Source code by physical media</h3>
+<p>For those who want source code by physical media, Flying Stone Technology sells a microSD card (with SD card adapter) which contains all repositories at git.gniibe.org.</p>
+<p>The price is JPY1000 for a single media including tax and shipment in Japan.  Please use YUUBIN-FURIKAE account of Flying Stone Technology below.  Note that the account name is in Japanese (which means: Flying Stone Technology).</p>
+<p>On the form of YUUBIN-FURIKAE, you specify your address and you can write some message.  The media will be sent to your address written in the form.</p>
+<ul>
+  <li>Account No: 00110-2-346446</li>
+  <li>Account name: Tobiishi Gijutsu</li>
+</ul>
+
+<p>If it is difficult for you to use YUUBIN-FURIKAE, please write to the following address.</p>
+<ul>
+  <li>Niibe Yutaka</li>
+  <li>Flying Stone Technology</li>
+  <li>1-5-14 Iwagami, Maebashi</li>
+  <li>Gunma, 371-0031 JAPAN</li>
+</ul>
+
+<p>This source code offer will be valid for three years after the shipment of this device or at least until 2021-03-31.</p>
+
+<h2>Links</h2>
+<ul>
+  <li><a href="https://www.gniibe.org/category/fst-01.html">
+      FST-01 support pages</a></li>
+  <li><a href="https://lists.alioth.debian.org/mailman/listinfo/gnuk-users">
+      Mailing list: Gnuk Users</a></li>
+  <li><a href="https://www.gnu.org/gnu/manifesto.ja.html">
+      GNU Manifesto (Japanese Translation)</a></li>
+</ul>
+</body>
+</html>
--- a/example-fraucheky/Makefile
+++ b/example-fraucheky/Makefile
@@ -0,0 +1,46 @@
+# Makefile for NeuG
+
+# Define project name here
+PROJECT = sample-msc
+
+CHOPSTX = ..
+FRAUCHEKY = ../../fraucheky
+LDSCRIPT=
+
+CSRC = main.c
+ARCH=gnu-linux
+CHIP=gnu-linux
+USE_SYS = yes
+USE_USB = yes
+EMULATION=yes
+# USE_ADC = yes
+
+include $(FRAUCHEKY)/src.mk
+
+###################################
+CROSS =
+CC   = $(CROSS)gcc
+LD   = $(CROSS)gcc
+OBJCOPY   = $(CROSS)objcopy
+
+MCU   = none
+CWARN = -Wall -Wextra -Wstrict-prototypes
+DEFS  = -DGNU_LINUX_EMULATION
+OPT   = -O3 -g
+LIBS  = -lpthread
+
+BFDNAME_OBJ=elf64-x86-64
+BFDARCH=i386:x86-64
+
+#######################
+include $(CHOPSTX)/rules.mk
+
+include $(FRAUCHEKY)/build.mk
+###################################
+
+board.h:
+	@echo Please run configure to have a symbolic link \'board.h\'
+	@exit 1
+
+distclean:: clean
+	-rm -f config.h
--- a/example-fraucheky/board.h
+++ b/example-fraucheky/board.h
@@ -0,0 +1 @@
+../board/board-gnu-linux.h
--- a/example-fraucheky/config.h.in
+++ b/example-fraucheky/config.h.in
@@ -0,0 +1,2 @@
+@FRAUCHEKY_DEFINE@
+@FRAUCHEKY_MSC_DEFINE@
--- a/example-fraucheky/configure
+++ b/example-fraucheky/configure
@@ -0,0 +1,137 @@
+#! /bin/bash
+
+# This is bash which supports ANSI-C Quoting
+nl=$'\n'
+
+# Default settings
+help=no
+vidpid=none
+verbose=no
+debug=no
+with_fraucheky=yes
+with_index=./INDEX.HTM
+
+if test -d ../.git; then
+  REVISION=`git describe --dirty="-modified"`
+  REVISION_CHOPSTX=`cd .. && git describe --dirty="-modified"`
+  REVISION_FRAUCHEKY=`cd ../../fraucheky &&git describe --dirty="-modified"`
+else
+  REVISION=`cat ../VERSION`
+  REVISION_CHOPSTX=`cat ../VERSION`
+  REVISION_FRAUCHEKY=`cat ../../fraucheky/VERSION`
+fi
+
+# Process each option
+for option; do
+  case $option in
+  *=*)	optarg=`expr "X$option" : '[^=]*=\(.*\)'` ;;
+  *)	optarg=yes ;;
+  esac
+
+  case $option in
+  -h | --help)
+    help=yes ;;
+  -v | --verbose)
+    verbose=yes ;;
+  --vidpid=*)
+    vidpid=$optarg ;;
+  *)
+    echo "Unrecognized option \`$option'" >&2
+    echo "Try \`$0 --help' for more information." >&2
+    exit 1
+    ;;
+  esac
+done
+
+if test "$help" = "yes"; then
+  cat <<EOF
+Usage: $0 [OPTION]...
+
+Defaults for the options are specified in brackets.
+
+Configuration:
+  -h, --help		display this help and exit	[no]
+  --vidpid=VID:PID	specify vendor/product ID	[<NONE>]
+  --with-index=INDEX	specify INDEX file		[none]
+EOF
+  exit 0
+fi
+
+if test "$vidpid" = "none"; then
+  echo "Please specify Vendor ID and Product ID by --vidpid option." >&2
+  exit 1
+fi
+
+VIDPID="$vidpid"
+VERSION="0100"
+PRODUCT="Fraucheky"
+VENDOR="Free Software Initiative of Japan"
+SERIALNO="FSIJ-`cat ../VERSION | sed -e 's%^[^/]*/%%'`-"
+
+
+../../fraucheky/configure "$vidpid" $with_index $REVISION $REVISION_CHOPSTX $REVISION_FRAUCHEKY
+
+ENABLE_FRAUCHEKY=""
+FRAUCHEKY_DEFINE="#define FRAUCHEKY_SUPPORT 1"
+FRAUCHEKY_MSC_DEFINE="#define MSC_INTERFACE_NO    2"
+if ! test -f ../../fraucheky/build.mk; then
+  echo "'fraucheky' not found" >&2
+  exit 1
+fi
+
+output_vid_pid_version () {
+  echo $VIDPID | sed -n -e "s%^\([0-9a-f][0-9a-f]\)\([0-9a-f][0-9a-f]\):\([0-9a-f][0-9a-f]\)\([0-9a-f][0-9a-f]\)$%  0x\2, 0x\1, /* idVendor  */\\${nl}  0x\4, 0x\3, /* idProduct */%p"
+  echo $VERSION | sed -n -e "s%^\([0-9a-f][0-9a-f]\)\([0-9a-f][0-9a-f]\)$%  0x\2, 0x\1, /* bcdDevice */%p"
+}
+
+output_vendor_product_serial_strings () {
+  prefix=$1
+
+  echo "static const uint8_t ${prefix}string_vendor[] = {"
+  echo "  ${#VENDOR}*2+2,			/* bLength */"
+  echo "  STRING_DESCRIPTOR,		/* bDescriptorType */"
+  echo "  /* Manufacturer: \"$VENDOR\" */"
+  echo $VENDOR | sed -e "s/\(........\)/\1\\${nl}/g" | sed -n -e "s/\(.\)/'\1', 0, /g" -e "s/^/  /" -e "/^  ./s/ $//p"
+  echo '};'
+  echo
+  echo "static const uint8_t ${prefix}string_product[] = {"
+  echo "  ${#PRODUCT}*2+2,			/* bLength */"
+  echo "  STRING_DESCRIPTOR,		/* bDescriptorType */"
+  echo "  /* Product name: \"$PRODUCT\" */"
+  echo $PRODUCT | sed -e "s/\(........\)/\1\\${nl}/g" | sed -n -e "s/\(.\)/'\1', 0, /g" -e "s/^/  /" -e "/^  ./s/ $//p"
+  echo '};'
+
+  if test -n "$prefix"; then
+  echo
+  echo "static uint8_t ${prefix}string_serial[] = {"
+  echo "  ${#SERIALNO}*2+2+16,			/* bLength */"
+  echo "  STRING_DESCRIPTOR,    	/* bDescriptorType */"
+  echo "  /* Serial number: \"$SERIALNO\" */"
+  echo $SERIALNO | sed -e "s/\(........\)/\1\\${nl}/g" | sed -n -e "s/\(.\)/'\1', 0, /g" -e "s/^/  /" -e "/^  ./s/ $//p"
+  echo "  0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,"
+  echo "  0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,"
+  echo '};'
+  echo
+  echo "static const uint8_t ${prefix}revision_detail[] = {"
+  echo "  ${#REVISION}*2+2,			/* bLength */"
+  echo "  STRING_DESCRIPTOR,    	/* bDescriptorType */"
+  echo "  /* revision detail: \"$REVISION\" */"
+  echo $REVISION | sed -e "s/\(........\)/\1\\${nl}/g" | sed -n -e "s/\(.\)/'\1', 0, /g" -e "s/^/  /" -e "/^  ./s/ $//p"
+  echo '};'
+  echo
+  echo "static const uint8_t ${prefix}config_options[] = {"
+  echo "  ${#CONFIG}*2+2,			/* bLength */"
+  echo "  STRING_DESCRIPTOR,    	/* bDescriptorType */"
+  echo "  /* configure options: \"$CONFIG\" */"
+  echo $CONFIG | sed -e "s/\(........\)/\1\\${nl}/g" | sed -n -e "s/\(.\)/'\1', 0, /g" -e "s/^/  /" -e "/^  ./s/ $//p"
+  echo '};'
+  fi
+}
+
+output_vid_pid_version > fraucheky-vid-pid-ver.c.inc
+output_vendor_product_serial_strings >fraucheky-usb-strings.c.inc
+
+sed -e "s/@FRAUCHEKY_DEFINE@/$FRAUCHEKY_DEFINE/" \
+    -e "s/@FRAUCHEKY_MSC_DEFINE@/$FRAUCHEKY_MSC_DEFINE/" \
+	< config.h.in > config.h
+exit 0
--- a/example-fraucheky/main.c
+++ b/example-fraucheky/main.c
@@ -0,0 +1,316 @@
+#include <stdint.h>
+#include <string.h>
+#include <signal.h>
+#include <chopstx.h>
+
+#include "config.h"
+#include "usb_lld.h"
+
+#define NUM_INTERFACES 1
+#define FEATURE_BUS_POWERED	0x80
+
+static chopstx_mutex_t usb_mtx;
+static chopstx_cond_t usb_cnd;
+static uint32_t bDeviceState = USB_DEVICE_STATE_UNCONNECTED;
+
+extern void EP6_IN_Callback (uint16_t len);
+extern void EP6_OUT_Callback (uint16_t len);
+
+#define MSC_MASS_STORAGE_RESET_COMMAND 0xFF
+extern int fraucheky_enabled (void);
+extern void fraucheky_init (void);
+extern void fraucheky_main (void);
+
+extern void fraucheky_setup_endpoints_for_interface (struct usb_dev *dev, int stop);
+extern int fraucheky_setup (struct usb_dev *dev);
+extern int fraucheky_get_descriptor (struct usb_dev *dev);
+
+static void
+setup_endpoints_for_interface (struct usb_dev *dev, uint16_t interface, int stop)
+{
+  if (interface == 0)
+    fraucheky_setup_endpoints_for_interface (dev, stop);
+}
+
+static void
+usb_device_reset (struct usb_dev *dev)
+{
+  int i;
+
+  usb_lld_reset (dev, FEATURE_BUS_POWERED);
+
+  /* Initialize Endpoint 0.  */
+  usb_lld_setup_endp (dev, ENDP0, 1, 1);
+
+  /* Notify upper layer.  */
+  chopstx_mutex_lock (&usb_mtx);
+  bDeviceState = USB_DEVICE_STATE_ATTACHED;
+  chopstx_cond_signal (&usb_cnd);
+  chopstx_mutex_unlock (&usb_mtx);
+}
+
+static void
+usb_ctrl_write_finish (struct usb_dev *dev)
+{
+  struct device_req *arg = &dev->dev_req;
+  uint8_t type_rcp = arg->type & (REQUEST_TYPE|RECIPIENT);
+
+  if (type_rcp == (CLASS_REQUEST | INTERFACE_RECIPIENT) && arg->index == 0
+	   && USB_SETUP_SET (arg->type))
+    {
+      if (arg->request == MSC_MASS_STORAGE_RESET_COMMAND)
+	fraucheky_setup_endpoints_for_interface (dev, 0);
+    }
+}
+
+static int
+usb_setup (struct usb_dev *dev)
+{
+  struct device_req *arg = &dev->dev_req;
+  uint8_t type_rcp = arg->type & (REQUEST_TYPE|RECIPIENT);
+
+  if (type_rcp == (CLASS_REQUEST | INTERFACE_RECIPIENT)
+      && arg->index == 0)
+    return fraucheky_setup (dev);
+
+  return -1;
+}
+
+static int
+usb_set_configuration (struct usb_dev *dev)
+{
+  int i;
+  uint8_t current_conf;
+
+  current_conf = usb_lld_current_configuration (dev);
+  if (current_conf == 0)
+    {
+      if (dev->dev_req.value != 1)
+	return -1;
+
+      usb_lld_set_configuration (dev, 1);
+      for (i = 0; i < NUM_INTERFACES; i++)
+	setup_endpoints_for_interface (dev, i, 0);
+      chopstx_mutex_lock (&usb_mtx);
+      bDeviceState = USB_DEVICE_STATE_CONFIGURED;
+      chopstx_mutex_unlock (&usb_mtx);
+    }
+  else if (current_conf != dev->dev_req.value)
+    {
+      if (dev->dev_req.value != 0)
+	return -1;
+
+      usb_lld_set_configuration (dev, 0);
+      for (i = 0; i < NUM_INTERFACES; i++)
+	setup_endpoints_for_interface (dev, i, 1);
+      chopstx_mutex_lock (&usb_mtx);
+      bDeviceState = USB_DEVICE_STATE_ADDRESSED;
+      chopstx_cond_signal (&usb_cnd);
+      chopstx_mutex_unlock (&usb_mtx);
+    }
+
+  /* Do nothing when current_conf == value */
+  return usb_lld_ctrl_ack (dev);
+}
+
+
+static int
+usb_set_interface (struct usb_dev *dev)
+{
+  uint16_t interface = dev->dev_req.index;
+  uint16_t alt = dev->dev_req.value;
+
+  if (interface >= NUM_INTERFACES)
+    return -1;
+
+  if (alt != 0)
+    return -1;
+  else
+    {
+      setup_endpoints_for_interface (dev, interface, 0);
+      return usb_lld_ctrl_ack (dev);
+    }
+}
+
+static int
+usb_get_interface (struct usb_dev *dev)
+{
+  const uint8_t zero = 0;
+  uint16_t interface = dev->dev_req.index;
+
+  if (interface >= NUM_INTERFACES)
+    return -1;
+
+  return usb_lld_ctrl_send (dev, &zero, 1);
+}
+
+
+static int
+usb_get_status_interface (struct usb_dev *dev)
+{
+  const uint16_t status_info = 0;
+  uint16_t interface = dev->dev_req.index;
+
+  if (interface >= NUM_INTERFACES)
+    return -1;
+
+  return usb_lld_ctrl_send (dev, &status_info, 2);
+}
+
+static void usb_tx_done (uint8_t ep_num, uint16_t len);
+static void usb_rx_ready (uint8_t ep_num, uint16_t len);
+
+
+#define PRIO_USB 3
+
+static void *
+usb_main (void *arg)
+{
+  chopstx_intr_t interrupt;
+  struct usb_dev dev;
+  int e;
+
+  (void)arg;
+  chopstx_claim_irq (&interrupt, INTR_REQ_USB);
+  usb_lld_init (&dev, FEATURE_BUS_POWERED);
+
+  while (1)
+    {
+      chopstx_intr_wait (&interrupt);
+
+      if (interrupt.ready)
+	{
+	  uint8_t ep_num;
+
+	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&interrupt);
+	  ep_num = USB_EVENT_ENDP (e);
+
+	  if (ep_num != 0)
+	    {
+	      if (USB_EVENT_TXRX (e))
+		usb_tx_done (ep_num, USB_EVENT_LEN (e));
+	      else
+		usb_rx_ready (ep_num, USB_EVENT_LEN (e));
+	    }
+	  else
+	    switch (USB_EVENT_ID (e))
+	      {
+	      case USB_EVENT_DEVICE_RESET:
+		usb_device_reset (&dev);
+		continue;
+
+	      case USB_EVENT_DEVICE_ADDRESSED:
+		chopstx_mutex_lock (&usb_mtx);
+		bDeviceState = USB_DEVICE_STATE_ADDRESSED;
+		chopstx_cond_signal (&usb_cnd);
+		chopstx_mutex_unlock (&usb_mtx);
+		continue;
+
+	      case USB_EVENT_GET_DESCRIPTOR:
+		if (fraucheky_get_descriptor (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_SET_CONFIGURATION:
+		if (usb_set_configuration (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_SET_INTERFACE:
+		if (usb_set_interface (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_CTRL_REQUEST:
+		/* Device specific device request.  */
+		if (usb_setup (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_GET_STATUS_INTERFACE:
+		if (usb_get_status_interface (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_GET_INTERFACE:
+		if (usb_get_interface (&dev) < 0)
+		  usb_lld_ctrl_error (&dev);
+		continue;
+
+	      case USB_EVENT_SET_FEATURE_DEVICE:
+	      case USB_EVENT_SET_FEATURE_ENDPOINT:
+	      case USB_EVENT_CLEAR_FEATURE_DEVICE:
+	      case USB_EVENT_CLEAR_FEATURE_ENDPOINT:
+		usb_lld_ctrl_ack (&dev);
+		continue;
+
+	      case USB_EVENT_CTRL_WRITE_FINISH:
+		/* Control WRITE transfer finished.  */
+		usb_ctrl_write_finish (&dev);
+		continue;
+
+	      case USB_EVENT_OK:
+	      case USB_EVENT_DEVICE_SUSPEND:
+	      default:
+		continue;
+	      }
+	}
+    }
+
+  return NULL;
+}
+
+static void
+usb_tx_done (uint8_t ep_num, uint16_t len)
+{
+  if (ep_num == ENDP6)
+    EP6_IN_Callback (len);
+}
+
+static void
+usb_rx_ready (uint8_t ep_num, uint16_t len)
+{
+  if (ep_num == ENDP6)
+    EP6_OUT_Callback (len);
+}
+
+static char __process3_stack_base__[4096];
+
+#define STACK_ADDR_USB ((uintptr_t)__process3_stack_base__)
+#define STACK_SIZE_USB (sizeof __process3_stack_base__)
+
+#ifdef GNU_LINUX_EMULATION
+#define main emulated_main
+#endif
+
+/*
+ * Entry point.
+ *
+ * NOTE: the main function is already a thread in the system on entry.
+ */
+int
+main (int argc, char **argv)
+{
+  chopstx_t usb_thd;
+
+  (void)argc;
+  (void)argv;
+
+  chopstx_mutex_init (&usb_mtx);
+  chopstx_cond_init (&usb_cnd);
+
+  bDeviceState = USB_DEVICE_STATE_UNCONNECTED;
+  usb_thd = chopstx_create (PRIO_USB, STACK_ADDR_USB, STACK_SIZE_USB,
+			    usb_main, NULL);
+  fraucheky_init ();
+  while (bDeviceState != USB_DEVICE_STATE_CONFIGURED)
+    chopstx_usec_wait (250*1000);
+  fraucheky_main ();
+  chopstx_cancel (usb_thd);
+  chopstx_join (usb_thd, NULL);
+  usb_lld_shutdown ();
+  bDeviceState = USB_DEVICE_STATE_UNCONNECTED;
+
+  return 0;
+}
--- a/example-fs-bb48/Makefile
+++ b/example-fs-bb48/Makefile
@@ -7,6 +7,7 @@ PROJECT = sample
 CHOPSTX = ..
 LDSCRIPT= sample.ld
 CSRC = sample.c usb-cdc.c command.c touch.c
+ARCH=cortex-m
 CHIP=mkl27z

 USE_SYS = yes
--- a/example-fs-bb48/touch.c
+++ b/example-fs-bb48/touch.c
@@ -74,6 +74,7 @@ touch_get (void)
  TPM1->SC = 0;
  TPM1->CNT = 0xffff;	   /* Writing causes reset of the counter.  */

+  chopstx_intr_done (&tpm1_intr);
  return v;
 }

--- a/example-fs-bb48/usb-cdc.c
+++ b/example-fs-bb48/usb-cdc.c
@@ -245,7 +245,7 @@ usb_device_reset (struct usb_dev *dev)
  tty0.flag_connected = 0;
  tty0.flag_send_ready = 1;
  tty0.flag_input_avail = 0;
-  tty0.device_state = ATTACHED;
+  tty0.device_state = USB_DEVICE_STATE_ATTACHED;
  memcpy (&tty0.line_coding, &line_coding0, sizeof (struct line_coding));
  chopstx_mutex_unlock (&tty0.mtx);
 }
@@ -409,7 +409,7 @@ usb_set_configuration (struct usb_dev *dev)
      for (i = 0; i < NUM_INTERFACES; i++)
 	vcom_setup_endpoints_for_interface (dev, i, 0);
      chopstx_mutex_lock (&tty0.mtx);
-      tty0.device_state = CONFIGURED;
+      tty0.device_state = USB_DEVICE_STATE_CONFIGURED;
      chopstx_cond_signal (&tty0.cnd);
      chopstx_mutex_unlock (&tty0.mtx);
    }
@@ -422,7 +422,7 @@ usb_set_configuration (struct usb_dev *dev)
      for (i = 0; i < NUM_INTERFACES; i++)
 	vcom_setup_endpoints_for_interface (dev, i, 1);
      chopstx_mutex_lock (&tty0.mtx);
-      tty0.device_state = ADDRESSED;
+      tty0.device_state = USB_DEVICE_STATE_ADDRESSED;
      chopstx_cond_signal (&tty0.cnd);
      chopstx_mutex_unlock (&tty0.mtx);
    }
@@ -626,7 +626,6 @@ usb_rx_ready (uint8_t ep_num, uint16_t len)

 static void *tty_main (void *arg);

-#define INTR_REQ_USB 24
 #define PRIO_TTY      4

 extern uint8_t __process3_stack_base__[], __process3_stack_size__[];
@@ -643,7 +642,7 @@ tty_open (void)
  tty0.flag_connected = 0;
  tty0.flag_send_ready = 1;
  tty0.flag_input_avail = 0;
-  tty0.device_state = UNCONNECTED;
+  tty0.device_state = USB_DEVICE_STATE_UNCONNECTED;
  memcpy (&tty0.line_coding, &line_coding0, sizeof (struct line_coding));

  chopstx_create (PRIO_TTY, STACK_ADDR_TTY, STACK_SIZE_TTY, tty_main, &tty0);
@@ -658,31 +657,8 @@ tty_main (void *arg)
  struct usb_dev dev;
  int e;

-#if defined(OLDER_SYS_H)
-  /*
-   * Historically (before sys < 3.0), NVIC priority setting for USB
-   * interrupt was done in usb_lld_sys_init.  Thus this code.
-   *
-   * When USB interrupt occurs between usb_lld_init (which assumes
-   * ISR) and chopstx_claim_irq (which clears pending interrupt),
-   * invocation of usb_lld_event_handler won't occur.
-   *
-   * Calling usb_lld_event_handler is no harm even if there were no
-   * interrupts, thus, we call it unconditionally here, just in case
-   * if there is a request.
-   *
-   * We can't call usb_lld_init after chopstx_claim_irq, as
-   * usb_lld_init does its own setting for NVIC.  Calling
-   * chopstx_claim_irq after usb_lld_init overrides that.
-   *
-   */
-  usb_lld_init (&dev, VCOM_FEATURE_BUS_POWERED);
-  chopstx_claim_irq (&usb_intr, INTR_REQ_USB);
-  goto event_handle;
-#else
  chopstx_claim_irq (&usb_intr, INTR_REQ_USB);
  usb_lld_init (&dev, VCOM_FEATURE_BUS_POWERED);
-#endif

  while (1)
    {
@@ -693,9 +669,7 @@ tty_main (void *arg)
      if (usb_intr.ready)
 	{
 	  uint8_t ep_num;
-#if defined(OLDER_SYS_H)
-	event_handle:
-#endif
+
 	  /*
 	   * When interrupt is detected, call usb_lld_event_handler.
 	   * The event may be one of following:
@@ -709,6 +683,7 @@ tty_main (void *arg)
 	   *        
 	   */
 	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&usb_intr);
 	  ep_num = USB_EVENT_ENDP (e);

 	  if (ep_num != 0)
@@ -733,7 +708,7 @@ tty_main (void *arg)
 		 * OK.
 		 */
 		chopstx_mutex_lock (&tty0.mtx);
-		tty0.device_state = ADDRESSED;
+		tty0.device_state = USB_DEVICE_STATE_ADDRESSED;
 		chopstx_cond_signal (&tty0.cnd);
 		chopstx_mutex_unlock (&tty0.mtx);
 		continue;
@@ -789,11 +764,11 @@ tty_main (void *arg)
 	}

      chopstx_mutex_lock (&t->mtx);
-      if (t->device_state == CONFIGURED && t->flag_connected
+      if (t->device_state == USB_DEVICE_STATE_CONFIGURED && t->flag_connected
 	  && t->flag_send_ready)
 	{
 	  uint8_t line[32];
-	  int len = get_chars_from_ringbuffer (t, line, sizeof (len));
+	  int len = get_chars_from_ringbuffer (t, line, sizeof (line));

 	  if (len)
 	    {
@@ -813,7 +788,7 @@ void
 tty_wait_configured (struct tty *t)
 {
  chopstx_mutex_lock (&t->mtx);
-  while (t->device_state != CONFIGURED)
+  while (t->device_state != USB_DEVICE_STATE_CONFIGURED)
    chopstx_cond_wait (&t->cnd, &t->mtx);
  chopstx_mutex_unlock (&t->mtx);
 }
--- a/example-fsm-55/Makefile
+++ b/example-fsm-55/Makefile
@@ -7,6 +7,9 @@ LDSCRIPT= hacker-emblem.ld

 CSRC = reset.c hh.c

+ARCH=cortex-m
+CHIP=stm32f0
+
 # Hacker Emblem and "Happy Hacking!" demonstration
 # CSRC = reset.c hh.c

@@ -25,7 +28,7 @@ OBJCOPY   = $(CROSS)objcopy
 MCU   = cortex-m0 # -save-temps
 CWARN = -Wall -Wextra -Wstrict-prototypes
 DEFS  = -DMAKE_ENTRY_PUBLIC \
-        -DFREE_STANDING -DMHZ=48 -DUSE_WFI_FOR_IDLE
+        -DFREE_STANDING -DMHZ=48
 OPT   = -O3 -Os -g
 LIBS  =

--- a/example-fsm-55/debian-logo.c
+++ b/example-fsm-55/debian-logo.c
@@ -7,7 +7,7 @@
 static uint8_t main_finished;

 #define PERIPH_BASE	0x40000000
-#define APBPERIPH_BASE   PERIPH_BASE
+#define APB1PERIPH_BASE  PERIPH_BASE
 #define APB2PERIPH_BASE	(PERIPH_BASE + 0x10000)
 #define AHBPERIPH_BASE	(PERIPH_BASE + 0x20000)
 #define AHB2PERIPH_BASE	(PERIPH_BASE + 0x08000000)
@@ -163,17 +163,19 @@ button (void *arg)
  return NULL;
 }

+#define STACK_MAIN
+#define STACK_PROCESS_1
+#define STACK_PROCESS_2
+#include "stack-def.h"
+
 #define PRIO_LED 3
 #define PRIO_BUTTON 2

-extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
-extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
+#define STACK_ADDR_LED ((uint32_t)process1_base)
+#define STACK_SIZE_LED (sizeof process1_base)

-#define STACK_ADDR_LED ((uint32_t)__process1_stack_base__)
-#define STACK_SIZE_LED ((uint32_t)__process1_stack_size__)
-
-#define STACK_ADDR_BUTTON ((uint32_t)__process2_stack_base__)
-#define STACK_SIZE_BUTTON ((uint32_t)__process2_stack_size__)
+#define STACK_ADDR_BUTTON ((uint32_t)process2_base)
+#define STACK_SIZE_BUTTON (sizeof process2_base)

 #define DATA55(x0,x1,x2,x3,x4) (x0<<20)|(x1<<15)|(x2<<10)|(x3<< 5)|(x4<< 0)
 #define SIZE55(img) (sizeof (img) / sizeof (uint32_t))
@@ -365,8 +367,6 @@ text_display (uint8_t kind)
 }


-static void setup_scr_sleepdeep (void);
-
 int
 main (int argc, const char *argv[])
 {
@@ -378,6 +378,8 @@ main (int argc, const char *argv[])
  (void)argc;
  (void)argv;

+  chopstx_conf_idle (1);
+
  chopstx_mutex_init (&mtx);
  chopstx_cond_init (&cnd0);
  chopstx_cond_init (&cnd1);
@@ -418,56 +420,6 @@ main (int argc, const char *argv[])
  chopstx_join (button_thd, NULL);
  chopstx_join (led_thd, NULL);

-  setup_scr_sleepdeep ();
-  for (;;)
-    asm volatile ("wfi" : : : "memory");
-
+  chopstx_conf_idle (4);
  return 0;
 }
-
-struct SCB
-{
-  volatile uint32_t CPUID;
-  volatile uint32_t ICSR;
-  volatile uint32_t VTOR;
-  volatile uint32_t AIRCR;
-  volatile uint32_t SCR;
-  volatile uint32_t CCR;
-  volatile uint8_t  SHP[12];
-  volatile uint32_t SHCSR;
-  volatile uint32_t CFSR;
-  volatile uint32_t HFSR;
-  volatile uint32_t DFSR;
-  volatile uint32_t MMFAR;
-  volatile uint32_t BFAR;
-  volatile uint32_t AFSR;
-  volatile uint32_t PFR[2];
-  volatile uint32_t DFR;
-  volatile uint32_t ADR;
-  volatile uint32_t MMFR[4];
-  volatile uint32_t ISAR[5];
-};
-
-#define SCS_BASE	(0xE000E000)
-#define SCB_BASE	(SCS_BASE +  0x0D00)
-static struct SCB *const SCB = ((struct SCB *)SCB_BASE);
-
-#define SCB_SCR_SLEEPDEEP (1 << 2)
-
-struct PWR
-{
-  volatile uint32_t CR;
-  volatile uint32_t CSR;
-};
-#define PWR_CR_PDDS 0x0002
-#define PWR_CR_CWUF 0x0004
-
-#define PWR_BASE	(APBPERIPH_BASE + 0x00007000)
-#define PWR		((struct PWR *) PWR_BASE)
-
-static void setup_scr_sleepdeep (void)
-{
-  PWR->CR |= PWR_CR_CWUF;
-  PWR->CR |= PWR_CR_PDDS;
-  SCB->SCR |= SCB_SCR_SLEEPDEEP;
-}
--- a/example-fsm-55/hacker-emblem.ld
+++ b/example-fsm-55/hacker-emblem.ld
@@ -1,12 +1,6 @@
 /*
 * ST32F0 memory setup.
 */
-__main_stack_size__     = 0x0100;  /* Idle+Exception handlers */
-__process0_stack_size__  = 0x0100; /* Main program            */
-__process1_stack_size__  = 0x0100; /* first thread program    */
-__process2_stack_size__  = 0x0100; /* second thread program   */
-__process3_stack_size__  = 0x0100; /* third thread program    */
-
 MEMORY
 {
    flash  : org = 0x08000000, len = 16k
@@ -61,34 +55,15 @@ SECTIONS
    _etext = .;
    _textdata = _etext;

-    .process_stack :
+    .stacks (NOLOAD) :
    {
        . = ALIGN(8);
-        __process3_stack_base__ = .;
-        . += __process3_stack_size__;
+        *(.main_stack)
+        *(.process_stack.0)
+        *(.process_stack.1)
+        *(.process_stack.2)
+        *(.process_stack.3)
        . = ALIGN(8);
-        __process3_stack_end__ = .;
-        __process2_stack_base__ = .;
-        . += __process2_stack_size__;
-        . = ALIGN(8);
-        __process2_stack_end__ = .;
-        __process1_stack_base__ = .;
-        . += __process1_stack_size__;
-        . = ALIGN(8);
-        __process1_stack_end__ = .;
-        __process0_stack_base__ = .;
-        . += __process0_stack_size__;
-        . = ALIGN(8);
-        __process0_stack_end__ = .;
-    } > ram
-
-    .main_stack :
-    {
-        . = ALIGN(8);
-        __main_stack_base__ = .;
-        . += __main_stack_size__;
-        . = ALIGN(8);
-        __main_stack_end__ = .;
    } > ram

    .data :
--- a/example-fsm-55/hh.c
+++ b/example-fsm-55/hh.c
@@ -7,7 +7,7 @@
 static uint8_t main_finished;

 #define PERIPH_BASE	0x40000000
-#define APBPERIPH_BASE   PERIPH_BASE
+#define APB1PERIPH_BASE  PERIPH_BASE
 #define APB2PERIPH_BASE	(PERIPH_BASE + 0x10000)
 #define AHBPERIPH_BASE	(PERIPH_BASE + 0x20000)
 #define AHB2PERIPH_BASE	(PERIPH_BASE + 0x08000000)
@@ -166,14 +166,16 @@ button (void *arg)
 #define PRIO_LED 3
 #define PRIO_BUTTON 2

-extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
-extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
+#define STACK_MAIN
+#define STACK_PROCESS_1
+#define STACK_PROCESS_2
+#include "stack-def.h"

-#define STACK_ADDR_LED ((uint32_t)__process1_stack_base__)
-#define STACK_SIZE_LED ((uint32_t)__process1_stack_size__)
+#define STACK_ADDR_LED ((uint32_t)process1_base)
+#define STACK_SIZE_LED (sizeof process1_base)

-#define STACK_ADDR_BUTTON ((uint32_t)__process2_stack_base__)
-#define STACK_SIZE_BUTTON ((uint32_t)__process2_stack_size__)
+#define STACK_ADDR_BUTTON ((uint32_t)process2_base)
+#define STACK_SIZE_BUTTON (sizeof process2_base)

 #define DATA55(x0,x1,x2,x3,x4) (x0<<20)|(x1<<15)|(x2<<10)|(x3<< 5)|(x4<< 0)
 #define SIZE55(img) (sizeof (img) / sizeof (uint32_t))
@@ -355,8 +357,6 @@ text_display (uint8_t kind)
 }


-static void setup_scr_sleepdeep (void);
-
 int
 main (int argc, const char *argv[])
 {
@@ -366,6 +366,8 @@ main (int argc, const char *argv[])
  (void)argc;
  (void)argv;

+  chopstx_conf_idle (1);
+
  chopstx_mutex_init (&mtx);
  chopstx_cond_init (&cnd0);
  chopstx_cond_init (&cnd1);
@@ -406,56 +408,6 @@ main (int argc, const char *argv[])
  chopstx_join (button_thd, NULL);
  chopstx_join (led_thd, NULL);

-  setup_scr_sleepdeep ();
-  for (;;)
-    asm volatile ("wfi" : : : "memory");
-
+  chopstx_conf_idle (4);
  return 0;
 }
-
-struct SCB
-{
-  volatile uint32_t CPUID;
-  volatile uint32_t ICSR;
-  volatile uint32_t VTOR;
-  volatile uint32_t AIRCR;
-  volatile uint32_t SCR;
-  volatile uint32_t CCR;
-  volatile uint8_t  SHP[12];
-  volatile uint32_t SHCSR;
-  volatile uint32_t CFSR;
-  volatile uint32_t HFSR;
-  volatile uint32_t DFSR;
-  volatile uint32_t MMFAR;
-  volatile uint32_t BFAR;
-  volatile uint32_t AFSR;
-  volatile uint32_t PFR[2];
-  volatile uint32_t DFR;
-  volatile uint32_t ADR;
-  volatile uint32_t MMFR[4];
-  volatile uint32_t ISAR[5];
-};
-
-#define SCS_BASE	(0xE000E000)
-#define SCB_BASE	(SCS_BASE +  0x0D00)
-static struct SCB *const SCB = ((struct SCB *)SCB_BASE);
-
-#define SCB_SCR_SLEEPDEEP (1 << 2)
-
-struct PWR
-{
-  volatile uint32_t CR;
-  volatile uint32_t CSR;
-};
-#define PWR_CR_PDDS 0x0002
-#define PWR_CR_CWUF 0x0004
-
-#define PWR_BASE	(APBPERIPH_BASE + 0x00007000)
-#define PWR		((struct PWR *) PWR_BASE)
-
-static void setup_scr_sleepdeep (void)
-{
-  PWR->CR |= PWR_CR_CWUF;
-  PWR->CR |= PWR_CR_PDDS;
-  SCB->SCR |= SCB_SCR_SLEEPDEEP;
-}
--- a/example-fsm-55/hiroshi-ayumi.c
+++ b/example-fsm-55/hiroshi-ayumi.c
@@ -6,7 +6,7 @@
 #include "board.h"

 #define PERIPH_BASE	0x40000000
-#define APBPERIPH_BASE   PERIPH_BASE
+#define APB1PERIPH_BASE  PERIPH_BASE
 #define APB2PERIPH_BASE	(PERIPH_BASE + 0x10000)
 #define AHBPERIPH_BASE	(PERIPH_BASE + 0x20000)
 #define AHB2PERIPH_BASE	(PERIPH_BASE + 0x08000000)
@@ -86,12 +86,16 @@ led_enable_column (uint8_t col)
 }


+#define STACK_MAIN
+#define STACK_PROCESS_1
+#define STACK_PROCESS_2
+#define STACK_PROCESS_3
+#include "stack-def.h"
+
 #define PRIO_LED 3

-extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
-
-#define STACK_ADDR_LED ((uint32_t)__process1_stack_base__)
-#define STACK_SIZE_LED ((uint32_t)__process1_stack_size__)
+#define STACK_ADDR_LED ((uint32_t)process1_base)
+#define STACK_SIZE_LED (sizeof process1_base)

 static void *
 led (void *arg)
@@ -119,10 +123,9 @@ led (void *arg)


 #define PRIO_SPK 4
-extern uint8_t __process2_stack_base__[], __process2_stack_size__[];

-#define STACK_ADDR_SPK ((uint32_t)__process2_stack_base__)
-#define STACK_SIZE_SPK ((uint32_t)__process2_stack_size__)
+#define STACK_ADDR_SPK ((uint32_t)process2_base)
+#define STACK_SIZE_SPK (sizeof process2_base)

 static chopstx_mutex_t spk_mtx;
 static chopstx_cond_t spk_cnd;
@@ -193,10 +196,9 @@ spk (void *arg)


 #define PRIO_MUSIC 2
-extern uint8_t __process3_stack_base__[], __process3_stack_size__[];

-#define STACK_ADDR_MUSIC ((uint32_t)__process3_stack_base__)
-#define STACK_SIZE_MUSIC ((uint32_t)__process3_stack_size__)
+#define STACK_ADDR_MUSIC ((uint32_t)process3_base)
+#define STACK_SIZE_MUSIC (sizeof process3_base)

 #define C 0
 #define D 1
--- a/example-fsm-55/reset.c
+++ b/example-fsm-55/reset.c
@@ -1,7 +1,7 @@
 /*
 * reset.c - No system routines, but only RESET handler for STM32F030.
 *
- * Copyright (C) 2015 Flying Stone Technology
+ * Copyright (C) 2015, 2021 Flying Stone Technology
 * Author: NIIBE Yutaka <gniibe@fsij.org>
 *
 * Copying and distribution of this file, with or without modification,
@@ -31,8 +31,6 @@ reset (void)
 }

 extern uint8_t __main_stack_end__;
-extern void preempt (void);
-extern void chx_timer_expired (void);
 extern void chx_handle_intr (void);

 static void nmi (void)
@@ -84,8 +82,8 @@ handler vector[] __attribute__ ((section(".vectors"))) = {
  none,				/* SVCall */
  none,				/* Debug */
  none,				/* reserved */
-  preempt,			/* PendSV */
-  chx_timer_expired,		/* SysTick */
+  none,				/* PendSV */
+  chx_handle_intr,		/* SysTick */
  /* 0x40 */
  chx_handle_intr /* WWDG */,     chx_handle_intr /* PVD */,
  chx_handle_intr /* TAMPER */,   chx_handle_intr /* RTC */,
--- a/example-fsm-55/stack-def.h
+++ b/example-fsm-55/stack-def.h
@@ -0,0 +1,54 @@
+#define MAIN_SIZE 0x0080 /* Idle+Exception handlers  */
+#define SIZE_0 0x0100 /* Main program             */
+#define SIZE_1 0x0100 /* first thread program     */
+#define SIZE_2 0x0100 /* second thread program    */ 
+#define SIZE_3 0x0100 /* third thread program     */ 
+
+#if defined(STACK_MAIN)
+/*
+ * The terminology of "main" is confusing in ARM architecture.
+ * Here, "main_base" is for exception handlers.
+ */
+/* Idle+Exception handlers */
+char __main_stack_end__[0] __attribute__ ((section(".main_stack")));
+char main_base[MAIN_SIZE] __attribute__ ((section(".main_stack")));
+
+/* Main program            */
+char __process0_stack_end__[0] __attribute__ ((section(".process_stack.0")));
+char process0_base[SIZE_0] __attribute__ ((section(".process_stack.0")));
+#endif
+
+/* First thread program    */
+#if defined(STACK_PROCESS_1)
+char process1_base[SIZE_1] __attribute__ ((section(".process_stack.1"))); 
+#endif
+
+/* Second thread program   */
+#if defined(STACK_PROCESS_2)
+char process2_base[SIZE_2] __attribute__ ((section(".process_stack.2")));
+#endif
+
+/* Third thread program    */
+#if defined(STACK_PROCESS_3)
+char process3_base[SIZE_3] __attribute__ ((section(".process_stack.3")));
+#endif
+
+/* Fourth thread program    */
+#if defined(STACK_PROCESS_4)
+char process4_base[SIZE_4] __attribute__ ((section(".process_stack.4")));
+#endif
+
+/* Fifth thread program    */
+#if defined(STACK_PROCESS_5)
+char process5_base[SIZE_5] __attribute__ ((section(".process_stack.5")));
+#endif
+
+/* Sixth thread program    */
+#if defined(STACK_PROCESS_6)
+char process6_base[SIZE_6] __attribute__ ((section(".process_stack.6")));
+#endif
+
+/* Seventh thread program    */
+#if defined(STACK_PROCESS_7)
+char process7_base[SIZE_7] __attribute__ ((section(".process_stack.7")));
+#endif
--- a/example-lcd/FSIJ.png
+++ b/example-lcd/FSIJ.png
--- a/example-lcd/Makefile
+++ b/example-lcd/Makefile
@@ -0,0 +1,59 @@
+# Makefile for example application of Chopstx
+
+PROJECT = sample
+
+### Currently, it is for GD32VF103
+###
+### Please change lines started with '###' for STM32 Nucleo L432.
+###
+### Please change lines started with '###' for Cortex-M3 board.
+###
+### Please change lines started with '###' for Cortex-M0+ board
+### (STM32F0 Discovery).
+
+CHOPSTX = ..
+LDSCRIPT= sample.ld.gd32vf103
+### LDSCRIPT= sample.ld.m4
+### LDSCRIPT= sample.ld
+### LDSCRIPT= sample.ld.m3
+CSRC = sample.c usb-vendor-specific.c
+# CSRC += debug.c
+
+ARCH=riscv32
+CHIP=gd32vf103
+### CHIP=stm32l4
+### USE_SYS = yes
+USE_USART = yes
+USE_USB = yes
+
+###################################
+### CROSS = arm-none-eabi-
+CROSS = riscv64-unknown-elf-
+CC   = $(CROSS)gcc
+LD   = $(CROSS)gcc
+OBJCOPY   = $(CROSS)objcopy
+
+### MCU   = cortex-m4
+### MCU   = cortex-m3
+### MCU   = cortex-m0
+CWARN = -Wall -Wextra -Wstrict-prototypes
+DEFS  = -DFREE_STANDING -DMHZ=96
+### DEFS  = -DUSE_SYS3 -DFREE_STANDING -DMHZ=80
+### DEFS  = -DFREE_STANDING -DUSE_SYS3 -DBUSY_LOOP -DCHX_FLAGS_MAIN=CHOPSTX_SCHED_RR
+OPT   = -O3 -Os -g
+LIBS  =
+#LIBS  = -lgcc
+
+CSRC += $(CHOPSTX)/contrib/spi-st.c
+
+####################
+include ../rules.mk
+
+board.h:
+	@echo Please make a symbolic link \'board.h\' to a file in ../board;
+	@exit 1
+
+sys.c: board.h
+
+distclean: clean
+	rm -f board.h
--- a/example-lcd/board.h
+++ b/example-lcd/board.h
@@ -0,0 +1 @@
+../board/board-longan-nano.h
--- a/example-lcd/bouncing_gpg.py
+++ b/example-lcd/bouncing_gpg.py
@@ -0,0 +1,34 @@
+from load_image_to_screen import Longan_LCD
+
+from gnupg_logo_16bit_160x80 import gnupg_logo_16bit_160x80
+
+image = gnupg_logo_16bit_160x80
+
+pos = [ 1, 2, 2, 2, 3, 3, 4, 5, 6, 7, 8, 9, 12, 14, 17, 20, 23, 28, 33, 40, 47, 56  ]
+
+background0 = [ 0x5d, 0xdf ]
+background1 = [ 0x7e, 0xdf ]
+
+def fill(i, bg0, bg1):
+    if (i % 2) == 0:
+        return bg0
+    else:
+        return bg1
+
+def move_right(x, bg0, bg1, img):
+    result = []
+    for i in range(80):
+        for j in range(x):
+            result = result + fill(j, bg0, bg1)
+        result = result + (img[i*160*2:(i+1)*160*2])[0:160*2-x*2]
+    return result
+
+images = [ bytes(move_right(x, background0, background1, image)) for x in pos ]
+
+lcd = Longan_LCD()
+
+for loop in range(10):
+    for i in range(len(pos)):
+        lcd.load_image_to_screen(images[len(pos)-1-i])
+    for i in range(len(pos)):
+        lcd.load_image_to_screen(images[i])
--- a/example-lcd/debug.c
+++ b/example-lcd/debug.c
@@ -0,0 +1,26 @@
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+#include <contrib/usart.h>
+#include <stdarg.h>
+
+extern int vsnprintf(char *str, size_t size, const char *format, va_list ap);
+
+#define USART_NO 0
+
+/* Intentionally only adding LF */
+void
+debug (const char *fmt, ...)
+{
+  char buf[256];
+  va_list ap;
+  size_t len;
+
+  va_start(ap, fmt);
+  len = vsnprintf (buf, sizeof buf - 1, fmt, ap);
+  va_end(ap);
+  if (len >= sizeof buf - 1)
+    len = sizeof buf - 2;
+  buf[len++] = '\n';
+  usart_write (USART_NO, buf, len);
+}
--- a/example-lcd/debug.h
+++ b/example-lcd/debug.h
@@ -0,0 +1 @@
+void debug (const char *fmt, ...);
--- a/example-lcd/fsij-logo.c
+++ b/example-lcd/fsij-logo.c
--- a/example-lcd/gnupg_logo_16bit_160x80.py
+++ b/example-lcd/gnupg_logo_16bit_160x80.py
--- a/Show More
+++ b/Show More