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Fix SPI driver.

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Signed-off-by: NIIBE Yutaka <gniibe@fsij.org>
This commit is contained in:
NIIBE Yutaka
2019-12-27 09:47:26 +09:00
parent 228d1d06ce
commit 76f962fbdd
2 changed files with 35 additions and 25 deletions
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6
ChangeLog
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@@ -1,3 +1,9 @@
2019-12-27 NIIBE Yutaka <gniibe@fsij.org>
* contrib/spi-st.c (check_transmit, put_data): Fix handling
conditions.
[!SPI_USE_INTERRUPT]: Support busy wait mode.
2019-12-27 NIIBE Yutaka <gniibe@fsij.org>
* mcu/usb-gd32vf103.c: New.

54
contrib/spi-st.c
View File

@@ -31,6 +31,10 @@
#include <chopstx.h>
#include <mcu/stm32.h>
#ifndef SPI_USE_INTERRUPT
#define SPI_BUSY_WAIT 1
#endif
/* Hardware registers */
struct SPI {
volatile uint32_t CR1;
@@ -49,7 +53,9 @@ struct SPI {
#define INTR_REQ_SPI0 54 /* For GD32VF103 */
static struct SPI *SPIx = SPI0;
#ifndef SPI_BUSY_WAIT
static struct chx_intr spi_intr;
#endif
static int tx_ready;
static int rx_done;
@@ -104,12 +110,15 @@ spi_init (void)
/* Don't touch CRCPR: Just use reset default value of 7 */
/* Don't touch I2SCFGR, I2SPR */
chopstx_claim_irq (&spi_intr, INTR_REQ_SPI0);
tx_ready = 0;
rx_done = 0;
#ifndef SPI_BUSY_WAIT
chopstx_claim_irq (&spi_intr, INTR_REQ_SPI0);
/* Enable notification for Tx empty, Rx done, or Error */
SPIx->CR2 = (1 << 7) | (1 << 6) | (1 << 5);
#endif
tx_ready = 0;
rx_done = 0;
return 0;
}
@@ -123,6 +132,8 @@ clear_crc_err (void)
static void
put_data (uint16_t data)
{
tx_ready = 0;
rx_done = 0;
SPIx->DR = (uint32_t)data;
}
@@ -144,47 +155,40 @@ check_transmit (int for_what)
uint16_t status;
if (for_what == CHECK_TX && tx_ready)
return;
return;
if (for_what == CHECK_RX && rx_done)
return;
if (for_what == CHECK_TX)
SPIx->CR2 |= (1 << 7);
if (for_what == CHECK_RX)
SPIx->CR2 |= (1 << 6);
return;
#ifndef SPI_BUSY_WAIT
/* Wait an event */
chopstx_intr_wait (&spi_intr);
#endif
status = SPIx->SR;
if ((status & (1 << 0)))
{
rx_done = 1;
SPIx->CR2 &= ~(1 << 6);
}
rx_done = 1;
if ((status & (1 << 1)))
{
tx_ready = 1;
SPIx->CR2 &= ~(1 << 7);
}
tx_ready = 1;
if ((status & (1 << 4)))
{
/*FIXME: stat crc_err_count++ */
clear_crc_err ();
}
{
/*FIXME: stat crc_err_count++ */
clear_crc_err ();
}
#if 0
/*FIXME: stat err_count++ */
if ((status & 0x00fc))
{
}
{
}
#endif
#ifndef SPI_BUSY_WAIT
chopstx_intr_done (&spi_intr);
#endif
}
}