Add ack-botton driver.

This commit is contained in:
NIIBE Yutaka
2018-09-27 10:36:36 +09:00
parent 43bbdb44dc
commit 49b0556a24
10 changed files with 116 additions and 13 deletions

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@@ -1,3 +1,8 @@
2018-09-27 NIIBE Yutaka <gniibe@fsij.org>
* contrib/ackbtn-stm32f103.c: New.
* rules.mk [USE_ACKBTN] (CSRC): Add ack-button support.
2018-09-26 NIIBE Yutaka <gniibe@fsij.org>
Fix for chopstx_intr_done. No spurious interrupts.

7
NEWS
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@@ -6,12 +6,17 @@ NEWS - Noteworthy changes
Released 2018-09-XX
** Function chopstx_intr_wait is not deprecated, now.
Once, it was said that it's deprecated, but it's active again.
Once, it was said that it's deprecated, but it's active again
to match the new function of chopstx_intr_done.
** API change: chopstx_poll, chopstx_intr_wait, chopstx_intr_done
To avoid spurious interrupt, we introduce new function
chopstx_intr_done, which should be called after interrupt handling.
** New driver: Acknowledge button for FST-01SZ
Use case is waiting user's acknowledge. We use EXTI interrupt feature
of STM32.
* Major changes in Chopstx 1.9

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@@ -71,6 +71,7 @@
* Those will be removed soon, once such an driver will be improved
* in new style.
*/
#if defined(PINPAD_CIR_SUPPORT)
/* For pin-cir settings of Gnuk */
#define TIMx TIM2
#define INTR_REQ_TIM TIM2_IRQ
@@ -83,3 +84,4 @@
#define ENABLE_RCC_APB1
#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM2EN
#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM2RST
#endif

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@@ -71,7 +71,7 @@
* Those will be removed soon, once such an driver will be improved
* in new style.
*/
/* For pin-cir settings of Gnuk */
#if defined(PINPAD_CIR_SUPPORT)
#define TIMx TIM2
#define INTR_REQ_TIM TIM2_IRQ
#define AFIO_EXTICR_INDEX 0
@@ -83,3 +83,4 @@
#define ENABLE_RCC_APB1
#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM2EN
#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM2RST
#endif

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@@ -36,12 +36,8 @@
#define RCC_ENR_IOP_EN RCC_APB2ENR_IOPAEN
#define RCC_RSTR_IOP_RST RCC_APB2RSTR_IOPARST
#if 0 /* For PA, AFIO setting is not needed. */
#define AFIO_EXTICR_INDEX 0
#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR1_EXTI3_PA
#endif
#define EXTI_PR EXTI_PR_PR3
#define EXTI_IMR EXTI_IMR_MR3
#define EXTI_RTSR_TR EXTI_RTSR_TR3
#define INTR_REQ_EXTI EXTI3_IRQ
/*
* Board specific information other than clock and GPIO initial
* setting should not be in board-*.h, but each driver should include
* such specific information by itself.
*/

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@@ -44,7 +44,7 @@
#define VAL_GPIO_OTHER_CRH 0x88888888 /* PB15...PB8 */
/* For pin-cir settings of Gnuk */
#if defined(PINPAD_CIR_SUPPORT)
#define TIMx TIM3
#define INTR_REQ_TIM TIM3_IRQ
#define AFIO_EXTICR_INDEX 1
@@ -58,3 +58,4 @@
#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM3RST
#define AFIO_MAPR_SOMETHING AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
/* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
#endif

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@@ -0,0 +1,87 @@
/*
* ackbtn-stm32f103.c - Acknowledge button support for STM32F103
*
* Copyright (C) 2018 g10 Code GmbH
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
*
* Chopstx is free software: you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* Chopstx is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* As additional permission under GNU GPL version 3 section 7, you may
* distribute non-source form of the Program without the copy of the
* GNU GPL normally required by section 4, provided you inform the
* receipents of GNU GPL by a written offer.
*
*/
#include <stdint.h>
#include <string.h>
#include <chopstx.h>
#include "board.h"
#include "mcu/stm32f103.h"
static uint32_t pin_config;
void
ackbtn_init (chopstx_intr_t *intr)
{
uint8_t irq_num;
uint32_t afio_exticr_index;
uint32_t afio_exticr_extiX_pY;
int rising_edge;
switch (SYS_BOARD_ID)
{
case BOARD_ID_FST_01SZ:
default:
/* PA3 is connected to a hall sensor DRV5032FA */
afio_exticr_index = 0;
afio_exticr_extiX_pY = AFIO_EXTICR1_EXTI3_PA;
irq_num = EXTI3_IRQ;
pin_config = 0x0008; /* EXTI_PR_PR3 == EXTI_IMR_MR3 == EXTI_RTSR_TR3 */
rising_edge = 1;
break;
}
chopstx_claim_irq (intr, irq_num);
/* Configure EXTI line */
if (afio_exticr_extiX_pY)
AFIO->EXTICR[afio_exticr_index] |= afio_exticr_extiX_pY;
/* Interrupt is masked, now */
EXTI->IMR &= ~pin_config;
/* Configure which edge is detected */
if (rising_edge)
EXTI->RTSR |= pin_config;
else
EXTI->FTSR |= pin_config;
}
void
ackbtn_enable (void)
{
EXTI->PR |= pin_config; /* Clear pending interrupt */
EXTI->IMR |= pin_config; /* Enable interrupt clearing the mask */
}
void
ackbtn_disable (void)
{
EXTI->IMR &= ~pin_config; /* Disable interrupt having the mask */
EXTI->PR |= pin_config; /* Clear pending interrupt */
}

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@@ -0,0 +1,3 @@
void ackbtn_init (chopstx_intr_t *intr);
void ackbtn_enable (void);
void ackbtn_disable (void);

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@@ -155,7 +155,7 @@ gpio_init (void)
AFIO->MAPR |= AFIO_MAPR_SOMETHING;
#endif
/* LED is mandatory. If it's on an independent port, we configure it. */
/* LED is mandatory. We configure it always. */
GPIO_LED->ODR = VAL_GPIO_LED_ODR;
GPIO_LED->CRH = VAL_GPIO_LED_CRH;
GPIO_LED->CRL = VAL_GPIO_LED_CRL;

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@@ -28,6 +28,9 @@ endif
ifneq ($(USE_USART),)
CSRC += $(CHOPSTX)/contrib/usart-$(CHIP).c
endif
ifneq ($(USE_ACKBTN),)
CSRC += $(CHOPSTX)/contrib/ackbtn-$(CHIP).c
endif
INCDIR += $(CHOPSTX)