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usb driver: Only board specific function of cable config is in SYS.

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This commit is contained in:
NIIBE Yutaka
2019-05-08 12:07:28 +09:00
parent e7e6f5b184
commit be43aa3051
7 changed files with 137 additions and 79 deletions
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19
ChangeLog
View File

@@ -1,3 +1,22 @@
2019-05-08 NIIBE Yutaka <gniibe@fsij.org>
* mcu/sys-stm32f103.c (usb_lld_sys_shutdown, usb_lld_sys_init):
Only cable config.
* mcu/sys-stm32l4.c (usb_lld_sys_shutdown, usb_lld_sys_init):
Likewise.
* mcu/usb-st-common.c (usb_lld_init): Call chip specific routine.
(usb_lld_shutdown): Likewise.
* mcu/usb-stm32l4.c (usb_lld_init_chip_specific)
(usb_lld_shutdown_chip_specific): New.
* mcu/usb-stm32f103.c (usb_lld_init_chip_specific)
(usb_lld_shutdown_chip_specific): New.
* rules.mk (DEFS): Add -DUSE_SYS when USE_SYS.
2019-04-25 NIIBE Yutaka <gniibe@fsij.org>
* contrib/usart.h (BSCARD1, BSCARD2...): New.

23
mcu/sys-stm32f103.c
View File

@@ -64,39 +64,16 @@ set_led (int on)
#endif
}
static void wait (int count)
{
int i;
for (i = 0; i < count; i++)
asm volatile ("" : : "r" (i) : "memory");
}
static void
usb_lld_sys_shutdown (void)
{
RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
usb_cable_config (0);
}
static void
usb_lld_sys_init (void)
{
if ((RCC->APB1ENR & RCC_APB1ENR_USBEN)
&& (RCC->APB1RSTR & RCC_APB1RSTR_USBRST) == 0)
/* Make sure the device is disconnected, even after core reset. */
{
usb_lld_sys_shutdown ();
/* Disconnect requires SE0 (>= 2.5uS). */
wait (5*MHZ);
}
usb_cable_config (1);
RCC->APB1ENR |= RCC_APB1ENR_USBEN;
RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
RCC->APB1RSTR = 0;
}
#define FLASH_KEY1 0x45670123UL

40
mcu/sys-stm32l4.c
View File

@@ -47,51 +47,11 @@ static void wait (int count)
void
usb_lld_sys_shutdown (void)
{
USB_STM32L4->BCDR &= 0x7fff; /* DP disable */
RCC->APB1ENR1 &= ~(RCC_APB1_1_USB | RCC_APB1_1_CRS);
RCC->APB1RSTR1 |= (RCC_APB1_1_USB | RCC_APB1_1_CRS);
}
struct CRS
{
volatile uint32_t CR;
volatile uint32_t CFGR;
volatile uint32_t ISR;
volatile uint32_t ICR;
};
static struct CRS *const CRS = ((struct CRS *)(APB1PERIPH_BASE + 0x6000));
void
usb_lld_sys_init (void)
{
PWR->CR2 |= (1 << 10); /* USB supply valid */
if ((RCC->APB1ENR1 & RCC_APB1_1_USB)
&& (RCC->APB1RSTR1 & RCC_APB1_1_USB) == 0)
/* Make sure the device is disconnected, even after core reset. */
{
usb_lld_sys_shutdown ();
/* Disconnect requires SE0 (>= 2.5uS). */
wait (5*MHZ);
}
/* Enable USB clock and CRC clock */
RCC->APB1ENR1 |= (RCC_APB1_1_USB | RCC_APB1_1_CRS);
RCC->APB1RSTR1 = (RCC_APB1_1_USB | RCC_APB1_1_CRS);
RCC->APB1RSTR1 = 0;
USB_STM32L4->BCDR |= 0x8000; /* DP enable */
/* Configure CRS (clock recovery system) for HSI48 clock */
CRS->CFGR = ( (0x00 << 31) | /* Polarity rising */
(0x02 << 28) | /* USB SOF for Sync */
(0x00 << 24) | /* divider = 1 */
(0x22 << 16) | /* Frequency error limit */
0xBB7F ); /* Reload value */
CRS->CR |= ( (1 << 6) | /* Automatic trimming enable */
(1 << 5) ); /* Frequency error counter enable */
}
void

18
mcu/usb-st-common.c
View File

@@ -225,7 +225,7 @@ usb_lld_ctrl_ack (struct usb_dev *dev)
void
usb_lld_init (struct usb_dev *dev, uint8_t feature)
{
usb_lld_sys_init ();
usb_lld_init_chip_specific ();
dev->configuration = 0;
dev->feature = feature;
@@ -241,20 +241,6 @@ usb_lld_init (struct usb_dev *dev, uint8_t feature)
USB->ISTR = 0;
USB->CNTR = (CNTR_CTRM | CNTR_OVRM | CNTR_ERRM
| CNTR_WKUPM | CNTR_SUSPM | CNTR_RESETM);
#if 0
/*
* Since stop mode makes PLL, HSI & HES oscillators stop, USB clock is
* not supplied in stop mode. Thus, USB wakeup can't occur.
*
* So, only sleep mode can be supported with USB, which doesn't
* require use of EXTI.
*/
#include "mcu/stm32f103.h"
/* Setting of EXTI wakeup event to break stop mode. */
EXTI->EMR |= (1 << 18); /* Event mask cleared */
EXTI->RTSR |= (1 << 18); /* Rising trigger selection */
#endif
}
void
@@ -268,7 +254,7 @@ void
usb_lld_shutdown (void)
{
USB->CNTR = CNTR_PDWN;
usb_lld_sys_shutdown ();
usb_lld_shutdown_chip_specific ();
}
#define USB_MAKE_EV(event) (event<<24)

48
mcu/usb-stm32f103.c
View File

@@ -29,7 +29,11 @@
#include <stdint.h>
#include <stdlib.h>
#ifdef USE_SYS
#include "sys-stm32f103.h"
#endif
#include "stm32f103.h"
#include "usb_lld.h"
#include "usb_lld_driver.h"
@@ -109,6 +113,50 @@ epbuf_get_rx_count (uint8_t ep_num)
return *reg_p & 0x03ff;
}
static void
usb_lld_shutdown_chip_specific (void)
{
RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
#ifdef USE_SYS
usb_lld_sys_shutdown ();
#endif
}
static void
wait (int count)
{
int i;
for (i = 0; i < count; i++)
asm volatile ("" : : "r" (i) : "memory");
}
static void
usb_lld_init_chip_specific (void)
{
if ((RCC->APB1ENR & RCC_APB1ENR_USBEN)
&& (RCC->APB1RSTR & RCC_APB1RSTR_USBRST) == 0)
/* Make sure the device is disconnected, even after core reset. */
{
usb_lld_shutdown_chip_specific ();
/* Disconnect requires SE0 (>= 2.5uS). */
wait (5*MHZ);
}
#ifdef USE_SYS
usb_lld_sys_init ();
#endif
if ((RCC->APB1ENR & RCC_APB1ENR_USBEN) == 0)
{
RCC->APB1ENR |= RCC_APB1ENR_USBEN;
RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
RCC->APB1RSTR = 0;
}
}
#include "usb-st-common.c"
static int

67
mcu/usb-stm32l4.c
View File

@@ -109,6 +109,73 @@ epbuf_get_rx_count (uint8_t ep_num)
return *reg_p & 0x03ff;
}
static void
usb_lld_shutdown_chip_specific (void)
{
USB_STM32L4->BCDR &= 0x7fff; /* DP disable */
RCC->APB1ENR1 &= ~(RCC_APB1_1_USB | RCC_APB1_1_CRS);
RCC->APB1RSTR1 |= (RCC_APB1_1_USB | RCC_APB1_1_CRS);
#ifdef USE_SYS
usb_lld_sys_shutdown ();
#endif
}
static void
wait (int count)
{
int i;
for (i = 0; i < count; i++)
asm volatile ("" : : "r" (i) : "memory");
}
struct CRS
{
volatile uint32_t CR;
volatile uint32_t CFGR;
volatile uint32_t ISR;
volatile uint32_t ICR;
};
static struct CRS *const CRS = ((struct CRS *)(APB1PERIPH_BASE + 0x6000));
static void
usb_lld_init_chip_specific (void)
{
PWR->CR2 |= (1 << 10); /* USB supply valid */
if ((RCC->APB1ENR1 & RCC_APB1_1_USB)
&& (RCC->APB1RSTR1 & RCC_APB1_1_USB) == 0)
/* Make sure the device is disconnected, even after core reset. */
{
usb_lld_shutdown_chip_specific ();
/* Disconnect requires SE0 (>= 2.5uS). */
wait (5*MHZ);
}
#ifdef USE_SYS
usb_lld_sys_init ();
#endif
/* Enable USB clock and CRC clock */
RCC->APB1ENR1 |= (RCC_APB1_1_USB | RCC_APB1_1_CRS);
RCC->APB1RSTR1 = (RCC_APB1_1_USB | RCC_APB1_1_CRS);
RCC->APB1RSTR1 = 0;
USB_STM32L4->BCDR |= 0x8000; /* DP enable */
/* Configure CRS (clock recovery system) for HSI48 clock */
CRS->CFGR = ( (0x00 << 31) | /* Polarity rising */
(0x02 << 28) | /* USB SOF for Sync */
(0x00 << 24) | /* divider = 1 */
(0x22 << 16) | /* Frequency error limit */
0xBB7F ); /* Reload value */
CRS->CR |= ( (1 << 6) | /* Automatic trimming enable */
(1 << 5) ); /* Frequency error counter enable */
}
#include "usb-st-common.c"
static int

1
rules.mk
View File

@@ -13,6 +13,7 @@ CSRC += $(CHOPSTX)/mcu/chx-gnu-linux.c
endif
ifneq ($(USE_SYS),)
DEFS += -DUSE_SYS
CSRC += $(CHOPSTX)/mcu/sys-$(CHIP).c
endif
ifneq ($(USE_USB),)