32 Commits

Author SHA1 Message Date
NIIBE Yutaka
aeea3c31f8 Version 1.14. 2019-03-02 08:48:11 +09:00
NIIBE Yutaka
91dbfaf6b7 usart: SCEN should be configured after CR1 enabled. 2019-03-01 22:22:25 +09:00
NIIBE Yutaka
304441d393 usart: usart_config should be called by application. 2019-03-01 20:02:15 +09:00
NIIBE Yutaka
4780da5b5b Parity error enabled when parity is in use. 2019-03-01 20:01:43 +09:00
NIIBE Yutaka
a4aa99f772 Add smartcard interface support for ST Nucleo Board. 2019-02-28 22:35:55 +09:00
NIIBE Yutaka
3315435579 Fix unsigned-ness of MASK_MODE. 2019-02-25 17:00:42 +09:00
NIIBE Yutaka
bd330d81c3 Add comment for eventflag. 2019-02-22 14:00:44 +09:00
NIIBE Yutaka
078c8db5d7 Minor code-cleanup for priority inheritance. 2019-02-22 09:52:28 +09:00
NIIBE Yutaka
53e4d1a371 Add usart modes. 2019-02-21 16:44:01 +09:00
NIIBE Yutaka
2b18685cbf Use "System Control Block" instead of "System Control Registers". 2018-12-29 09:33:19 +09:00
NIIBE Yutaka
b6c90e3df4 Version 1.13. 2018-12-19 12:52:26 +09:00
NIIBE Yutaka
4d4f82fd06 Update copyright notice. 2018-12-19 12:47:20 +09:00
NIIBE Yutaka
1ef6256784 Fix calculation of ticks remained. 2018-12-08 10:06:33 +09:00
NIIBE Yutaka
1400e677e3 Change behavior of chopstx_poll to correctly update *USEC_P. 2018-12-07 18:01:39 +09:00
NIIBE Yutaka
39683dbc5f Version 1.12. 2018-11-12 14:09:25 +09:00
NIIBE Yutaka
fd98c5e162 ackbtn driver: Add possible FST-01 and FST-01G support. 2018-11-12 14:06:13 +09:00
NIIBE Yutaka
1369361e59 Add eventflag_set_mask, removing eventflag_wait_all. 2018-11-09 20:49:39 +09:00
NIIBE Yutaka
2992b894e0 Add eventflag_wait_all. 2018-11-09 16:04:42 +09:00
NIIBE Yutaka
fffb8aa3b3 Version 1.11. 2018-10-02 09:58:45 +09:00
NIIBE Yutaka
0ed2e95ea2 Fix ackbtn clearing the edge detector. 2018-10-01 12:56:41 +09:00
NIIBE Yutaka
02aa678d4c Fix interrupt handling. 2018-10-01 10:10:09 +09:00
NIIBE Yutaka
d25cee5040 Version 1.10. 2018-09-29 11:03:32 +09:00
NIIBE Yutaka
e420168c82 doc: Update chopstx-api.texi. 2018-09-27 15:14:00 +09:00
NIIBE Yutaka
7dc67d2210 Minor change for ackbtn driver. 2018-09-27 12:53:43 +09:00
NIIBE Yutaka
49b0556a24 Add ack-botton driver. 2018-09-27 10:36:36 +09:00
NIIBE Yutaka
43bbdb44dc Fix examples. 2018-09-26 10:47:42 +09:00
NIIBE Yutaka
d4f4f80ad9 New API: chopstx_intr_done. 2018-09-26 10:18:23 +09:00
NIIBE Yutaka
7ad7527e81 Add defninitions of EXTI use for FST-01SZ. 2018-09-25 16:17:26 +09:00
NIIBE Yutaka
951afbad3a Consolidate definitions for STM32F103. 2018-09-21 14:47:16 +09:00
NIIBE Yutaka
2b717c91da Add FST-01SZ support. 2018-09-21 10:37:11 +09:00
NIIBE Yutaka
05732b445a Add MHZ for examples. 2018-08-23 14:36:22 +09:00
NIIBE Yutaka
1cbe0abdee usb: Fix for ZLP. 2018-08-20 12:43:35 +09:00
46 changed files with 743 additions and 203 deletions

28
AUTHORS
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@@ -27,19 +27,30 @@ Mateusz Zalega:
NIIBE Yutaka:
Wrote the library:
chopstx.c, entry.c, eventflag.c,
chopstx.h, eventflag.h
chopstx.c, chopstx.h,
chopstx-cortex-m.c, chopstx-cortex-m.h,
chopstx-gnu-linux.c, chopstx-gnu-linux.h,
entry.c,
eventflag.c, eventflag.h
Wrote the drivers mcu/*:
chx-gnu-linux.c, chx-mkl27z.c, chx-stm32f0.c, chx-stm32f103.c,
clk_gpio_init-mkl27z.c, clk_gpio_init-stm32.c,
sys-stm32f103.c, sys-stm32f030.c, sys-mkl27z.c,
adc-stm32f103.c, adc-mkl27z.c
cortex-m.h, mkl27z.h, stm32.h, stm32f103.h,
sys-gnu-linux.c,sys-gnu-linux.h,
sys-mkl27z.c, sys-mkl27z.h,
sys-stm32f0.c, sys-stm32f0.h
sys-stm32f103.c, sys-stm32f103.h,
usb-stm32f103.c, usb-mkl27z.c
Wrote the drivers:
controb/adc-mkl27z.c
Drew the logo:
chopstx.svg, chopstx.png
Wrote examples:
example-led, example-cdc, example-fsm-55, example-fs-bb48,
example-usb-serial
example-usb-serial, example-cdc-gnu-linux
Wrote board/*:
board-fst-01.h, board-fst-01-00.h,
board-fst-01sz.h,
board-fst-01g.h, board-fst-01.h, board-fst-01-00.h,
board-olimex-stm32-h103.h, board-stm8s-discovery.h
board-cq-starm.h, board-stbee-mini.h, board-stbee.h,
@@ -47,9 +58,14 @@ NIIBE Yutaka:
board-fs-bb48.h
For Free Software Initiative of Japan, wrote:
contrib/adc-stm32f103.c,
contrib/adc-gnu-linux.c
Under contract of g10 Code GmbH, wrote:
mcu/usb-usbip.c
contrib/usart-stm32f103.c
contrib/ackbtn-stm32f103.c
Paul Fertser:
Added Blue Pill support.

137
ChangeLog
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@@ -1,3 +1,140 @@
2019-03-02 NIIBE Yutaka <gniibe@fsij.org>
* VERSION: 1.14.
* doc/chopstx.texi (VERSION): 1.14.
2019-03-01 NIIBE Yutaka <gniibe@fsij.org>
* contrib/usart-stm32f103.c (usart_config): Fix SCEN setting
procedure.
2019-03-01 NIIBE Yutaka <gniibe@fsij.org>
* contrib/usart-stm32f103.c (usart_config): Support parity error
interrupt setting.
(usart_init): Don't call usart_config here.
* example-usb-serial/sample.c: It's application calling
usart_config.
2019-02-28 NIIBE Yutaka <gniibe@fsij.org>
* contrib/usart.h (BSCARD): New.
* contrib/usart-stm32f103.c (BSCARD): Baudrate for smartcard.
(usart_config_clken): New.
(usart_config): Fix for MODE_SMARTCARD.
* board/board-st-nucleo-f103.h: Define pins for smartcard
interface.
2019-02-21 NIIBE Yutaka <gniibe@fsij.org>
* contrib/usart.h (MODE_SMARTCARD, MODE_IRDA, MODE_IRDA_LP)
(MASK_MODE): New.
* contrib/usart-stm32f103.c (usart_config): Add support for
those modes.
2018-12-19 NIIBE Yutaka <gniibe@fsij.org>
* VERSION: 1.13.
* doc/chopstx.texi (VERSION): 1.13.
2018-12-08 NIIBE Yutaka <gniibe@fsij.org>
* chopstx.c (chx_timer_dequeue): Fix calculation of return value.
2018-12-07 NIIBE Yutaka <gniibe@fsij.org>
* chopstx.c (chx_timer_dequeue): Return ticks remained.
(chx_wakeup, chopstx_mutex_lock): Use return value of
chx_timer_dequeue.
(chx_snooze): Update *USEC_P, accordingly.
2018-11-12 NIIBE Yutaka <gniibe@fsij.org>
* VERSION: 1.12.
* doc/chopstx.texi (VERSION): 1.12.
* contrib/ackbtn-stm32f103.c (ackbtn_init): Support FST-01 and
FST-01G, using PA2.
(ackbtn_disable): Fix to correctly clear pending interrupt.
2018-11-09 NIIBE Yutaka <gniibe@fsij.org>
* eventflag.c (eventflag_set_mask): New.
2018-10-02 NIIBE Yutaka <gniibe@fsij.org>
* VERSION: 1.11.
* doc/chopstx.texi (VERSION): 1.11.
2018-10-01 NIIBE Yutaka <gniibe@fsij.org>
* contrib/ackbtn-stm32f103.c (PINCFG_EDGE): New.
(ackbtn_init): Use PINCFG_EDGE bit.
(ackbtn_enable): Configure the edge detector here.
(ackbtn_disable): Disable the edge detector.
* chopstx.c (chopstx_poll): Don't clear ->ready here.
(chx_cond_hook): Set ->ready = 0 when condition does
not meet.
(chopstx_claim_irq): Make sure clearing the interrupt.
(chx_intr_hook): Add the case when ->ready == 1.
(chopstx_intr_done): Set ->ready = 0.
(chx_join_hook): Set ->ready = 0 when it is still alive.
2018-09-29 NIIBE Yutaka <gniibe@fsij.org>
* VERSION: 1.10.
* doc/chopstx.texi (VERSION): 1.10.
2018-09-27 NIIBE Yutaka <gniibe@fsij.org>
* contrib/ackbtn-stm32f103.c: New.
* rules.mk [USE_ACKBTN] (CSRC): Add ack-button support.
2018-09-26 NIIBE Yutaka <gniibe@fsij.org>
Fix for chopstx_intr_done. No spurious interrupts.
* contrib/adc-mkl27z.c (adc_wait_completion): Fix.
* contrib/adc-stm32f103.c (adc_wait_completion): Likewise.
* contrib/usart-stm32f103.c (usart_main): Likewise.
* example-cdc-gnu-linux/usb-cdc.c (tty_main): Likewise.
* example-cdc/usb-cdc.c (tty_main): Likewise.
* example-fraucheky/main.c (usb_main): Likewise.
* example-fs-bb48/touch.c (touch_get): Likewise.
* example-fs-bb48/usb-cdc.c (tty_main): Likewise.
* example-primer2/primer2-ts.c (adc3_conversion): Likewise.
* example-usb-serial/usb-cdc.c (cdc_main): Likewise.
2018-09-26 NIIBE Yutaka <gniibe@fsij.org>
* chopstx.h (chopstx_intr_done): New function.
* chopstx.c (chopstx_intr_done): New function.
(chopstx_poll): Don't call chx_clr_intr.
Ensure data memory barrier for interrupt handling.
* chopstx-cortex-m.c (chx_dmb): New static function.
* chopstx-gnu-linux.c (chx_dmb): Ditto.
2018-09-21 NIIBE Yutaka <gniibe@fsij.org>
* mcu/stm32.h (struct GPIO, struct FLASH): Moved from...
* mcu/clk_gpio_init-stm32.c: ... here.
(AFIO_MAPR_SWJ_CFG_JTAGDISABLE): Move to ...
* mcu/stm32f103.h: ... here.
* mcu/sys-stm32f103.c: Don't include "mcu/cortex-m.h".
* board/board-fst-01sz.h: New.
* mcu/sys-stm32f103.h (BOARD_ID_FST_01SZ): New.
* contrib/adc-stm32f103.c (get_adc_config): Add BOARD_ID_FST_01SZ.
2018-08-20 NIIBE Yutaka <gniibe@fsij.org>
* mcu/usb-stm32f103.c (usb_lld_ctrl_send): Fix for ZLP.
* mcu/usb-usbip.c (usb_lld_ctrl_send): Likewise.
* mcu/usb-mkl27z.c (usb_lld_ctrl_send): Likewise.
2018-05-09 NIIBE Yutaka <gniibe@fsij.org>
* VERSION: 1.9.

78
NEWS
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@@ -1,6 +1,74 @@
NEWS - Noteworthy changes
* Major changes in Chopstx 1.14
Released 2019-03-02
** Enhancement of driver: USART for STM32
Now, it supports smartcard communication.
* Major changes in Chopstx 1.13
Released 2018-12-19
** API fix (redefinition): chopstx_poll
In old implementations, when chopstx_poll returns by non-timeout
event, *USEC_P is not updated. Now, it is updated.
* Major changes in Chopstx 1.12
Released 2018-11-12
** Enhance API of eventflag
New function eventflag_set_mask is added, so that we can only handle
specified events. See Gnuk 1.2.12 for an example (while USB Tx is
busy, the USB thread only accepts EV_TX_FINISHED event, leaving
other events).
** Acknowledge button support for FST-01 and FST-01G
While FST-01 and FST-01G don't have any button in the original design,
it may be PA2 when user put a hall sensor or a switch.
* Major changes in Chopstx 1.11
Released 2018-10-02
** Support calling chopstx_poll with intr->ready==1
In version <= 1.10, it assumed that all events should be handled after
chopstx_poll, before calling chopstx_poll again. With having
chopstx_intr_done, it's OK now that chopstx_poll can be called again
not examining/handling all poll descriptors, but only parts of them.
** Acknowledge button change
In 1.10, the action was able to be "memorized" by the edge detector.
Now, the edge detector is disabled by ackbtn_disable, and it is
enabled by ackbtn_enable. So, the status is cleared correctly.
** New board support: FST-01SZ
It's still under development. Programming-wise, it will be kept same.
* Major changes in Chopstx 1.10
Released 2018-09-29
** Function chopstx_intr_wait is not deprecated, now
Once, it was said that it's deprecated, but it's active again
to match the new function of chopstx_intr_done.
** API change: chopstx_poll, chopstx_intr_wait, chopstx_intr_done
To avoid spurious interrupt, we introduce new function
chopstx_intr_done, which should be called after interrupt handling.
** New driver: Acknowledge button for FST-01SZ
The use case is waiting user's acknowledge. We use EXTI interrupt
feature of STM32.
* Major changes in Chopstx 1.9
Released 2018-05-09
@@ -42,7 +110,7 @@ Timer expiration had a bug. When it is waken up, the wake up doesn't
handle as a timer expiration when there are multiple threads on same
timing of expire. It confuses as if it were forced wakeup.
** New driver: USART for STM32.
** New driver: USART for STM32
USART driver for STM32 is added.
@@ -377,11 +445,11 @@ Vectored Interrupt Controller (NVIC), in the ARM v7-M Architecture
Reference Manual. The subsection, B3.4.1, Theory of operation,
explains how it works.
** gpio_init change
Now, gpi_init support AFIO mapping and another GPIO (GPIO_OTHER)
settings.
Local Variables:
mode: outline
End:
# Local Variables:
# mode: outline
# End:

4
README
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@@ -1,6 +1,6 @@
Chopstx - Threads and only Threads
Version 1.9
2018-05-09
Version 1.14
2018-03-02
Niibe Yutaka
Flying Stone Technology

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@@ -1 +1 @@
release/1.9
release/1.14

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@@ -71,6 +71,7 @@
* Those will be removed soon, once such an driver will be improved
* in new style.
*/
#if defined(PINPAD_CIR_SUPPORT)
/* For pin-cir settings of Gnuk */
#define TIMx TIM2
#define INTR_REQ_TIM TIM2_IRQ
@@ -83,3 +84,4 @@
#define ENABLE_RCC_APB1
#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM2EN
#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM2RST
#endif

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@@ -71,7 +71,7 @@
* Those will be removed soon, once such an driver will be improved
* in new style.
*/
/* For pin-cir settings of Gnuk */
#if defined(PINPAD_CIR_SUPPORT)
#define TIMx TIM2
#define INTR_REQ_TIM TIM2_IRQ
#define AFIO_EXTICR_INDEX 0
@@ -83,3 +83,4 @@
#define ENABLE_RCC_APB1
#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM2EN
#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM2RST
#endif

43
board/board-fst-01sz.h Normal file
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@@ -0,0 +1,43 @@
#define BOARD_NAME "FST-01SZ"
#define BOARD_ID 0x7e6fb084
/* echo -n "FST-01SZ" | sha256sum | sed -e 's/^.*\(........\) -$/\1/' */
#define MCU_STM32F1_GD32F1 1
#define STM32_USBPRE STM32_USBPRE_DIV2
#define STM32_ADCPRE STM32_ADCPRE_DIV8
#define MCU_STM32F1 1
#define STM32F10X_MD /* Medium-density device */
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 8
#define STM32_HSECLK 12000000
#define GPIO_LED_BASE GPIOA_BASE
#define GPIO_LED_SET_TO_EMIT 8
#define GPIO_USB_BASE GPIOA_BASE
#undef GPIO_OTHER_BASE
/*
* Port A setup.
* PA0 - input with pull-up: AN0 for NeuG
* PA1 - input with pull-up: AN1 for NeuG
* PA3 - input with pull-up: Hall effect sensor output
* PA8 - Push pull output 10MHz 0 default (LED 1:ON 0:OFF)
* PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
* PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
* ------------------------ Default
* PAx - input with pull-up.
*/
#define VAL_GPIO_LED_ODR 0xFFFFE6FF
#define VAL_GPIO_LED_CRL 0x88888888 /* PA7...PA0 */
#define VAL_GPIO_LED_CRH 0x88811881 /* PA15...PA8 */
#define RCC_ENR_IOP_EN RCC_APB2ENR_IOPAEN
#define RCC_RSTR_IOP_RST RCC_APB2RSTR_IOPARST
/*
* Board specific information other than clock and GPIO initial
* setting should not be in board-*.h, but each driver should include
* such specific information by itself.
*/

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@@ -49,17 +49,26 @@
* Port B setup.
* PB0 - input with pull-up: AN8 for NeuG
* PB1 - input with pull-up: AN9 for NeuG
* PB10 - Alternate function push pull output 2MHz USART3-TX
* PB11 - Input with pull-up USART3-RX
* PB12 - Alternate function push pull output 2MHz USART3-CK
* PB13 - Input with pull-up USART3-CTS
* PB14 - Alternate function push pull output 2MHz USART3-RTS
* ---
* ---
* PB4 - Input with pull-up: Card insertion detect: 0 when detected
* ---
* PB6 - Output push pull 2MHz: Vcc for card: default 0
* ---
* PB8 - Output push pull 2MHz: Vpp for card: default 0
* PB9 - Output push pull 2MHz: RST for card: default 0
* PB10 - Alternate function open-drain output 50MHz USART3-TX
* PB11 - Input with pull-up USART3-RX
* PB12 - Alternate function push pull output 50MHz USART3-CK
* PB13 - Input with pull-up USART3-CTS
* PB14 - Alternate function push pull output 50MHz USART3-RTS
* ---
* ------------------------ Default
* PBx - input with pull-up.
*/
#define VAL_GPIO_OTHER_ODR 0xFFFFFFFF
#define VAL_GPIO_OTHER_CRL 0x88888888 /* PB7...PB0 */
#define VAL_GPIO_OTHER_CRH 0x8A8A8A88 /* PB15...PB8 */
#define VAL_GPIO_OTHER_ODR 0xFFFFFCBF
#define VAL_GPIO_OTHER_CRL 0x82888888 /* PB7...PB0 */
#define VAL_GPIO_OTHER_CRH 0x8B8B8F22 /* PB15...PB8 */
#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)

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@@ -44,7 +44,7 @@
#define VAL_GPIO_OTHER_CRH 0x88888888 /* PB15...PB8 */
/* For pin-cir settings of Gnuk */
#if defined(PINPAD_CIR_SUPPORT)
#define TIMx TIM3
#define INTR_REQ_TIM TIM3_IRQ
#define AFIO_EXTICR_INDEX 1
@@ -58,3 +58,4 @@
#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM3RST
#define AFIO_MAPR_SOMETHING AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
/* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
#endif

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@@ -2,7 +2,7 @@
* chopstx-cortex-m.c - Threads and only threads: Arch specific code
* for Cortex-M0/M3
*
* Copyright (C) 2013, 2014, 2015, 2016, 2017
* Copyright (C) 2013, 2014, 2015, 2016, 2017, 2018
* Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
@@ -28,6 +28,13 @@
*
*/
/* Data Memory Barrier. */
static void
chx_dmb (void)
{
asm volatile ("dmb" : : : "memory");
}
/* Saved registers on the stack. */
struct chx_stack_regs {
uint32_t reg[8]; /* r0, r1, r2, r3, r12, lr, pc, xpsr */
@@ -286,8 +293,8 @@ chx_request_preemption (uint16_t prio)
* AAPCS: ARM Architecture Procedure Call Standard
*
* Returns:
* 1 on wakeup by others.
* 0 on normal wakeup (timer expiration, lock aquirement).
* >= 1 on wakeup by others, value means ticks remained for sleep.
* 0 on normal wakeup (timer expiration, lock acquirement).
* -1 on cancellation.
*/
static uintptr_t __attribute__ ((naked, noinline))

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@@ -2,7 +2,7 @@
* chopstx-gnu-linux.c - Threads and only threads: Arch specific code
* for GNU/Linux emulation
*
* Copyright (C) 2017 Flying Stone Technology
* Copyright (C) 2017, 2018 Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
@@ -32,6 +32,13 @@
#include <signal.h>
#include <sys/time.h>
/* Data Memory Barrier. */
static void
chx_dmb (void)
{
}
static sigset_t ss_cur;
static void

103
chopstx.c
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@@ -1,7 +1,7 @@
/*
* chopstx.c - Threads and only threads.
*
* Copyright (C) 2013, 2014, 2015, 2016, 2017
* Copyright (C) 2013, 2014, 2015, 2016, 2017, 2018, 2019
* Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
@@ -107,7 +107,7 @@ static struct chx_queue q_intr;
static void chx_request_preemption (uint16_t prio);
static int chx_wakeup (struct chx_pq *p);
static struct chx_thread * chx_timer_insert (struct chx_thread *tp, uint32_t usec);
static void chx_timer_dequeue (struct chx_thread *tp);
static uint32_t chx_timer_dequeue (struct chx_thread *tp);
@@ -349,29 +349,35 @@ chx_timer_insert (struct chx_thread *tp, uint32_t usec)
}
static void
static uint32_t
chx_timer_dequeue (struct chx_thread *tp)
{
struct chx_thread *tp_prev;
uint32_t ticks_remained;
chx_spin_lock (&q_timer.lock);
ticks_remained = chx_systick_get ();
tp_prev = (struct chx_thread *)tp->prev;
if (tp_prev == (struct chx_thread *)&q_timer.q)
{
if (tp->next == (struct chx_pq *)&q_timer.q)
chx_set_timer (tp_prev, 0); /* Cancel timer*/
chx_systick_reload (0); /* Cancel timer. */
else
{ /* Update timer. */
uint32_t next_ticks = chx_systick_get () + tp->v;
chx_set_timer (tp_prev, next_ticks);
}
chx_systick_reload (ticks_remained + tp->v); /* Update timer. */
}
else
tp_prev->v += tp->v;
{
struct chx_pq *p;
for (p = q_timer.q.next; p != (struct chx_pq *)tp; p = p->next)
ticks_remained += p->v;
tp_prev->v += tp->v;
}
ll_dequeue ((struct chx_pq *)tp);
tp->v = 0;
chx_spin_unlock (&q_timer.lock);
return ticks_remained;
}
@@ -502,9 +508,11 @@ chx_wakeup (struct chx_pq *pq)
tp = px->master;
if (tp->state == THREAD_WAIT_POLL)
{
tp->v = (uintptr_t)1;
if (tp->parent == &q_timer.q)
chx_timer_dequeue (tp);
tp->v = (uintptr_t)chx_timer_dequeue (tp);
else
tp->v = (uintptr_t)1;
chx_ready_enqueue (tp);
if (!running || tp->prio > running->prio)
yield = 1;
@@ -559,19 +567,21 @@ chx_exit (void *retval)
/*
* Lower layer mutex unlocking. Called with schedule lock held.
* Return PRIO of the thread which is waken up.
*/
static chopstx_prio_t
chx_mutex_unlock (chopstx_mutex_t *mutex)
{
struct chx_thread *tp;
chopstx_prio_t prio = 0;
mutex->owner = NULL;
running->mutex_list = mutex->list;
mutex->list = NULL;
tp = (struct chx_thread *)ll_pop (&mutex->q);
if (tp)
if (!tp)
return 0;
else
{
uint16_t newprio = running->prio_orig;
chopstx_mutex_t *m;
@@ -587,11 +597,8 @@ chx_mutex_unlock (chopstx_mutex_t *mutex)
/* Then, assign it. */
running->prio = newprio;
if (prio < tp->prio)
prio = tp->prio;
return tp->prio;
}
return prio;
}
#define CHOPSTX_PRIO_MASK ((1 << CHOPSTX_PRIO_BITS) - 1)
@@ -679,6 +686,11 @@ chx_snooze (uint32_t state, uint32_t *usec_p)
r = chx_sched (CHX_SLEEP);
if (r == 0)
*usec_p -= usec0;
else if (r > 0)
{
*usec_p -= (usec0 - r / MHZ);
r = 1;
}
return r;
}
@@ -803,9 +815,10 @@ chopstx_mutex_lock (chopstx_mutex_t *mutex)
if (tp0->state == THREAD_WAIT_TIME
|| tp0->state == THREAD_WAIT_POLL)
{
tp0->v = (uintptr_t)1;
if (tp0->parent == &q_timer.q)
chx_timer_dequeue (tp0);
tp0->v = (uintptr_t)chx_timer_dequeue (tp0);
else
tp0->v = (uintptr_t)1;
chx_ready_enqueue (tp0);
tp0 = NULL;
@@ -969,6 +982,7 @@ chx_cond_hook (struct chx_px *px, struct chx_poll_head *pd)
{ /* Condition doesn't met.
* Register the proxy to wait for the condition.
*/
pc->ready = 0;
chx_cpu_sched_lock ();
chx_spin_lock (&pc->cond->lock);
ll_prio_enqueue ((struct chx_pq *)px, &pc->cond->q);
@@ -998,6 +1012,7 @@ chopstx_claim_irq (chopstx_intr_t *intr, uint8_t irq_num)
chx_cpu_sched_lock ();
chx_spin_lock (&q_intr.lock);
chx_disable_intr (irq_num);
chx_clr_intr (irq_num);
chx_set_intr_prio (irq_num);
chx_spin_unlock (&q_intr.lock);
chx_cpu_sched_unlock ();
@@ -1012,10 +1027,19 @@ chx_intr_hook (struct chx_px *px, struct chx_poll_head *pd)
chopstx_testcancel ();
chx_cpu_sched_lock ();
px->v = intr->irq_num;
chx_spin_lock (&q_intr.lock);
ll_prio_enqueue ((struct chx_pq *)px, &q_intr.q);
chx_enable_intr (intr->irq_num);
chx_spin_unlock (&q_intr.lock);
if (intr->ready)
{
chx_spin_lock (&px->lock);
(*px->counter_p)++;
chx_spin_unlock (&px->lock);
}
else
{
chx_spin_lock (&q_intr.lock);
ll_prio_enqueue ((struct chx_pq *)px, &q_intr.q);
chx_enable_intr (intr->irq_num);
chx_spin_unlock (&q_intr.lock);
}
chx_cpu_sched_unlock ();
}
@@ -1034,6 +1058,26 @@ chopstx_intr_wait (chopstx_intr_t *intr)
}
/**
* chopstx_intr_done - Finish an IRQ handling
* @intr: Pointer to INTR structure
*
* Finish for the interrupt @intr occurred.
*
*/
void
chopstx_intr_done (chopstx_intr_t *intr)
{
chx_dmb ();
if (intr->ready)
{
chx_clr_intr (intr->irq_num);
intr->ready = 0;
}
}
/**
* chopstx_cleanup_push - Register a clean-up
* @clp: Pointer to clean-up structure
@@ -1198,6 +1242,7 @@ chx_join_hook (struct chx_px *px, struct chx_poll_head *pd)
{ /* Not yet exited.
* Register the proxy to wait for TP's exit.
*/
pj->ready = 0;
px->v = (uintptr_t)tp;
chx_spin_lock (&q_join.lock);
ll_prio_enqueue ((struct chx_pq *)px, &q_join.q);
@@ -1315,7 +1360,8 @@ chx_proxy_init (struct chx_px *px, uint32_t *cp)
/**
* chopstx_poll - wait for condition variable, thread's exit, or IRQ
* @usec_p: Pointer to usec for timeout. Forever if NULL.
* @usec_p: Pointer to usec for timeout. Forever if NULL. It is
* updated on return
* @n: Number of poll descriptors
* @pd_array: Pointer to an array of poll descriptor pointer which
* should be one of:
@@ -1332,6 +1378,7 @@ chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *const pd_array[])
struct chx_poll_head *pd;
int r = 0;
chx_dmb ();
chopstx_testcancel ();
for (i = 0; i < n; i++)
@@ -1340,7 +1387,6 @@ chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *const pd_array[])
for (i = 0; i < n; i++)
{
pd = pd_array[i];
pd->ready = 0;
px[i].ready_p = &pd->ready;
if (pd->type == CHOPSTX_POLL_COND)
chx_cond_hook (&px[i], pd);
@@ -1384,6 +1430,7 @@ chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *const pd_array[])
while (r == 0);
}
chx_dmb ();
for (i = 0; i < n; i++)
{
pd = pd_array[i];
@@ -1404,9 +1451,7 @@ chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *const pd_array[])
{
struct chx_intr *intr = (struct chx_intr *)pd;
if (intr->ready)
chx_clr_intr (intr->irq_num);
else
if (intr->ready == 0)
{
chx_spin_lock (&q_intr.lock);
ll_dequeue ((struct chx_pq *)&px[i]);

View File

@@ -1,7 +1,7 @@
/*
* chopstx.h - Threads and only threads.
*
* Copyright (C) 2013, 2016, 2017 Flying Stone Technology
* Copyright (C) 2013, 2016, 2017, 2018 Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
@@ -155,7 +155,8 @@ typedef struct chx_intr chopstx_intr_t;
void chopstx_claim_irq (chopstx_intr_t *intr, uint8_t irq_num);
void chopstx_intr_wait (chopstx_intr_t *intr); /* DEPRECATED */
void chopstx_intr_wait (chopstx_intr_t *intr);
void chopstx_intr_done (chopstx_intr_t *intr);
int chopstx_poll (uint32_t *usec_p, int n,

115
contrib/ackbtn-stm32f103.c Normal file
View File

@@ -0,0 +1,115 @@
/*
* ackbtn-stm32f103.c - Acknowledge button support for STM32F103
*
* Copyright (C) 2018 g10 Code GmbH
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
*
* Chopstx is free software: you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* Chopstx is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
* General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*
* As additional permission under GNU GPL version 3 section 7, you may
* distribute non-source form of the Program without the copy of the
* GNU GPL normally required by section 4, provided you inform the
* receipents of GNU GPL by a written offer.
*
*/
#include <stdint.h>
#include <string.h>
#include <chopstx.h>
#include <mcu/stm32f103.h>
#include "board.h"
#include "sys.h"
/*
* All EXTI registers (EXTI_IMR, EXTI_EMR, EXTI_PR , EXTI_RTSR, and
* EXTI_FTSR) have same structure, where each bit of X is used for
* line X, from 0 up to 19.
*
* We use 31-bit of PIN_CONFIG to represent if it's for rising edge or
* falling edge.
*/
static uint32_t pin_config;
#define PINCFG_EDGE 0x80000000
#define PINCFG_EDGE_RISING PINCFG_EDGE
void
ackbtn_init (chopstx_intr_t *intr)
{
uint8_t irq_num;
uint32_t afio_exticr_index;
uint32_t afio_exticr_extiX_pY;
switch (SYS_BOARD_ID)
{
case BOARD_ID_FST_01:
case BOARD_ID_FST_01G:
/* PA2 can be connected to a hall sensor or a switch */
afio_exticr_index = 0;
afio_exticr_extiX_pY = AFIO_EXTICR1_EXTI2_PA;
irq_num = EXTI2_IRQ;
pin_config = 0x0004; /* EXTI_PR_PR2 == EXTI_IMR_MR2 == EXTI_RTSR_TR2 */
pin_config |= PINCFG_EDGE_RISING;
break;
case BOARD_ID_FST_01SZ:
default:
/* PA3 is connected to a hall sensor DRV5032FA */
afio_exticr_index = 0;
afio_exticr_extiX_pY = AFIO_EXTICR1_EXTI3_PA;
irq_num = EXTI3_IRQ;
pin_config = 0x0008; /* EXTI_PR_PR3 == EXTI_IMR_MR3 == EXTI_RTSR_TR3 */
pin_config |= PINCFG_EDGE_RISING;
break;
}
/* Configure EXTI line */
if (afio_exticr_extiX_pY)
AFIO->EXTICR[afio_exticr_index] |= afio_exticr_extiX_pY;
/* Interrupt is masked, now */
EXTI->IMR &= ~(pin_config & ~PINCFG_EDGE);
chopstx_claim_irq (intr, irq_num);
}
void
ackbtn_enable (void)
{
/* Clear pending interrupt */
EXTI->PR |= (pin_config & ~PINCFG_EDGE);
/* Enable interrupt, clearing the mask */
EXTI->IMR |= (pin_config & ~PINCFG_EDGE);
/* Configure which edge is detected */
if ((pin_config & PINCFG_EDGE))
EXTI->RTSR |= (pin_config & ~PINCFG_EDGE);
else
EXTI->FTSR |= (pin_config & ~PINCFG_EDGE);
}
void
ackbtn_disable (void)
{
/* Disable interrupt having the mask */
EXTI->IMR &= ~(pin_config & ~PINCFG_EDGE);
/* Clear pending interrupt */
EXTI->PR |= (pin_config & ~PINCFG_EDGE);
/* Disable edge detection */
EXTI->RTSR &= ~(pin_config & ~PINCFG_EDGE);
EXTI->FTSR &= ~(pin_config & ~PINCFG_EDGE);
}

3
contrib/ackbtn.h Normal file
View File

@@ -0,0 +1,3 @@
void ackbtn_init (chopstx_intr_t *intr);
void ackbtn_enable (void);
void ackbtn_disable (void);

View File

@@ -295,19 +295,20 @@ adc_stop (void)
int
adc_wait_completion (void)
{
struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr };
int i;
while (1)
{
/* Wait DMA completion */
chopstx_poll (NULL, 1, pd_array);
chopstx_intr_wait (&adc_intr);
DMA0->DSR_BCR = (1 << 24);
DMA1->DSR_BCR = (1 << 24);
adc_stop_conversion ();
chopstx_intr_done (&adc_intr);
for (i = 0; i < adc.count; i++)
*adc.p++ = (uint8_t)adc.buf[i];

View File

@@ -192,6 +192,7 @@ get_adc_config (uint32_t config[4])
case BOARD_ID_STM8S_DISCOVERY:
case BOARD_ID_ST_DONGLE:
case BOARD_ID_NITROKEY_START:
case BOARD_ID_FST_01SZ:
default:
config[0] = 0;
config[1] = ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5)
@@ -315,11 +316,10 @@ int
adc_wait_completion (void)
{
uint32_t flags;
struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr };
while (1)
{
chopstx_poll (NULL, 1, pd_array);
chopstx_intr_wait (&adc_intr);
flags = DMA1->ISR & STM32_DMA_ISR_MASK; /* Channel 1 interrupt cause. */
/*
* Clear interrupt cause of channel 1.
@@ -328,6 +328,7 @@ adc_wait_completion (void)
* and TEIF.
*/
DMA1->IFCR = (flags & ~1);
chopstx_intr_done (&adc_intr);
if ((flags & STM32_DMA_ISR_TEIF) != 0) /* DMA errors */
{

View File

@@ -1,7 +1,7 @@
/*
* usart-stm32.c - USART driver for STM32F103 (USART2 and USART3)
*
* Copyright (C) 2017 g10 Code GmbH
* Copyright (C) 2017, 2019 g10 Code GmbH
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
@@ -104,6 +104,7 @@ static const struct brr_setting brr_table[] = {
{ B230400, ( 9 << 4)|12},
{ B460800, ( 4 << 4)|14},
{ B921600, ( 2 << 4)|7},
{ BSCARD, ( 232 << 4)|8},
};
static void *usart_main (void *arg);
@@ -111,6 +112,18 @@ static void *usart_main (void *arg);
static struct usart_stat usart2_stat;
static struct usart_stat usart3_stat;
void
usart_config_clken (uint8_t dev_no, int on)
{
struct USART *USARTx = get_usart_dev (dev_no);
if (on)
USARTx->CR2 |= (1 << 11);
else
USARTx->CR2 &= ~(1 << 11);
}
int
usart_config (uint8_t dev_no, uint32_t config_bits)
{
@@ -136,9 +149,9 @@ usart_config (uint8_t dev_no, uint32_t config_bits)
return -1;
if ((config_bits & PARENB) == 0)
cr1_config &= ~USART_CR1_PCE;
cr1_config &= ~(USART_CR1_PCE | USART_CR1_PEIE);
else
cr1_config |= USART_CR1_PCE;
cr1_config |= (USART_CR1_PCE | USART_CR1_PEIE);
if ((config_bits & PARODD) == 0)
cr1_config &= ~USART_CR1_PS;
@@ -169,6 +182,21 @@ usart_config (uint8_t dev_no, uint32_t config_bits)
USARTx->CR3 = 0;
USARTx->CR1 = cr1_config;
/* SCEN (smartcard enable) should be set _after_ CR1. */
if ((config_bits & MASK_MODE))
{
if ((config_bits & MASK_MODE) == MODE_SMARTCARD)
{
USARTx->GTPR = (16 << 8) | 5;
USARTx->CR3 |= ((1 << 5) | (1 << 4));
}
else if ((config_bits & MASK_MODE) == MODE_IRDA)
USARTx->CR3 |= (1 << 1);
else if ((config_bits & MASK_MODE) == MODE_IRDA_LP)
USARTx->CR3 |= (1 << 2) | (1 << 1);
}
return 0;
}
@@ -187,8 +215,6 @@ usart_init (uint16_t prio, uintptr_t stack_addr, size_t stack_size,
RCC->APB1RSTR = ((1 << 18) | (1 << 17));
RCC->APB1RSTR = 0;
usart_config (2, B115200 | CS8 | STOP1B);
usart_config (3, B115200 | CS8 | STOP1B);
chopstx_create (prio, stack_addr, stack_size, usart_main, NULL);
}
@@ -541,10 +567,16 @@ usart_main (void *arg)
chopstx_poll (NULL, n, usart_poll);
if (usart2_intr.ready)
usart2_tx_ready = handle_intr (USART2, &usart2_rb_h2a, &usart2_stat);
{
usart2_tx_ready = handle_intr (USART2, &usart2_rb_h2a, &usart2_stat);
chopstx_intr_done (&usart2_intr);
}
if (usart3_intr.ready)
usart3_tx_ready = handle_intr (USART3, &usart3_rb_h2a, &usart3_stat);
{
usart3_tx_ready = handle_intr (USART3, &usart3_rb_h2a, &usart3_stat);
chopstx_intr_done (&usart3_intr);
}
if (usart2_tx_ready && usart2_app_write_event.ready)
usart2_tx_ready = handle_tx_ready (USART2,

View File

@@ -11,6 +11,7 @@
#define B230400 26
#define B460800 27
#define B921600 28
#define BSCARD 63
#define MASK_BAUD 0x3f
/* POSIX supports 5, 6. USB suppots 16 */
@@ -43,6 +44,13 @@ PAR_BITS 3
/* USB: SERIAL_STATE
DSR DCD RI */
/* non-POSIX, non-USB-CDC configs */
#define MODE_SMARTCARD (1 << 30)
#define MODE_IRDA (2UL << 30)
#define MODE_IRDA_LP (3UL << 30)
#define MASK_MODE (0x3UL << 30)
/* 0: standard, 1: smartcard, 2: IrDA, 3: IrDA-LP */
struct usart_stat {
uint8_t dev_no;
@@ -64,3 +72,4 @@ int usart_read (uint8_t dev_no, char *buf, uint16_t buflen);
int usart_write (uint8_t dev_no, char *buf, uint16_t buflen);
const struct usart_stat *usart_stat (uint8_t dev_no);
int usart_send_break (uint8_t dev_no);
void usart_config_clken (uint8_t dev_no, int on);

View File

@@ -107,6 +107,14 @@ Claim interrupt @var{intr} with @var{irq_num}
Wait for the interrupt @var{intr} to be occured.
@end deftypefun
@subheading chopstx_intr_done
@anchor{chopstx_intr_done}
@deftypefun {void} {chopstx_intr_done} (chopstx_intr_t * @var{intr})
@var{intr}: Pointer to INTR structure
Finish for the interrupt @var{intr} occurred.
@end deftypefun
@subheading chopstx_cleanup_push
@anchor{chopstx_cleanup_push}
@deftypefun {void} {chopstx_cleanup_push} (struct chx_cleanup * @var{clp})

View File

@@ -1,7 +1,7 @@
\input texinfo @c -*-texinfo-*-
@c %**start of header
@setfilename chopstx.info
@set VERSION 1.9
@set VERSION 1.14
@settitle Chopstx Reference Manual
@c Unify some of the indices.
@syncodeindex tp fn

View File

@@ -1,7 +1,7 @@
/*
* eventflag.c - Eventflag
*
* Copyright (C) 2013, 2016 Flying Stone Technology
* Copyright (C) 2013, 2016, 2018 Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
@@ -36,17 +36,29 @@ void
eventflag_init (struct eventflag *ev)
{
ev->flags = 0;
ev->mask = ~0;
chopstx_cond_init (&ev->cond);
chopstx_mutex_init (&ev->mutex);
}
void
eventflag_set_mask (struct eventflag *ev, eventmask_t m)
{
chopstx_mutex_lock (&ev->mutex);
ev->mask = m;
if ((ev->flags & ev->mask))
chopstx_cond_signal (&ev->cond);
chopstx_mutex_unlock (&ev->mutex);
}
static int
eventflag_check (void *arg)
{
struct eventflag *ev = arg;
return ev->flags != 0;
return (ev->flags & ev->mask) != 0;
}
@@ -62,6 +74,9 @@ eventflag_prepare_poll (struct eventflag *ev, chopstx_poll_cond_t *poll_desc)
}
/* When multiple events are marked, event with lower bit has precedence.
Because __builtin_ffs returns the least significant 1-bit. */
eventmask_t
eventflag_get (struct eventflag *ev)
{
@@ -69,7 +84,7 @@ eventflag_get (struct eventflag *ev)
eventmask_t m;
chopstx_mutex_lock (&ev->mutex);
n = __builtin_ffs (ev->flags);
n = __builtin_ffs ((ev->flags & ev->mask));
if (n)
{
m = (1 << (n - 1));
@@ -90,10 +105,10 @@ eventflag_wait (struct eventflag *ev)
eventmask_t m;
chopstx_mutex_lock (&ev->mutex);
if (!ev->flags)
while (!(ev->flags & ev->mask))
chopstx_cond_wait (&ev->cond, &ev->mutex);
n = __builtin_ffs (ev->flags);
n = __builtin_ffs ((ev->flags & ev->mask));
if (n) /* Always n > 0 when waked up, but make sure no bad things. */
{
m = (1 << (n - 1));
@@ -124,6 +139,7 @@ eventflag_signal (struct eventflag *ev, eventmask_t m)
{
chopstx_mutex_lock (&ev->mutex);
ev->flags |= m;
chopstx_cond_signal (&ev->cond);
if ((ev->flags & ev->mask))
chopstx_cond_signal (&ev->cond);
chopstx_mutex_unlock (&ev->mutex);
}

View File

@@ -2,11 +2,13 @@ typedef uint32_t eventmask_t;
struct eventflag {
eventmask_t flags;
eventmask_t mask;
chopstx_mutex_t mutex;
chopstx_cond_t cond;
};
void eventflag_init (struct eventflag *ev);
void eventflag_set_mask (struct eventflag *ev, eventmask_t m);
eventmask_t eventflag_wait (struct eventflag *ev);
eventmask_t eventflag_wait_timeout (struct eventflag *ev, uint32_t usec);
void eventflag_signal (struct eventflag *ev, eventmask_t m);

View File

@@ -708,6 +708,7 @@ tty_main (void *arg)
*
*/
e = usb_lld_event_handler (&dev);
chopstx_intr_done (&usb_intr);
ep_num = USB_EVENT_ENDP (e);
if (ep_num != 0)

View File

@@ -10,6 +10,7 @@ CHIP=stm32f103
USE_SYS = yes
USE_USB = yes
ENABLE_OUTPUT_HEX=yes
###################################
CROSS = arm-none-eabi-
@@ -19,7 +20,7 @@ OBJCOPY = $(CROSS)objcopy
MCU = cortex-m3
CWARN = -Wall -Wextra -Wstrict-prototypes
DEFS = -DUSE_SYS3 -DFREE_STANDING
DEFS = -DUSE_SYS3 -DFREE_STANDING -DMHZ=72
OPT = -O3 -Os -g
LIBS =

View File

@@ -719,6 +719,7 @@ tty_main (void *arg)
*
*/
e = usb_lld_event_handler (&dev);
chopstx_intr_done (&usb_intr);
ep_num = USB_EVENT_ENDP (e);
if (ep_num != 0)

View File

@@ -185,6 +185,7 @@ usb_main (void *arg)
event_handle:
e = usb_lld_event_handler (&dev);
chopstx_intr_done (&interrupt);
ep_num = USB_EVENT_ENDP (e);
if (ep_num != 0)

View File

@@ -74,6 +74,7 @@ touch_get (void)
TPM1->SC = 0;
TPM1->CNT = 0xffff; /* Writing causes reset of the counter. */
chopstx_intr_done (&tpm1_intr);
return v;
}

View File

@@ -708,6 +708,7 @@ tty_main (void *arg)
*
*/
e = usb_lld_event_handler (&dev);
chopstx_intr_done (&usb_intr);
ep_num = USB_EVENT_ENDP (e);
if (ep_num != 0)

View File

@@ -107,6 +107,10 @@ void adc3_conversion (uint32_t *result)
/* Stop conversion. */
ADC3->CR2 &= ~ADC_CR2_JSWSTART;
#if USE_ADC3_INTR
chopstx_intr_done (&adc3_intr);
#endif
return;
}

View File

@@ -20,7 +20,7 @@ OBJCOPY = $(CROSS)objcopy
MCU = cortex-m3
CWARN = -Wall -Wextra -Wstrict-prototypes
DEFS = -DUSE_SYS3 -DFREE_STANDING
DEFS = -DUSE_SYS3 -DFREE_STANDING -DMHZ=72
OPT = -O3 -Os -g
LIBS =

View File

@@ -1,12 +1,19 @@
This is an application example using ST Nucleo F103 board.
SB62 and SB63 should be soldered.
ST-Link/V2 is disconnected (SB13 and SB14).
SB62 and SB63 should be soldered to connect PA2 and PA3 to CN10
connector.
ST-Link/V2's TX and RX are disconnected (by removing SB13 and SB14).
Smartcard can be connected, by using USART3_TX for I/O and USART3_CK
for CLK, PB6 for Vcc, PB8 for Vpp, and PB9 for RST.
NOTE:
Using the USB CDC-ACM for serial communication is a kind of wrong,
because it's designed for modem; No way to control CTSRTS.
because it's designed for modem; In the protocol, we have no way to
control the CTSRTS signal.
TIOCGICOUNT
@@ -19,4 +26,4 @@ TODO:
* stats report control
By vendor specific control?
* Half-duplex support
* Support of other communication mode: smartcard, IrDA, etc.
* Support of other communication mode: IrDA, etc.

View File

@@ -238,6 +238,9 @@ main (int argc, const char *argv[])
usart_init (PRIO_USART, STACK_ADDR_USART, STACK_SIZE_USART, ss_notify);
usart_config (2, B115200 | CS8 | STOP1B);
usart_config (3, B115200 | CS8 | STOP1B);
cdc_usart0.cdc = cdc_open (0);
cdc_usart0.dev_no = 2;
cdc_usart1.cdc = cdc_open (1);

View File

@@ -770,6 +770,7 @@ cdc_main (void *arg)
*
*/
e = usb_lld_event_handler (&dev);
chopstx_intr_done (&usb_intr);
ep_num = USB_EVENT_ENDP (e);
if (ep_num != 0)

View File

@@ -1,7 +1,7 @@
/*
* clk_gpio_init-stm32.c - Clock and GPIO initialization for STM32.
*
* Copyright (C) 2015 Flying Stone Technology
* Copyright (C) 2015, 2018 Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
@@ -26,7 +26,11 @@
*
*/
#if defined(MCU_STM32F0)
#include <mcu/stm32.h>
#else
#include <mcu/stm32f103.h>
#endif
#if defined(MCU_STM32F0)
#define STM32_PPRE1 STM32_PPRE1_DIV1
@@ -57,34 +61,6 @@
#define STM32_HCLK (STM32_SYSCLK / 1)
#if defined(MCU_STM32F0)
struct SYSCFG {
volatile uint32_t CFGR1;
uint32_t dummy0;
volatile uint32_t EXTICR[4];
volatile uint32_t CFGR2;
};
#define SYSCFG_CFGR1_MEM_MODE 0x03
#define SYSCFG_BASE (APB1PERIPH_BASE + 0x00010000)
static struct SYSCFG *const SYSCFG = (struct SYSCFG *)SYSCFG_BASE;
#endif
struct FLASH {
volatile uint32_t ACR;
volatile uint32_t KEYR;
volatile uint32_t OPTKEYR;
volatile uint32_t SR;
volatile uint32_t CR;
volatile uint32_t AR;
volatile uint32_t RESERVED;
volatile uint32_t OBR;
volatile uint32_t WRPR;
};
#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
static struct FLASH *const FLASH = (struct FLASH *)FLASH_R_BASE;
static void __attribute__((used))
clock_init (void)
{
@@ -140,75 +116,6 @@ clock_init (void)
}
#if defined(MCU_STM32F0)
struct GPIO {
volatile uint32_t MODER;
volatile uint16_t OTYPER;
uint16_t dummy0;
volatile uint32_t OSPEEDR;
volatile uint32_t PUPDR;
volatile uint16_t IDR;
uint16_t dummy1;
volatile uint16_t ODR;
uint16_t dummy2;
volatile uint16_t BSRR;
uint16_t dummy3;
volatile uint32_t LCKR;
volatile uint32_t AFR[2];
volatile uint16_t BRR;
uint16_t dummy4;
};
#define GPIOA_BASE (AHB2PERIPH_BASE + 0x0000)
#define GPIOA ((struct GPIO *) GPIOA_BASE)
#define GPIOB_BASE (AHB2PERIPH_BASE + 0x0400)
#define GPIOB ((struct GPIO *) GPIOB_BASE)
#define GPIOC_BASE (AHB2PERIPH_BASE + 0x0800)
#define GPIOC ((struct GPIO *) GPIOC_BASE)
#define GPIOD_BASE (AHB2PERIPH_BASE + 0x0C00)
#define GPIOD ((struct GPIO *) GPIOD_BASE)
#define GPIOF_BASE (AHB2PERIPH_BASE + 0x1400)
#define GPIOF ((struct GPIO *) GPIOF_BASE)
#else
struct AFIO
{
volatile uint32_t EVCR;
volatile uint32_t MAPR;
volatile uint32_t EXTICR[4];
uint32_t RESERVED0;
volatile uint32_t MAPR2;
};
#define AFIO_BASE 0x40010000
static struct AFIO *const AFIO = (struct AFIO *)AFIO_BASE;
#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
#define AFIO_MAPR_SWJ_CFG_DISABLE 0x04000000
#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE 0x02000000
struct GPIO {
volatile uint32_t CRL;
volatile uint32_t CRH;
volatile uint32_t IDR;
volatile uint32_t ODR;
volatile uint32_t BSRR;
volatile uint32_t BRR;
volatile uint32_t LCKR;
};
#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
#define GPIOA ((struct GPIO *) GPIOA_BASE)
#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
#define GPIOB ((struct GPIO *) GPIOB_BASE)
#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
#define GPIOC ((struct GPIO *) GPIOC_BASE)
#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
#define GPIOD ((struct GPIO *) GPIOD_BASE)
#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
#define GPIOE ((struct GPIO *) GPIOE_BASE)
#endif
static struct GPIO *const GPIO_LED = (struct GPIO *)GPIO_LED_BASE;
#ifdef GPIO_USB_BASE
static struct GPIO *const GPIO_USB = (struct GPIO *)GPIO_USB_BASE;
@@ -248,7 +155,7 @@ gpio_init (void)
AFIO->MAPR |= AFIO_MAPR_SOMETHING;
#endif
/* LED is mandatory. If it's on an independent port, we configure it. */
/* LED is mandatory. We configure it always. */
GPIO_LED->ODR = VAL_GPIO_LED_ODR;
GPIO_LED->CRH = VAL_GPIO_LED_CRH;
GPIO_LED->CRL = VAL_GPIO_LED_CRL;

View File

@@ -140,3 +140,85 @@ static struct PWR *const PWR = ((struct PWR *)0x40007000);
#define PWR_CR_LPDS 0x0001 /* Low-power deepsleep */
#define PWR_CR_PDDS 0x0002 /* Power down deepsleep */
#define PWR_CR_CWUF 0x0004 /* Clear wakeup flag */
#if defined(MCU_STM32F0)
struct GPIO {
volatile uint32_t MODER;
volatile uint16_t OTYPER;
uint16_t dummy0;
volatile uint32_t OSPEEDR;
volatile uint32_t PUPDR;
volatile uint16_t IDR;
uint16_t dummy1;
volatile uint16_t ODR;
uint16_t dummy2;
volatile uint16_t BSRR;
uint16_t dummy3;
volatile uint32_t LCKR;
volatile uint32_t AFR[2];
volatile uint16_t BRR;
uint16_t dummy4;
};
#define GPIOA_BASE (AHB2PERIPH_BASE + 0x0000)
#define GPIOA ((struct GPIO *) GPIOA_BASE)
#define GPIOB_BASE (AHB2PERIPH_BASE + 0x0400)
#define GPIOB ((struct GPIO *) GPIOB_BASE)
#define GPIOC_BASE (AHB2PERIPH_BASE + 0x0800)
#define GPIOC ((struct GPIO *) GPIOC_BASE)
#define GPIOD_BASE (AHB2PERIPH_BASE + 0x0C00)
#define GPIOD ((struct GPIO *) GPIOD_BASE)
#define GPIOF_BASE (AHB2PERIPH_BASE + 0x1400)
#define GPIOF ((struct GPIO *) GPIOF_BASE)
#else
struct GPIO {
volatile uint32_t CRL;
volatile uint32_t CRH;
volatile uint32_t IDR;
volatile uint32_t ODR;
volatile uint32_t BSRR;
volatile uint32_t BRR;
volatile uint32_t LCKR;
};
#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800)
#define GPIOA ((struct GPIO *) GPIOA_BASE)
#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00)
#define GPIOB ((struct GPIO *) GPIOB_BASE)
#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000)
#define GPIOC ((struct GPIO *) GPIOC_BASE)
#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400)
#define GPIOD ((struct GPIO *) GPIOD_BASE)
#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
#define GPIOE ((struct GPIO *) GPIOE_BASE)
#endif
#if defined(MCU_STM32F0)
struct SYSCFG {
volatile uint32_t CFGR1;
uint32_t dummy0;
volatile uint32_t EXTICR[4];
volatile uint32_t CFGR2;
};
#define SYSCFG_CFGR1_MEM_MODE 0x03
#define SYSCFG_BASE (APB1PERIPH_BASE + 0x00010000)
static struct SYSCFG *const SYSCFG = (struct SYSCFG *)SYSCFG_BASE;
#endif
struct FLASH {
volatile uint32_t ACR;
volatile uint32_t KEYR;
volatile uint32_t OPTKEYR;
volatile uint32_t SR;
volatile uint32_t CR;
volatile uint32_t AR;
volatile uint32_t RESERVED;
volatile uint32_t OBR;
volatile uint32_t WRPR;
};
#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
static struct FLASH *const FLASH = (struct FLASH *)FLASH_R_BASE;

View File

@@ -574,6 +574,8 @@ static struct EXTI *const EXTI = (struct EXTI *)EXTI_BASE;
#define EXTI0_IRQ 6
#define EXTI1_IRQ 7
#define EXTI2_IRQ 8
#define EXTI3_IRQ 9
#define EXTI4_IRQ 10
#define EXTI9_5_IRQ 23
#define TIM2_IRQ 28
#define TIM3_IRQ 29
@@ -633,6 +635,7 @@ static struct AFIO *const AFIO = (struct AFIO *)AFIO_BASE;
#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
#define AFIO_MAPR_SWJ_CFG_DISABLE 0x04000000
#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE 0x02000000
struct DBGMCU {

View File

@@ -23,14 +23,14 @@
#include "board.h"
#define ADDR_VECTORS (0x00000900)
#define ADDR_SCR_VTOR 0xe000ed08
#define ADDR_SCB_VTOR 0xe000ed08
static void __attribute__ ((naked,section(".fixed_function.reset")))
reset (void)
{
uint32_t r3 = ADDR_SCR_VTOR;
uint32_t r3 = ADDR_SCB_VTOR;
asm volatile ("str %2, [%0]\n\t" /* Set SCR->VTOR */
asm volatile ("str %2, [%0]\n\t" /* Set SCB->VTOR */
"ldr %0, [%2]\n\t" /* Stack address */
"msr MSP, %0\n\t" /* Exception handler stack. */
"ldr %0, [%2, #4]\n\t" /* The entry address */

View File

@@ -340,13 +340,13 @@ reset (void)
#else
extern const uint32_t FT0[256], FT1[256], FT2[256];
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
"ldr r0, 1f\n\t" /* r0 = SCR */
"ldr r0, 1f\n\t" /* r0 = SCB start */
"mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
"mov r2, #0x1000\n\t"
"add r1, r1, r2\n\t"
"sub r2, r2, #1\n\t"
"bic r1, r1, r2\n\t"
"str r1, [r0, #8]\n\t" /* Set SCR->VCR */
"str r1, [r0, #8]\n\t" /* Set SCB->VTOR */
"ldr r0, [r1], #4\n\t"
"msr MSP, r0\n\t" /* Main (exception handler) stack. */
"ldr r0, [r1]\n\t" /* Reset handler. */

View File

@@ -18,7 +18,6 @@
#include <stdlib.h>
#include "board.h"
#include "mcu/cortex-m.h"
#include "mcu/clk_gpio_init-stm32.c"
@@ -322,13 +321,13 @@ reset (void)
* So, we take the address from PC.
*/
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
"ldr r0, 1f\n\t" /* r0 = SCR */
"ldr r0, 1f\n\t" /* r0 = SCB start */
"mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
"mov r2, #0x1000\n\t"
"add r1, r1, r2\n\t"
"sub r2, r2, #1\n\t"
"bic r1, r1, r2\n\t"
"str r1, [r0, #8]\n\t" /* Set SCR->VCR */
"str r1, [r0, #8]\n\t" /* Set SCB->VTOR */
"ldr r0, [r1], #4\n\t"
"msr MSP, r0\n\t" /* Main (exception handler) stack. */
"ldr r0, [r1]\n\t" /* Reset handler. */

View File

@@ -2,6 +2,7 @@
#define BOARD_ID_FST_01_00 0x613870a9
#define BOARD_ID_FST_01 0x696886af
#define BOARD_ID_FST_01G 0x8801277f
#define BOARD_ID_FST_01SZ 0x7e6fb084
#define BOARD_ID_MAPLE_MINI 0x7a445272
#define BOARD_ID_OLIMEX_STM32_H103 0xf92bb594
#define BOARD_ID_STBEE_MINI 0x1f341961

View File

@@ -1,7 +1,7 @@
/*
* usb-mkl27z.c - USB driver for MKL27Z
*
* Copyright (C) 2016 Flying Stone Technology
* Copyright (C) 2016, 2018 Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
@@ -950,11 +950,11 @@ usb_lld_ctrl_send (struct usb_dev *dev, const void *buf, size_t buflen)
data_p->len = buflen;
/* Restrict the data length to be the one host asks for */
if (data_p->len > len_asked)
if (data_p->len >= len_asked)
data_p->len = len_asked;
data_p->require_zlp = (data_p->len != 0
&& (data_p->len % USB_MAX_PACKET_SIZE) == 0);
/* ZLP is only required when host doesn't expect the end of packets. */
else if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
data_p->require_zlp = 1;
if (data_p->len < USB_MAX_PACKET_SIZE)
{

View File

@@ -1,7 +1,7 @@
/*
* usb-stm32f103.c - USB driver for STM32F103
*
* Copyright (C) 2016, 2017 Flying Stone Technology
* Copyright (C) 2016, 2017, 2018 Flying Stone Technology
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
@@ -1105,10 +1105,10 @@ usb_lld_ctrl_send (struct usb_dev *dev, const void *buf, size_t buflen)
data_p->len = buflen;
/* Restrict the data length to be the one host asks for */
if (data_p->len > len_asked)
if (data_p->len >= len_asked)
data_p->len = len_asked;
if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
/* ZLP is only required when host doesn't expect the end of packets. */
else if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
data_p->require_zlp = 1;
if (data_p->len < USB_MAX_PACKET_SIZE)

View File

@@ -1,7 +1,7 @@
/*
* usb-usbip.c - USB Device Emulation (server side) by USBIP
*
* Copyright (C) 2017 g10 Code GmbH
* Copyright (C) 2017, 2018 g10 Code GmbH
* Author: NIIBE Yutaka <gniibe@fsij.org>
*
* This file is a part of Chopstx, a thread library for embedded.
@@ -2169,10 +2169,10 @@ usb_lld_ctrl_send (struct usb_dev *dev, const void *buf, size_t buflen)
data_p->len = buflen;
/* Restrict the data length to be the one host asks for */
if (data_p->len > len_asked)
if (data_p->len >= len_asked)
data_p->len = len_asked;
if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
/* ZLP is only required when host doesn't expect the end of packets. */
else if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
data_p->require_zlp = 1;
if (data_p->len < USB_MAX_PACKET_SIZE)

View File

@@ -28,6 +28,9 @@ endif
ifneq ($(USE_USART),)
CSRC += $(CHOPSTX)/contrib/usart-$(CHIP).c
endif
ifneq ($(USE_ACKBTN),)
CSRC += $(CHOPSTX)/contrib/ackbtn-$(CHIP).c
endif
INCDIR += $(CHOPSTX)