Version 1.10.

.gitlab-ci.yml

@@ -0,0 +1,15 @@
+image: debian:stable
+
+before_script:
+  - apt-get update && apt-get -y install texi2html
+
+pages:
+  stage: deploy
+  script:
+  - mkdir -p html && (cd html && texi2html ../doc/chopstx.texi)
+  - mv html/ public
+  artifacts:
+    paths:
+    - public
+  only:
+    - master

ChangeLog

@@ -1,3 +1,88 @@
+2018-09-29  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.10.
+	* doc/chopstx.texi (VERSION): 1.10.
+
+2018-09-27  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* contrib/ackbtn-stm32f103.c: New.
+	* rules.mk [USE_ACKBTN] (CSRC): Add ack-button support.
+
+2018-09-26  NIIBE Yutaka  <gniibe@fsij.org>
+
+	Fix for chopstx_intr_done.  No spurious interrupts.
+	* contrib/adc-mkl27z.c (adc_wait_completion): Fix.
+	* contrib/adc-stm32f103.c (adc_wait_completion): Likewise.
+	* contrib/usart-stm32f103.c (usart_main): Likewise.
+	* example-cdc-gnu-linux/usb-cdc.c (tty_main): Likewise.
+	* example-cdc/usb-cdc.c (tty_main): Likewise.
+	* example-fraucheky/main.c (usb_main): Likewise.
+	* example-fs-bb48/touch.c (touch_get): Likewise.
+	* example-fs-bb48/usb-cdc.c (tty_main): Likewise.
+	* example-primer2/primer2-ts.c (adc3_conversion): Likewise.
+	* example-usb-serial/usb-cdc.c (cdc_main): Likewise.
+
+2018-09-26  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.h (chopstx_intr_done): New function.
+	* chopstx.c (chopstx_intr_done): New function.
+	(chopstx_poll): Don't call chx_clr_intr.
+	Ensure data memory barrier for interrupt handling.
+
+	* chopstx-cortex-m.c (chx_dmb): New static function.
+	* chopstx-gnu-linux.c (chx_dmb): Ditto.
+
+2018-09-21  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/stm32.h (struct GPIO, struct FLASH): Moved from...
+	* mcu/clk_gpio_init-stm32.c: ... here.
+	(AFIO_MAPR_SWJ_CFG_JTAGDISABLE): Move to ...
+	* mcu/stm32f103.h: ... here.
+	* mcu/sys-stm32f103.c: Don't include "mcu/cortex-m.h".
+
+	* board/board-fst-01sz.h: New.
+	* mcu/sys-stm32f103.h (BOARD_ID_FST_01SZ): New.
+	* contrib/adc-stm32f103.c (get_adc_config): Add BOARD_ID_FST_01SZ.
+
+2018-08-20  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/usb-stm32f103.c (usb_lld_ctrl_send): Fix for ZLP.
+	* mcu/usb-usbip.c (usb_lld_ctrl_send): Likewise.
+	* mcu/usb-mkl27z.c (usb_lld_ctrl_send): Likewise.
+
+2018-05-09  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.9.
+	* doc/chopstx.texi (VERSION): 1.9.
+
+2018-05-08  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-blue-pill.h (GPIO_USB_SET_TO_ENABLE): Remove.
+
+	* doc/chopstx.texi (Compile-time macro): New chapter.
+
+	* mcu/sys-stm32f103.c (usb_lld_sys_init): Use MHZ.
+	(flash_protect): Fix for GD32F103.
+
+2018-04-26  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* board/board-blue-pill-g.h: New.  Define STM32_ADCPRE and
+	STM32_USBPRE for 96MHz clock.
+	* mcu/stm32.h (STM32_USBPRE_DIV2): New for GD32F103.
+	* mcu/clk_gpio_init-stm32.c: Allow constants, which are defined by
+	board.h	(STM32_ADCPRE and STM32_USBPRE).
+	* mcu/chx-stm32f103.c: Use STM32_ADCPRE and STM32_USBPRE.
+
+	* mcu/usb-stm32f103.c (usb_lld_init): BTABLE setting at
+	initialization.
+	(usb_lld_reset): Not at each reset.
+
+	* contrib/adc-stm32f103.c [MCU_STM32F1_GD32F1]: Use continuous
+	sampling with no DELIBARATELY_DO_IT_WRONG_START_STOP.
+	(adc_init): Wait after ADC_CR2_ADON.
+	(adc_start): Likewise.  Enabling by ADC_CR2_ADON after all other
+	registers configuration.
+
 2018-01-19  NIIBE Yutaka  <gniibe@fsij.org>
 
 	* VERSION: 1.8.

NEWS

@@ -1,6 +1,44 @@
 NEWS - Noteworthy changes
 
 
+* Major changes in Chopstx 1.10
+
+  Released 2018-09-29
+
+** Function chopstx_intr_wait is not deprecated, now.
+Once, it was said that it's deprecated, but it's active again
+to match the new function of chopstx_intr_done.
+
+** API change: chopstx_poll, chopstx_intr_wait, chopstx_intr_done
+To avoid spurious interrupt, we introduce new function
+chopstx_intr_done, which should be called after interrupt handling.
+
+** New driver: Acknowledge button for FST-01SZ
+The use case is waiting user's acknowledge.  We use EXTI interrupt
+feature of STM32.
+
+
+* Major changes in Chopstx 1.9
+
+  Released 2018-05-09
+
+** GD32F103 support
+GD32F103 is an alternative implementation of STM32F103 by Giga Device,
+which can run at 96MHz.
+
+** Minor USB driver fix for STM32F103/GD32F103
+BTABLE setting should be done at initialization, not at USB RESET.
+
+** Minor SYS driver fix for GD32F103
+flash_protect should check FLASH_CR_OPTWRE.
+
+** Minor ADC driver change for GD32F103
+ADC on GD32F103 is another implementation and its behavior is somewhat
+different.  It requires waits after enabling.  So, we use continuous
+sampling, instead of start and stop for each sample.  Still, we
+observe enough noise (> 4.7 bit/byte) for each ADC sampling.
+
+
 * Major changes in Chopstx 1.8
 
   Released 2018-01-19

README

@@ -1,14 +1,14 @@
 Chopstx - Threads and only Threads
-							 Version 1.8
+							Version 1.10
-							  2018-01-19
+							  2018-09-29
 							Niibe Yutaka
 					     Flying Stone Technology
 
 What's Chopstx?
 ===============
 
-Chopstx is an RT thread library for STM32F103 (ARM Cortex-M3),
+Chopstx is an RT thread library for STM32F103 and GD32F103 (ARM
-STM32F030 (ARM Cortex-M0), MKL27Z (ARM Cortex-M0plus), and
+Cortex-M3), STM32F030 (ARM Cortex-M0), MKL27Z (ARM Cortex-M0plus), and
 emulation on GNU/Linux.
 
 While most RTOSes come with many features, drivers, and protocol
@@ -49,6 +49,8 @@ CDC-ACM demo by:
    $ ln -sf ../board/board-olimex-stm32-h103.h board.h
    $ make
 
+If you want to try GD32F103, Add -DMHZ=96 to DEFS in Makefile.
+
 For a specific board named FSM-55, an example of LED matrix dynamic
 driver is provided.  See the directory: example-fsm-55.
 

VERSION

@@ -1 +1 @@
-release/1.8
+release/1.10

board/board-blue-pill-g.h

@@ -0,0 +1,42 @@
+#define BOARD_NAME "Blue Pill GD32F103"
+/* http://wiki.stm32duino.com/index.php?title=Blue_Pill */
+/* echo -n "Blue Pill GD32F103" | shasum -a 256 | sed -e 's/^.*\(........\)  -$/\1/' */
+#define BOARD_ID    0xed415594
+
+#define MCU_STM32F1_GD32F1 1
+#define STM32_USBPRE                    STM32_USBPRE_DIV2
+#define STM32_ADCPRE                    STM32_ADCPRE_DIV8
+
+#define MCU_STM32F1 1
+#define STM32F10X_MD		/* Medium-density device */
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              12
+#define STM32_HSECLK                    8000000
+
+#define GPIO_LED_BASE   GPIOC_BASE
+#define GPIO_LED_CLEAR_TO_EMIT          13
+#define GPIO_USB_BASE   GPIOA_BASE
+#undef  GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ *
+ * Port C setup.
+ * PC13 - Push pull output 50MHz (LED 1:ON 0:OFF)
+ * ------------------------ Default
+ * PAx  - input with pull-up
+ * PCx  - input with pull-up
+ */
+#define VAL_GPIO_USB_ODR            0xFFFFE7FF
+#define VAL_GPIO_USB_CRL            0x88888888      /*  PA7...PA0 */
+#define VAL_GPIO_USB_CRH            0x88811888      /* PA15...PA8 */
+
+#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_CRL            0x88888888      /*  PC7...PC0 */
+#define VAL_GPIO_LED_CRH            0x88388888      /* PC15...PC8 */
+
+#define RCC_ENR_IOP_EN      (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPCEN)
+#define RCC_RSTR_IOP_RST    (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPCRST)

board/board-blue-pill.h

@@ -13,13 +13,14 @@
 #define GPIO_LED_BASE   GPIOC_BASE
 #define GPIO_LED_CLEAR_TO_EMIT          13
 #define GPIO_USB_BASE   GPIOA_BASE
-#define GPIO_USB_SET_TO_ENABLE          12
 #undef  GPIO_OTHER_BASE
 
 /*
  * Port A setup.
  * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
  * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ *
+ * Port C setup.
  * PC13 - Push pull output 50MHz (LED 1:ON 0:OFF)
  * ------------------------ Default
  * PAx  - input with pull-up

board/board-fst-01.h

@@ -71,6 +71,7 @@
  * Those will be removed soon, once such an driver will be improved
  * in new style.
  */
+#if defined(PINPAD_CIR_SUPPORT)
 /* For pin-cir settings of Gnuk */
 #define TIMx                  TIM2
 #define INTR_REQ_TIM          TIM2_IRQ
@@ -83,3 +84,4 @@
 #define ENABLE_RCC_APB1
 #define RCC_APBnENR_TIMxEN    RCC_APB1ENR_TIM2EN
 #define RCC_APBnRSTR_TIMxRST  RCC_APB1RSTR_TIM2RST
+#endif

board/board-fst-01g.h

@@ -71,7 +71,7 @@
  * Those will be removed soon, once such an driver will be improved
  * in new style.
  */
-/* For pin-cir settings of Gnuk */
+#if defined(PINPAD_CIR_SUPPORT)
 #define TIMx                  TIM2
 #define INTR_REQ_TIM          TIM2_IRQ
 #define AFIO_EXTICR_INDEX     0
@@ -83,3 +83,4 @@
 #define ENABLE_RCC_APB1
 #define RCC_APBnENR_TIMxEN    RCC_APB1ENR_TIM2EN
 #define RCC_APBnRSTR_TIMxRST  RCC_APB1RSTR_TIM2RST
+#endif

board/board-fst-01sz.h

@@ -0,0 +1,43 @@
+#define BOARD_NAME "FST-01SZ"
+#define BOARD_ID    0x7e6fb084
+/* echo -n "FST-01SZ" | sha256sum | sed -e 's/^.*\(........\)  -$/\1/' */
+
+#define MCU_STM32F1_GD32F1 1
+#define STM32_USBPRE                    STM32_USBPRE_DIV2
+#define STM32_ADCPRE                    STM32_ADCPRE_DIV8
+
+#define MCU_STM32F1 1
+#define STM32F10X_MD		/* Medium-density device */
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              8
+#define STM32_HSECLK                    12000000
+
+#define GPIO_LED_BASE   GPIOA_BASE
+#define GPIO_LED_SET_TO_EMIT            8
+#define GPIO_USB_BASE   GPIOA_BASE
+#undef  GPIO_OTHER_BASE
+
+/*
+ * Port A setup.
+ * PA0  - input with pull-up: AN0 for NeuG
+ * PA1  - input with pull-up: AN1 for NeuG
+ * PA3  - input with pull-up: Hall effect sensor output
+ * PA8  - Push pull output 10MHz 0 default (LED 1:ON 0:OFF)
+ * PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
+ * PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
+ * ------------------------ Default
+ * PAx  - input with pull-up.
+ */
+#define VAL_GPIO_LED_ODR            0xFFFFE6FF
+#define VAL_GPIO_LED_CRL            0x88888888      /*  PA7...PA0 */
+#define VAL_GPIO_LED_CRH            0x88811881      /* PA15...PA8 */
+
+#define RCC_ENR_IOP_EN      RCC_APB2ENR_IOPAEN
+#define RCC_RSTR_IOP_RST    RCC_APB2RSTR_IOPARST
+
+/*
+ * Board specific information other than clock and GPIO initial
+ * setting should not be in board-*.h, but each driver should include
+ * such specific information by itself.
+ */

board/board-stm8s-discovery.h

@@ -44,7 +44,7 @@
 #define VAL_GPIO_OTHER_CRH 0x88888888      /* PB15...PB8 */
 
 
-/* For pin-cir settings of Gnuk */
+#if defined(PINPAD_CIR_SUPPORT)
 #define TIMx                  TIM3
 #define INTR_REQ_TIM          TIM3_IRQ
 #define AFIO_EXTICR_INDEX     1
@@ -58,3 +58,4 @@
 #define RCC_APBnRSTR_TIMxRST  RCC_APB1RSTR_TIM3RST
 #define AFIO_MAPR_SOMETHING   AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
                               /* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
+#endif

chopstx-cortex-m.c

@@ -2,7 +2,7 @@
  * chopstx-cortex-m.c - Threads and only threads: Arch specific code
  *                      for Cortex-M0/M3
  *
- * Copyright (C) 2013, 2014, 2015, 2016, 2017
+ * Copyright (C) 2013, 2014, 2015, 2016, 2017, 2018
  *               Flying Stone Technology
  * Author: NIIBE Yutaka <gniibe@fsij.org>
  *
@@ -28,6 +28,13 @@
  *
  */
 
+/* Data Memory Barrier.  */
+static void
+chx_dmb (void)
+{
+  asm volatile ("dmb"  : : : "memory");
+}
+
 /* Saved registers on the stack.  */
 struct chx_stack_regs {
   uint32_t reg[8];	       /* r0, r1, r2, r3, r12, lr, pc, xpsr */

chopstx-gnu-linux.c

@@ -2,7 +2,7 @@
  * chopstx-gnu-linux.c - Threads and only threads: Arch specific code
  *                       for GNU/Linux emulation
  *
- * Copyright (C) 2017 Flying Stone Technology
+ * Copyright (C) 2017, 2018 Flying Stone Technology
  * Author: NIIBE Yutaka <gniibe@fsij.org>
  *
  * This file is a part of Chopstx, a thread library for embedded.
@@ -32,6 +32,13 @@
 #include <signal.h>
 #include <sys/time.h>
 
+/* Data Memory Barrier.  */
+static void
+chx_dmb (void)
+{
+}
+
+
 static sigset_t ss_cur;
 
 static void

chopstx.c

@@ -1,7 +1,7 @@
 /*
  * chopstx.c - Threads and only threads.
  *
- * Copyright (C) 2013, 2014, 2015, 2016, 2017
+ * Copyright (C) 2013, 2014, 2015, 2016, 2017, 2018
  *               Flying Stone Technology
  * Author: NIIBE Yutaka <gniibe@fsij.org>
  *
@@ -1034,6 +1034,23 @@ chopstx_intr_wait (chopstx_intr_t *intr)
 }
 
 
+/**
+ * chopstx_intr_done - Finish an IRQ handling
+ * @intr: Pointer to INTR structure
+ *
+ * Finish for the interrupt @intr occurred.
+ *
+ */
+void
+chopstx_intr_done (chopstx_intr_t *intr)
+{
+  chx_dmb ();
+
+  if (intr->ready)
+    chx_clr_intr (intr->irq_num);
+}
+
+
 /**
  * chopstx_cleanup_push - Register a clean-up
  * @clp: Pointer to clean-up structure
@@ -1332,6 +1349,7 @@ chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *const pd_array[])
   struct chx_poll_head *pd;
   int r = 0;
 
+  chx_dmb ();
   chopstx_testcancel ();
 
   for (i = 0; i < n; i++)
@@ -1384,6 +1402,7 @@ chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *const pd_array[])
       while (r == 0);
     }
 
+  chx_dmb ();
   for (i = 0; i < n; i++)
     {
       pd = pd_array[i];
@@ -1404,9 +1423,7 @@ chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *const pd_array[])
 	{
 	  struct chx_intr *intr = (struct chx_intr *)pd;
 
-	  if (intr->ready)
+	  if (intr->ready == 0)
-	    chx_clr_intr (intr->irq_num);
-	  else
 	    {
 	      chx_spin_lock (&q_intr.lock);
 	      ll_dequeue ((struct chx_pq *)&px[i]);

chopstx.h

@@ -155,7 +155,8 @@ typedef struct chx_intr chopstx_intr_t;
 
 void chopstx_claim_irq (chopstx_intr_t *intr, uint8_t irq_num);
 
-void chopstx_intr_wait (chopstx_intr_t *intr); /* DEPRECATED */
+void chopstx_intr_wait (chopstx_intr_t *intr);
+void chopstx_intr_done (chopstx_intr_t *intr);
 
 
 int chopstx_poll (uint32_t *usec_p, int n,

contrib/ackbtn-stm32f103.c

@@ -0,0 +1,88 @@
+/*
+ * ackbtn-stm32f103.c - Acknowledge button support for STM32F103
+ *
+ * Copyright (C) 2018  g10 Code GmbH
+ * Author: NIIBE Yutaka <gniibe@fsij.org>
+ *
+ * This file is a part of Chopstx, a thread library for embedded.
+ *
+ * Chopstx is free software: you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * Chopstx is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ *
+ * As additional permission under GNU GPL version 3 section 7, you may
+ * distribute non-source form of the Program without the copy of the
+ * GNU GPL normally required by section 4, provided you inform the
+ * receipents of GNU GPL by a written offer.
+ *
+ */
+
+#include <stdint.h>
+#include <string.h>
+#include <chopstx.h>
+#include <mcu/stm32f103.h>
+
+#include "board.h"
+#include "sys.h"
+
+static uint32_t pin_config;
+
+void
+ackbtn_init (chopstx_intr_t *intr)
+{
+  uint8_t irq_num;
+  uint32_t afio_exticr_index;
+  uint32_t afio_exticr_extiX_pY;
+  int rising_edge;
+
+  switch (SYS_BOARD_ID)
+    {
+    case BOARD_ID_FST_01SZ:
+    default:
+      /* PA3 is connected to a hall sensor DRV5032FA */
+      afio_exticr_index = 0;
+      afio_exticr_extiX_pY = AFIO_EXTICR1_EXTI3_PA;
+      irq_num = EXTI3_IRQ;
+      pin_config = 0x0008; /* EXTI_PR_PR3 == EXTI_IMR_MR3 == EXTI_RTSR_TR3 */
+      rising_edge = 1;
+      break;
+    }
+
+  chopstx_claim_irq (intr, irq_num);
+
+  /* Configure EXTI line */
+  if (afio_exticr_extiX_pY)
+    AFIO->EXTICR[afio_exticr_index] |= afio_exticr_extiX_pY;
+
+  /* Interrupt is masked, now */
+  EXTI->IMR &= ~pin_config;
+
+  /* Configure which edge is detected */
+  if (rising_edge)
+    EXTI->RTSR |= pin_config;
+  else
+    EXTI->FTSR |= pin_config;
+}
+
+void
+ackbtn_enable (void)
+{
+  EXTI->PR |= pin_config;	/* Clear pending interrupt */
+  EXTI->IMR |= pin_config;	/* Enable interrupt clearing the mask */
+}
+
+void
+ackbtn_disable (void)
+{
+  EXTI->IMR &= ~pin_config;	/* Disable interrupt having the mask */
+  EXTI->PR |= pin_config;	/* Clear pending interrupt */
+}

contrib/ackbtn.h

@@ -0,0 +1,3 @@
+void ackbtn_init (chopstx_intr_t *intr);
+void ackbtn_enable (void);
+void ackbtn_disable (void);

contrib/adc-mkl27z.c

@@ -295,19 +295,20 @@ adc_stop (void)
 int
 adc_wait_completion (void)
 {
-  struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr };
   int i;
 
   while (1)
     {
       /* Wait DMA completion */
-      chopstx_poll (NULL, 1, pd_array);
+      chopstx_intr_wait (&adc_intr);
 
       DMA0->DSR_BCR = (1 << 24);
       DMA1->DSR_BCR = (1 << 24);
 
       adc_stop_conversion ();
 
+      chopstx_intr_done (&adc_intr);
+
       for (i = 0; i < adc.count; i++)
 	*adc.p++ = (uint8_t)adc.buf[i];
 

contrib/adc-stm32f103.c

@@ -34,6 +34,8 @@
 #include <chopstx.h>
 #include <mcu/stm32f103.h>
 #include "adc.h"
+#include "board.h"
+#include "sys.h"
 
 #define STM32_ADC_ADC1_DMA_PRIORITY         2
 
@@ -69,7 +71,9 @@
 #define ADC_CHANNEL_VREFINT     17
 
 #define DELIBARATELY_DO_IT_WRONG_VREF_SAMPLE_TIME
+#ifndef MCU_STM32F1_GD32F1
 #define DELIBARATELY_DO_IT_WRONG_START_STOP
+#endif
 
 #ifdef DELIBARATELY_DO_IT_WRONG_VREF_SAMPLE_TIME
 #define ADC_SAMPLE_VREF ADC_SAMPLE_1P5
@@ -114,6 +118,8 @@ adc_init (void)
 
   ADC1->CR1 = 0;
   ADC1->CR2 = ADC_CR2_ADON;
+  chopstx_usec_wait (1000);
+
   ADC1->CR2 = ADC_CR2_ADON | ADC_CR2_RSTCAL;
   while ((ADC1->CR2 & ADC_CR2_RSTCAL) != 0)
     ;
@@ -124,6 +130,8 @@ adc_init (void)
 
   ADC2->CR1 = 0;
   ADC2->CR2 = ADC_CR2_ADON;
+  chopstx_usec_wait (1000);
+
   ADC2->CR2 = ADC_CR2_ADON | ADC_CR2_RSTCAL;
   while ((ADC2->CR2 & ADC_CR2_RSTCAL) != 0)
     ;
@@ -137,9 +145,6 @@ adc_init (void)
   return 0;
 }
 
-#include "board.h"
-#include "sys.h"
-
 static void
 get_adc_config (uint32_t config[4])
 {
@@ -187,6 +192,7 @@ get_adc_config (uint32_t config[4])
     case BOARD_ID_STM8S_DISCOVERY:
     case BOARD_ID_ST_DONGLE:
     case BOARD_ID_NITROKEY_START:
+    case BOARD_ID_FST_01SZ:
     default:
       config[0] = 0;
       config[1] = ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5)
@@ -212,24 +218,26 @@ adc_start (void)
 
   RCC->APB2ENR |= (RCC_APB2ENR_ADC1EN | RCC_APB2ENR_ADC2EN);
 
-  ADC1->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0
-	       | ADC_CR1_SCAN);
-  ADC1->CR2 = (ADC_CR2_TSVREFE | ADC_CR2_EXTTRIG | ADC_CR2_SWSTART
-	       | ADC_CR2_EXTSEL | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON);
   ADC1->SMPR1 = NEUG_ADC_SETTING1_SMPR1;
   ADC1->SMPR2 = NEUG_ADC_SETTING1_SMPR2;
   ADC1->SQR1 = ADC_SQR1_NUM_CH(NEUG_ADC_SETTING1_NUM_CHANNELS);
   ADC1->SQR2 = 0;
   ADC1->SQR3 = NEUG_ADC_SETTING1_SQR3;
-
+  ADC1->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0
-  ADC2->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0
 	       | ADC_CR1_SCAN);
-  ADC2->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_CONT | ADC_CR2_ADON;
+  ADC1->CR2 = (ADC_CR2_TSVREFE | ADC_CR2_EXTTRIG | ADC_CR2_SWSTART
+	       | ADC_CR2_EXTSEL | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON);
+  chopstx_usec_wait (1000);
+
   ADC2->SMPR1 = config[0];
   ADC2->SMPR2 = config[1];
   ADC2->SQR1 = config[2];
   ADC2->SQR2 = 0;
   ADC2->SQR3 = config[3];
+  ADC2->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0
+	       | ADC_CR1_SCAN);
+  ADC2->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_CONT | ADC_CR2_ADON;
+  chopstx_usec_wait (1000);
 
 #ifdef DELIBARATELY_DO_IT_WRONG_START_STOP
   /*
@@ -308,11 +316,10 @@ int
 adc_wait_completion (void)
 {
   uint32_t flags;
-  struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr };
 
   while (1)
     {
-      chopstx_poll (NULL, 1, pd_array);
+      chopstx_intr_wait (&adc_intr);
       flags = DMA1->ISR & STM32_DMA_ISR_MASK; /* Channel 1 interrupt cause.  */
       /*
        * Clear interrupt cause of channel 1.
@@ -321,6 +328,7 @@ adc_wait_completion (void)
        * and TEIF.
        */
       DMA1->IFCR = (flags & ~1);
+      chopstx_intr_done (&adc_intr);
 
       if ((flags & STM32_DMA_ISR_TEIF) != 0)  /* DMA errors  */
 	{

contrib/usart-stm32f103.c

@@ -541,10 +541,16 @@ usart_main (void *arg)
       chopstx_poll (NULL, n, usart_poll);
 
       if (usart2_intr.ready)
-	usart2_tx_ready = handle_intr (USART2, &usart2_rb_h2a, &usart2_stat);
+	{
+	  usart2_tx_ready = handle_intr (USART2, &usart2_rb_h2a, &usart2_stat);
+	  chopstx_intr_done (&usart2_intr);
+	}
 
       if (usart3_intr.ready)
-	usart3_tx_ready = handle_intr (USART3, &usart3_rb_h2a, &usart3_stat);
+	{
+	  usart3_tx_ready = handle_intr (USART3, &usart3_rb_h2a, &usart3_stat);
+	  chopstx_intr_done (&usart3_intr);
+	}
 
       if (usart2_tx_ready && usart2_app_write_event.ready)
 	usart2_tx_ready = handle_tx_ready (USART2,

doc/chopstx-api.texi

@@ -107,6 +107,14 @@ Claim interrupt @var{intr} with @var{irq_num}
 Wait for the interrupt @var{intr} to be occured.
 @end deftypefun
 
+@subheading chopstx_intr_done
+@anchor{chopstx_intr_done}
+@deftypefun {void} {chopstx_intr_done} (chopstx_intr_t * @var{intr})
+@var{intr}: Pointer to INTR structure
+
+Finish for the interrupt @var{intr} occurred.
+@end deftypefun
+
 @subheading chopstx_cleanup_push
 @anchor{chopstx_cleanup_push}
 @deftypefun {void} {chopstx_cleanup_push} (struct chx_cleanup * @var{clp})

doc/chopstx.texi

@@ -1,7 +1,7 @@
 \input texinfo                      @c -*-texinfo-*-
 @c %**start of header
 @setfilename chopstx.info
-@set VERSION 1.8
+@set VERSION 1.10
 @settitle Chopstx Reference Manual
 @c Unify some of the indices.
 @syncodeindex tp fn
@@ -11,7 +11,7 @@
 This manual is for Chopstx (version @value{VERSION}).
 
 @noindent
-Copyright @copyright{} 2013, 2015, 2016, 2017 Flying Stone Technology @*
+Copyright @copyright{} 2013, 2015, 2016, 2017, 2018 Flying Stone Technology @*
 
 @quotation
 Permission is granted to copy, distribute and/or modify this document
@@ -62,6 +62,7 @@ section entitled ``Copying''.
 * Threads and only Threads::     Threads and only Threads.
 * Poll or Pole::                 Poll or Pole.
 * Note (Use of sleep mode)::     Use it carefully.
+* Compile-time macro::           Macro to be defined.
 * API::                          API.
 
 Appendix
@@ -88,7 +89,7 @@ Indexes
 
 Chopstx is an RT thread library for ARM Cortex-M0, Cortex-M0plus,
 Cortex-M3 and GNU/Linux emulation.  Specifically, it is used for
-STM32F030, MKL27Z, STM32F103 and as a command on GNU/Linux.
+STM32F030, MKL27Z, STM32F103, GD32F103 and as a command on GNU/Linux.
 
 While most RTOSes come with many features, drivers, and stacks,
 Chopstx just offers an RT thread library.
@@ -157,6 +158,21 @@ program carefully.  Enabling sleep, it may result a bricked board; A
 board with no RESET pin cannot be debugged by JTAG/SWD.
 
 
+@node Compile-time macro
+@chapter Compile-time macro
+
+Compiling Chopstx, a macro MHZ should be supplied.
+
+For example, when using the makefile rule of chopstx/rules.mk, please
+define the make variable DEFS with -DMHZ=72 before inclusion of the rule file.
+
+@subheading MHZ
+@anchor{MHZ}
+@defmac {MHZ}
+Running CPU clock in MHz.  Used for chopstx_usec_wait.
+@end defmac
+
+
 @node API
 @chapter API
 

example-cdc-gnu-linux/usb-cdc.c

@@ -708,6 +708,7 @@ tty_main (void *arg)
 	   *        
 	   */
 	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&usb_intr);
 	  ep_num = USB_EVENT_ENDP (e);
 
 	  if (ep_num != 0)

example-cdc/Makefile

@@ -10,6 +10,7 @@ CHIP=stm32f103
 
 USE_SYS = yes
 USE_USB = yes
+ENABLE_OUTPUT_HEX=yes
 
 ###################################
 CROSS = arm-none-eabi-
@@ -19,7 +20,7 @@ OBJCOPY   = $(CROSS)objcopy
 
 MCU   = cortex-m3
 CWARN = -Wall -Wextra -Wstrict-prototypes
-DEFS  = -DUSE_SYS3 -DFREE_STANDING
+DEFS  = -DUSE_SYS3 -DFREE_STANDING -DMHZ=72
 OPT   = -O3 -Os -g
 LIBS  =
 

example-cdc/usb-cdc.c

@@ -719,6 +719,7 @@ tty_main (void *arg)
 	   *        
 	   */
 	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&usb_intr);
 	  ep_num = USB_EVENT_ENDP (e);
 
 	  if (ep_num != 0)

example-fraucheky/main.c

@@ -18,6 +18,7 @@ extern void EP6_OUT_Callback (uint16_t len);
 
 #define MSC_MASS_STORAGE_RESET_COMMAND 0xFF
 extern int fraucheky_enabled (void);
+extern void fraucheky_init (void);
 extern void fraucheky_main (void);
 
 extern void fraucheky_setup_endpoints_for_interface (struct usb_dev *dev, int stop);
@@ -41,10 +42,6 @@ usb_device_reset (struct usb_dev *dev)
   /* Initialize Endpoint 0.  */
   usb_lld_setup_endp (dev, ENDP0, 1, 1);
 
-  /* Stop the interface */
-  for (i = 0; i < NUM_INTERFACES; i++)
-    setup_endpoints_for_interface (dev, i, 1);
-
   /* Notify upper layer.  */
   chopstx_mutex_lock (&usb_mtx);
   bDeviceState = USB_DEVICE_STATE_ATTACHED;
@@ -188,6 +185,7 @@ usb_main (void *arg)
 
 	event_handle:
 	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&interrupt);
 	  ep_num = USB_EVENT_ENDP (e);
 
 	  if (ep_num != 0)
@@ -307,6 +305,7 @@ main (int argc, char **argv)
   bDeviceState = USB_DEVICE_STATE_UNCONNECTED;
   usb_thd = chopstx_create (PRIO_USB, STACK_ADDR_USB, STACK_SIZE_USB,
 			    usb_main, NULL);
+  fraucheky_init ();
   while (bDeviceState != USB_DEVICE_STATE_CONFIGURED)
     chopstx_usec_wait (250*1000);
   fraucheky_main ();

example-fs-bb48/touch.c

@@ -74,6 +74,7 @@ touch_get (void)
   TPM1->SC = 0;
   TPM1->CNT = 0xffff;	   /* Writing causes reset of the counter.  */
 
+  chopstx_intr_done (&tpm1_intr);
   return v;
 }
 

example-fs-bb48/usb-cdc.c

@@ -708,6 +708,7 @@ tty_main (void *arg)
 	   *        
 	   */
 	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&usb_intr);
 	  ep_num = USB_EVENT_ENDP (e);
 
 	  if (ep_num != 0)

example-primer2/primer2-ts.c

@@ -107,6 +107,10 @@ void adc3_conversion (uint32_t *result)
   /* Stop conversion.  */
   ADC3->CR2 &= ~ADC_CR2_JSWSTART;
 
+#if USE_ADC3_INTR
+  chopstx_intr_done (&adc3_intr);
+#endif
+
   return;
 }
 

example-usb-serial/Makefile

@@ -20,7 +20,7 @@ OBJCOPY   = $(CROSS)objcopy
 
 MCU   = cortex-m3
 CWARN = -Wall -Wextra -Wstrict-prototypes
-DEFS  = -DUSE_SYS3 -DFREE_STANDING
+DEFS  = -DUSE_SYS3 -DFREE_STANDING -DMHZ=72
 OPT   = -O3 -Os -g
 LIBS  =
 

example-usb-serial/usb-cdc.c

@@ -770,6 +770,7 @@ cdc_main (void *arg)
 	   *        
 	   */
 	  e = usb_lld_event_handler (&dev);
+	  chopstx_intr_done (&usb_intr);
 	  ep_num = USB_EVENT_ENDP (e);
 
 	  if (ep_num != 0)

mcu/chx-stm32f103.c

@@ -6,7 +6,12 @@ extern int chx_allow_sleep;
 
 #define STM32_PLLSRC		STM32_PLLSRC_HSE
 #define STM32_PLLMUL		((STM32_PLLMUL_VALUE - 2) << 18)
-
+#ifndef STM32_ADCPRE
+#define STM32_ADCPRE		STM32_ADCPRE_DIV6
+#endif
+#ifndef STM32_USBPRE
+#define STM32_USBPRE		STM32_USBPRE_DIV1P5
+#endif
 
 static void
 configure_clock (int high)
@@ -16,16 +21,16 @@ configure_clock (int high)
 
   if (high)
     {
-      cfg = STM32_MCO_NOCLOCK | STM32_USBPRE_DIV1P5
+      cfg = STM32_MCO_NOCLOCK | STM32_USBPRE
 	| STM32_PLLMUL | STM32_PLLXTPRE	| STM32_PLLSRC
-	| STM32_ADCPRE_DIV6 | STM32_PPRE2_DIV1
+	| STM32_ADCPRE | STM32_PPRE2_DIV1
 	| STM32_PPRE1_DIV2 | STM32_HPRE_DIV1;
 
       cfg_sw = RCC_CFGR_SW_PLL;
     }
   else
     {
-      cfg = STM32_MCO_NOCLOCK | STM32_USBPRE_DIV1P5
+      cfg = STM32_MCO_NOCLOCK | STM32_USBPRE
 	| STM32_PLLMUL | STM32_PLLXTPRE	| STM32_PLLSRC
 	| STM32_ADCPRE_DIV8 | STM32_PPRE2_DIV16
 	| STM32_PPRE1_DIV16 | STM32_HPRE_DIV8;

mcu/clk_gpio_init-stm32.c

@@ -1,7 +1,7 @@
 /*
  * clk_gpio_init-stm32.c - Clock and GPIO initialization for STM32.
  *
- * Copyright (C) 2015  Flying Stone Technology
+ * Copyright (C) 2015, 2018  Flying Stone Technology
  * Author: NIIBE Yutaka <gniibe@fsij.org>
  *
  * This file is a part of Chopstx, a thread library for embedded.
@@ -26,7 +26,11 @@
  *
  */
 
+#if defined(MCU_STM32F0)
 #include <mcu/stm32.h>
+#else
+#include <mcu/stm32f103.h>
+#endif
 
 #if defined(MCU_STM32F0)
 #define STM32_PPRE1		STM32_PPRE1_DIV1
@@ -43,9 +47,13 @@
 #define STM32_SW		STM32_SW_PLL
 #define STM32_HPRE		STM32_HPRE_DIV1
 #define STM32_PPRE2		STM32_PPRE2_DIV1
+#ifndef STM32_ADCPRE
 #define STM32_ADCPRE		STM32_ADCPRE_DIV6
+#endif
 #define STM32_MCOSEL		STM32_MCO_NOCLOCK
-#define STM32_USBPRE            STM32_USBPRE_DIV1P5
+#ifndef STM32_USBPRE
+#define STM32_USBPRE		STM32_USBPRE_DIV1P5
+#endif
 
 #define STM32_PLLMUL		((STM32_PLLMUL_VALUE - 2) << 18)
 #define STM32_PLLCLKOUT		(STM32_PLLCLKIN * STM32_PLLMUL_VALUE)
@@ -53,34 +61,6 @@
 #define STM32_HCLK		(STM32_SYSCLK / 1)
 
 
-#if defined(MCU_STM32F0)
-struct SYSCFG {
-  volatile uint32_t CFGR1;
-  uint32_t dummy0;
-  volatile uint32_t EXTICR[4];
-  volatile uint32_t CFGR2;
-};
-#define SYSCFG_CFGR1_MEM_MODE 0x03
-
-#define SYSCFG_BASE	(APB1PERIPH_BASE + 0x00010000)
-static struct SYSCFG *const SYSCFG = (struct SYSCFG *)SYSCFG_BASE;
-#endif
-
-struct FLASH {
-  volatile uint32_t ACR;
-  volatile uint32_t KEYR;
-  volatile uint32_t OPTKEYR;
-  volatile uint32_t SR;
-  volatile uint32_t CR;
-  volatile uint32_t AR;
-  volatile uint32_t RESERVED;
-  volatile uint32_t OBR;
-  volatile uint32_t WRPR;
-};
-
-#define FLASH_R_BASE	(AHBPERIPH_BASE + 0x2000)
-static struct FLASH *const FLASH = (struct FLASH *)FLASH_R_BASE;
-
 static void __attribute__((used))
 clock_init (void)
 {
@@ -136,75 +116,6 @@ clock_init (void)
 }
 
 
-#if defined(MCU_STM32F0)
-struct GPIO {
-  volatile uint32_t MODER;
-  volatile uint16_t OTYPER;
-  uint16_t dummy0;
-  volatile uint32_t OSPEEDR;
-  volatile uint32_t PUPDR;
-  volatile uint16_t IDR;
-  uint16_t dummy1;
-  volatile uint16_t ODR;
-  uint16_t dummy2;
-  volatile uint16_t BSRR;
-  uint16_t dummy3;
-  volatile uint32_t LCKR;
-  volatile uint32_t AFR[2];
-  volatile uint16_t BRR;
-  uint16_t dummy4;
-};
-
-#define GPIOA_BASE	(AHB2PERIPH_BASE + 0x0000)
-#define GPIOA		((struct GPIO *) GPIOA_BASE)
-#define GPIOB_BASE	(AHB2PERIPH_BASE + 0x0400)
-#define GPIOB		((struct GPIO *) GPIOB_BASE)
-#define GPIOC_BASE	(AHB2PERIPH_BASE + 0x0800)
-#define GPIOC		((struct GPIO *) GPIOC_BASE)
-#define GPIOD_BASE	(AHB2PERIPH_BASE + 0x0C00)
-#define GPIOD		((struct GPIO *) GPIOD_BASE)
-#define GPIOF_BASE	(AHB2PERIPH_BASE + 0x1400)
-#define GPIOF		((struct GPIO *) GPIOF_BASE)
-#else
-struct AFIO
-{
-  volatile uint32_t EVCR;
-  volatile uint32_t MAPR;
-  volatile uint32_t EXTICR[4];
-  uint32_t RESERVED0;
-  volatile uint32_t MAPR2;
-};
-
-#define AFIO_BASE 0x40010000
-static struct AFIO *const AFIO = (struct AFIO *)AFIO_BASE;
-
-#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
-#define AFIO_MAPR_SWJ_CFG_DISABLE         0x04000000
-#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE     0x02000000
-
-
-struct GPIO {
-  volatile uint32_t CRL;
-  volatile uint32_t CRH;
-  volatile uint32_t IDR;
-  volatile uint32_t ODR;
-  volatile uint32_t BSRR;
-  volatile uint32_t BRR;
-  volatile uint32_t LCKR;
-};
-
-#define GPIOA_BASE	(APB2PERIPH_BASE + 0x0800)
-#define GPIOA		((struct GPIO *) GPIOA_BASE)
-#define GPIOB_BASE	(APB2PERIPH_BASE + 0x0C00)
-#define GPIOB		((struct GPIO *) GPIOB_BASE)
-#define GPIOC_BASE	(APB2PERIPH_BASE + 0x1000)
-#define GPIOC		((struct GPIO *) GPIOC_BASE)
-#define GPIOD_BASE	(APB2PERIPH_BASE + 0x1400)
-#define GPIOD		((struct GPIO *) GPIOD_BASE)
-#define GPIOE_BASE	(APB2PERIPH_BASE + 0x1800)
-#define GPIOE		((struct GPIO *) GPIOE_BASE)
-#endif
-
 static struct GPIO *const GPIO_LED = (struct GPIO *)GPIO_LED_BASE;
 #ifdef GPIO_USB_BASE
 static struct GPIO *const GPIO_USB = (struct GPIO *)GPIO_USB_BASE;
@@ -244,7 +155,7 @@ gpio_init (void)
   AFIO->MAPR |= AFIO_MAPR_SOMETHING;
 #endif
 
-  /* LED is mandatory.  If it's on an independent port, we configure it.  */
+  /* LED is mandatory.  We configure it always.  */
   GPIO_LED->ODR = VAL_GPIO_LED_ODR;
   GPIO_LED->CRH = VAL_GPIO_LED_CRH;
   GPIO_LED->CRL = VAL_GPIO_LED_CRL;

mcu/stm32.h

@@ -127,6 +127,7 @@ static struct RCC *const RCC = (struct RCC *)RCC_BASE;
 #define STM32_ADCPRE_DIV8	(3 << 14)
 
 #define STM32_USBPRE_DIV1P5     (0 << 22)
+#define STM32_USBPRE_DIV2       (3 << 22) /* Not for STM32, but GD32F103 */
 
 #define STM32_MCO_NOCLOCK	(0 << 24)
 
@@ -139,3 +140,85 @@ static struct PWR *const PWR = ((struct PWR *)0x40007000);
 #define PWR_CR_LPDS 0x0001	/* Low-power deepsleep  */
 #define PWR_CR_PDDS 0x0002	/* Power down deepsleep */
 #define PWR_CR_CWUF 0x0004	/* Clear wakeup flag    */
+
+
+#if defined(MCU_STM32F0)
+struct GPIO {
+  volatile uint32_t MODER;
+  volatile uint16_t OTYPER;
+  uint16_t dummy0;
+  volatile uint32_t OSPEEDR;
+  volatile uint32_t PUPDR;
+  volatile uint16_t IDR;
+  uint16_t dummy1;
+  volatile uint16_t ODR;
+  uint16_t dummy2;
+  volatile uint16_t BSRR;
+  uint16_t dummy3;
+  volatile uint32_t LCKR;
+  volatile uint32_t AFR[2];
+  volatile uint16_t BRR;
+  uint16_t dummy4;
+};
+
+#define GPIOA_BASE	(AHB2PERIPH_BASE + 0x0000)
+#define GPIOA		((struct GPIO *) GPIOA_BASE)
+#define GPIOB_BASE	(AHB2PERIPH_BASE + 0x0400)
+#define GPIOB		((struct GPIO *) GPIOB_BASE)
+#define GPIOC_BASE	(AHB2PERIPH_BASE + 0x0800)
+#define GPIOC		((struct GPIO *) GPIOC_BASE)
+#define GPIOD_BASE	(AHB2PERIPH_BASE + 0x0C00)
+#define GPIOD		((struct GPIO *) GPIOD_BASE)
+#define GPIOF_BASE	(AHB2PERIPH_BASE + 0x1400)
+#define GPIOF		((struct GPIO *) GPIOF_BASE)
+#else
+struct GPIO {
+  volatile uint32_t CRL;
+  volatile uint32_t CRH;
+  volatile uint32_t IDR;
+  volatile uint32_t ODR;
+  volatile uint32_t BSRR;
+  volatile uint32_t BRR;
+  volatile uint32_t LCKR;
+};
+
+#define GPIOA_BASE	(APB2PERIPH_BASE + 0x0800)
+#define GPIOA		((struct GPIO *) GPIOA_BASE)
+#define GPIOB_BASE	(APB2PERIPH_BASE + 0x0C00)
+#define GPIOB		((struct GPIO *) GPIOB_BASE)
+#define GPIOC_BASE	(APB2PERIPH_BASE + 0x1000)
+#define GPIOC		((struct GPIO *) GPIOC_BASE)
+#define GPIOD_BASE	(APB2PERIPH_BASE + 0x1400)
+#define GPIOD		((struct GPIO *) GPIOD_BASE)
+#define GPIOE_BASE	(APB2PERIPH_BASE + 0x1800)
+#define GPIOE		((struct GPIO *) GPIOE_BASE)
+#endif
+
+
+#if defined(MCU_STM32F0)
+struct SYSCFG {
+  volatile uint32_t CFGR1;
+  uint32_t dummy0;
+  volatile uint32_t EXTICR[4];
+  volatile uint32_t CFGR2;
+};
+#define SYSCFG_CFGR1_MEM_MODE 0x03
+
+#define SYSCFG_BASE	(APB1PERIPH_BASE + 0x00010000)
+static struct SYSCFG *const SYSCFG = (struct SYSCFG *)SYSCFG_BASE;
+#endif
+
+struct FLASH {
+  volatile uint32_t ACR;
+  volatile uint32_t KEYR;
+  volatile uint32_t OPTKEYR;
+  volatile uint32_t SR;
+  volatile uint32_t CR;
+  volatile uint32_t AR;
+  volatile uint32_t RESERVED;
+  volatile uint32_t OBR;
+  volatile uint32_t WRPR;
+};
+
+#define FLASH_R_BASE	(AHBPERIPH_BASE + 0x2000)
+static struct FLASH *const FLASH = (struct FLASH *)FLASH_R_BASE;

mcu/stm32f103.h

@@ -574,6 +574,8 @@ static struct EXTI *const EXTI = (struct EXTI *)EXTI_BASE;
 #define EXTI0_IRQ    6
 #define EXTI1_IRQ    7
 #define EXTI2_IRQ    8
+#define EXTI3_IRQ    9
+#define EXTI4_IRQ   10
 #define EXTI9_5_IRQ 23
 #define TIM2_IRQ    28
 #define TIM3_IRQ    29
@@ -633,6 +635,7 @@ static struct AFIO *const AFIO = (struct AFIO *)AFIO_BASE;
 
 #define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
 #define AFIO_MAPR_SWJ_CFG_DISABLE         0x04000000
+#define AFIO_MAPR_SWJ_CFG_JTAGDISABLE     0x02000000
 
 
 struct DBGMCU {

mcu/sys-stm32f103.c

@@ -1,7 +1,7 @@
 /*
  * sys-stm32f103.c - system routines for the initial page for STM32F103.
  *
- * Copyright (C) 2013, 2014, 2015, 2016, 2017
+ * Copyright (C) 2013, 2014, 2015, 2016, 2017, 2018
  *               Flying Stone Technology
  * Author: NIIBE Yutaka <gniibe@fsij.org>
  *
@@ -18,7 +18,6 @@
 #include <stdlib.h>
 #include "board.h"
 
-#include "mcu/cortex-m.h"
 #include "mcu/clk_gpio_init-stm32.c"
 
 
@@ -82,7 +81,7 @@ usb_lld_sys_init (void)
     {
       usb_lld_sys_shutdown ();
       /* Disconnect requires SE0 (>= 2.5uS).  */
-      wait (300);
+      wait (5*MHZ);
     }
 
   usb_cable_config (1);
@@ -256,6 +255,9 @@ flash_protect (void)
       FLASH->OPTKEYR = FLASH_KEY1;
       FLASH->OPTKEYR = FLASH_KEY2;
 
+      while (!(FLASH->CR & FLASH_CR_OPTWRE))
+	;
+
       FLASH->CR |= FLASH_CR_OPTER;
       FLASH->CR |= FLASH_CR_STRT;
 

mcu/sys-stm32f103.h

@@ -2,6 +2,7 @@
 #define BOARD_ID_FST_01_00         0x613870a9
 #define BOARD_ID_FST_01            0x696886af
 #define BOARD_ID_FST_01G           0x8801277f
+#define BOARD_ID_FST_01SZ          0x7e6fb084
 #define BOARD_ID_MAPLE_MINI        0x7a445272
 #define BOARD_ID_OLIMEX_STM32_H103 0xf92bb594
 #define BOARD_ID_STBEE_MINI        0x1f341961

mcu/usb-mkl27z.c

@@ -950,11 +950,11 @@ usb_lld_ctrl_send (struct usb_dev *dev, const void *buf, size_t buflen)
   data_p->len = buflen;
 
   /* Restrict the data length to be the one host asks for */
-  if (data_p->len > len_asked)
+  if (data_p->len >= len_asked)
     data_p->len = len_asked;
-
+  /* ZLP is only required when host doesn't expect the end of packets.  */
-  data_p->require_zlp = (data_p->len != 0
+  else if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
-			 && (data_p->len % USB_MAX_PACKET_SIZE) == 0);
+    data_p->require_zlp = 1;
 
   if (data_p->len < USB_MAX_PACKET_SIZE)
     {

mcu/usb-stm32f103.c

@@ -339,6 +339,9 @@ void usb_lld_init (struct usb_dev *dev, uint8_t feature)
 
   /* Clear Interrupt Status Register, and enable interrupt for USB */
   st103_set_istr (0);
+
+  st103_set_btable ();
+
   st103_set_cntr (CNTR_CTRM | CNTR_OVRM | CNTR_ERRM
 		  | CNTR_WKUPM | CNTR_SUSPM | CNTR_RESETM);
 
@@ -906,7 +909,6 @@ void usb_lld_reset (struct usb_dev *dev, uint8_t feature)
 {
   usb_lld_set_configuration (dev, 0);
   dev->feature = feature;
-  st103_set_btable ();
   st103_set_daddr (0);
 }
 
@@ -1103,10 +1105,10 @@ usb_lld_ctrl_send (struct usb_dev *dev, const void *buf, size_t buflen)
   data_p->len = buflen;
 
   /* Restrict the data length to be the one host asks for */
-  if (data_p->len > len_asked)
+  if (data_p->len >= len_asked)
     data_p->len = len_asked;
-
+  /* ZLP is only required when host doesn't expect the end of packets.  */
-  if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
+  else if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
     data_p->require_zlp = 1;
 
   if (data_p->len < USB_MAX_PACKET_SIZE)

mcu/usb-usbip.c

@@ -2169,10 +2169,10 @@ usb_lld_ctrl_send (struct usb_dev *dev, const void *buf, size_t buflen)
   data_p->len = buflen;
 
   /* Restrict the data length to be the one host asks for */
-  if (data_p->len > len_asked)
+  if (data_p->len >= len_asked)
     data_p->len = len_asked;
-
+  /* ZLP is only required when host doesn't expect the end of packets.  */
-  if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
+  else if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0)
     data_p->require_zlp = 1;
 
   if (data_p->len < USB_MAX_PACKET_SIZE)

rules.mk

@@ -28,6 +28,9 @@ endif
 ifneq ($(USE_USART),)
 CSRC += $(CHOPSTX)/contrib/usart-$(CHIP).c
 endif
+ifneq ($(USE_ACKBTN),)
+CSRC += $(CHOPSTX)/contrib/ackbtn-$(CHIP).c
+endif
 
 INCDIR += $(CHOPSTX)