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3 Commits

Author SHA1 Message Date
NIIBE Yutaka
fffb8aa3b3 Version 1.11. 2018-10-02 09:58:45 +09:00
NIIBE Yutaka
0ed2e95ea2 Fix ackbtn clearing the edge detector. 2018-10-01 12:56:41 +09:00
NIIBE Yutaka
02aa678d4c Fix interrupt handling. 2018-10-01 10:10:09 +09:00
7 changed files with 91 additions and 30 deletions

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@@ -1,3 +1,23 @@
2018-10-02 NIIBE Yutaka <gniibe@fsij.org>
* VERSION: 1.11.
* doc/chopstx.texi (VERSION): 1.11.
2018-10-01 NIIBE Yutaka <gniibe@fsij.org>
* contrib/ackbtn-stm32f103.c (PINCFG_EDGE): New.
(ackbtn_init): Use PINCFG_EDGE bit.
(ackbtn_enable): Configure the edge detector here.
(ackbtn_disable): Disable the edge detector.
* chopstx.c (chopstx_poll): Don't clear ->ready here.
(chx_cond_hook): Set ->ready = 0 when condition does
not meet.
(chopstx_claim_irq): Make sure clearing the interrupt.
(chx_intr_hook): Add the case when ->ready == 1.
(chopstx_intr_done): Set ->ready = 0.
(chx_join_hook): Set ->ready = 0 when it is still alive.
2018-09-29 NIIBE Yutaka <gniibe@fsij.org>
* VERSION: 1.10.

31
NEWS
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@@ -1,11 +1,30 @@
NEWS - Noteworthy changes
* Major changes in Chopstx 1.11
Released 2018-10-02
** Support calling chopstx_poll with intr->ready==1
In version <= 1.10, it assumed that all events should be handled after
chopstx_poll, before calling chopstx_poll again. With having
chopstx_intr_done, it's OK now that chopstx_poll can be called again
not examining/handling all poll descriptors, but only parts of them.
** Acknowledge button change
In 1.10, the action was able to be "memorized" by the edge detector.
Now, the edge detector is disabled by ackbtn_disable, and it is
enabled by ackbtn_enable. So, the status is cleared correctly.
** New board support: FST-01SZ
It's still under development. Programming-wise, it will keep same.
* Major changes in Chopstx 1.10
Released 2018-09-29
** Function chopstx_intr_wait is not deprecated, now.
** Function chopstx_intr_wait is not deprecated, now
Once, it was said that it's deprecated, but it's active again
to match the new function of chopstx_intr_done.
@@ -59,7 +78,7 @@ Timer expiration had a bug. When it is waken up, the wake up doesn't
handle as a timer expiration when there are multiple threads on same
timing of expire. It confuses as if it were forced wakeup.
** New driver: USART for STM32.
** New driver: USART for STM32
USART driver for STM32 is added.
@@ -394,11 +413,11 @@ Vectored Interrupt Controller (NVIC), in the ARM v7-M Architecture
Reference Manual. The subsection, B3.4.1, Theory of operation,
explains how it works.
** gpio_init change
Now, gpi_init support AFIO mapping and another GPIO (GPIO_OTHER)
settings.
Local Variables:
mode: outline
End:
# Local Variables:
# mode: outline
# End:

4
README
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@@ -1,6 +1,6 @@
Chopstx - Threads and only Threads
Version 1.10
2018-09-29
Version 1.11
2018-10-02
Niibe Yutaka
Flying Stone Technology

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@@ -1 +1 @@
release/1.10
release/1.11

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@@ -969,6 +969,7 @@ chx_cond_hook (struct chx_px *px, struct chx_poll_head *pd)
{ /* Condition doesn't met.
* Register the proxy to wait for the condition.
*/
pc->ready = 0;
chx_cpu_sched_lock ();
chx_spin_lock (&pc->cond->lock);
ll_prio_enqueue ((struct chx_pq *)px, &pc->cond->q);
@@ -998,6 +999,7 @@ chopstx_claim_irq (chopstx_intr_t *intr, uint8_t irq_num)
chx_cpu_sched_lock ();
chx_spin_lock (&q_intr.lock);
chx_disable_intr (irq_num);
chx_clr_intr (irq_num);
chx_set_intr_prio (irq_num);
chx_spin_unlock (&q_intr.lock);
chx_cpu_sched_unlock ();
@@ -1012,10 +1014,19 @@ chx_intr_hook (struct chx_px *px, struct chx_poll_head *pd)
chopstx_testcancel ();
chx_cpu_sched_lock ();
px->v = intr->irq_num;
chx_spin_lock (&q_intr.lock);
ll_prio_enqueue ((struct chx_pq *)px, &q_intr.q);
chx_enable_intr (intr->irq_num);
chx_spin_unlock (&q_intr.lock);
if (intr->ready)
{
chx_spin_lock (&px->lock);
(*px->counter_p)++;
chx_spin_unlock (&px->lock);
}
else
{
chx_spin_lock (&q_intr.lock);
ll_prio_enqueue ((struct chx_pq *)px, &q_intr.q);
chx_enable_intr (intr->irq_num);
chx_spin_unlock (&q_intr.lock);
}
chx_cpu_sched_unlock ();
}
@@ -1047,7 +1058,10 @@ chopstx_intr_done (chopstx_intr_t *intr)
chx_dmb ();
if (intr->ready)
chx_clr_intr (intr->irq_num);
{
chx_clr_intr (intr->irq_num);
intr->ready = 0;
}
}
@@ -1215,6 +1229,7 @@ chx_join_hook (struct chx_px *px, struct chx_poll_head *pd)
{ /* Not yet exited.
* Register the proxy to wait for TP's exit.
*/
pj->ready = 0;
px->v = (uintptr_t)tp;
chx_spin_lock (&q_join.lock);
ll_prio_enqueue ((struct chx_pq *)px, &q_join.q);
@@ -1358,7 +1373,6 @@ chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *const pd_array[])
for (i = 0; i < n; i++)
{
pd = pd_array[i];
pd->ready = 0;
px[i].ready_p = &pd->ready;
if (pd->type == CHOPSTX_POLL_COND)
chx_cond_hook (&px[i], pd);

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@@ -35,6 +35,8 @@
#include "sys.h"
static uint32_t pin_config;
#define PINCFG_EDGE 0x80000000
#define PINCFG_EDGE_RISING PINCFG_EDGE
void
ackbtn_init (chopstx_intr_t *intr)
@@ -42,7 +44,6 @@ ackbtn_init (chopstx_intr_t *intr)
uint8_t irq_num;
uint32_t afio_exticr_index;
uint32_t afio_exticr_extiX_pY;
int rising_edge;
switch (SYS_BOARD_ID)
{
@@ -53,36 +54,43 @@ ackbtn_init (chopstx_intr_t *intr)
afio_exticr_extiX_pY = AFIO_EXTICR1_EXTI3_PA;
irq_num = EXTI3_IRQ;
pin_config = 0x0008; /* EXTI_PR_PR3 == EXTI_IMR_MR3 == EXTI_RTSR_TR3 */
rising_edge = 1;
pin_config |= PINCFG_EDGE_RISING;
break;
}
chopstx_claim_irq (intr, irq_num);
/* Configure EXTI line */
if (afio_exticr_extiX_pY)
AFIO->EXTICR[afio_exticr_index] |= afio_exticr_extiX_pY;
/* Interrupt is masked, now */
EXTI->IMR &= ~pin_config;
EXTI->IMR &= ~(pin_config & ~PINCFG_EDGE);
/* Configure which edge is detected */
if (rising_edge)
EXTI->RTSR |= pin_config;
else
EXTI->FTSR |= pin_config;
chopstx_claim_irq (intr, irq_num);
}
void
ackbtn_enable (void)
{
EXTI->PR |= pin_config; /* Clear pending interrupt */
EXTI->IMR |= pin_config; /* Enable interrupt clearing the mask */
/* Clear pending interrupt */
EXTI->PR |= (pin_config & ~PINCFG_EDGE);
/* Enable interrupt, clearing the mask */
EXTI->IMR |= (pin_config & ~PINCFG_EDGE);
/* Configure which edge is detected */
if ((pin_config & PINCFG_EDGE))
EXTI->RTSR |= (pin_config & ~PINCFG_EDGE);
else
EXTI->FTSR |= (pin_config & ~PINCFG_EDGE);
}
void
ackbtn_disable (void)
{
EXTI->IMR &= ~pin_config; /* Disable interrupt having the mask */
EXTI->PR |= pin_config; /* Clear pending interrupt */
/* Disable interrupt having the mask */
EXTI->IMR &= ~(pin_config & ~PINCFG_EDGE);
/* Clear pending interrupt */
/* Disable edge detection */
EXTI->RTSR &= ~(pin_config & ~PINCFG_EDGE);
EXTI->FTSR &= ~(pin_config & ~PINCFG_EDGE);
}

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@@ -1,7 +1,7 @@
\input texinfo @c -*-texinfo-*-
@c %**start of header
@setfilename chopstx.info
@set VERSION 1.10
@set VERSION 1.11
@settitle Chopstx Reference Manual
@c Unify some of the indices.
@syncodeindex tp fn