sys.h changes
This commit is contained in:
@@ -1,6 +1,8 @@
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2013-06-06 Niibe Yutaka <gniibe@fsij.org>
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* chopstx.c (PREEMPTION_USEC): Fix.
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* entry.c: Include sys.h for clock_init and gpio_init.
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* chopstx.c (PREEMPTION_USEC): Fix the value.
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2013-06-05 Niibe Yutaka <gniibe@fsij.org>
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@@ -1,3 +1,5 @@
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#define FLASH_PAGE_SIZE 1024
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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@@ -1,3 +1,5 @@
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#define FLASH_PAGE_SIZE 1024
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 6
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#define STM32_HSECLK 12000000
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@@ -1,3 +1,5 @@
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#define FLASH_PAGE_SIZE 1024
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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@@ -1,3 +1,5 @@
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#define FLASH_PAGE_SIZE 1024
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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@@ -41,6 +41,11 @@
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#define CHX_FLAGS_MAIN 0
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#endif
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/* Constant for round robin scheduling. */
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#if !defined(PREEMPTION_USEC)
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#define PREEMPTION_USEC 1000 /* 1ms */
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#endif
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#define MAX_PRIO 255
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/*
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@@ -88,9 +93,6 @@ chx_fatal (uint32_t err_code)
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/* RUNNING: the current thread. */
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struct chx_thread *running;
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/* For round robin scheduling. */
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#define PREEMPTION_USEC 1000 /* 1ms */
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/* Double linked list operations. */
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struct chx_dll {
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struct chx_thread *next, *prev;
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23
entry.c
23
entry.c
@@ -29,20 +29,9 @@
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#include <stdint.h>
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#include <stdlib.h>
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#if 0
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#ifdef HAVE_SYS_H
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#define INLINE __attribute__ ((used))
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#include "sys.h"
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static void __attribute__ ((used))
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clock_init (void)
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{
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(*vector[16]) ();
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}
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static void __attribute__ ((used))
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gpio_init (void)
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{
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(*vector[17]) ();
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}
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#else
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#include "board.h"
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@@ -101,7 +90,7 @@ struct RCC {
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};
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#define RCC_BASE (AHBPERIPH_BASE + 0x1000)
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#define RCC ((struct RCC *)RCC_BASE)
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static struct RCC *const RCC = ((struct RCC *const)RCC_BASE);
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#define RCC_APB1ENR_USBEN 0x00800000
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#define RCC_APB1RSTR_USBRST 0x00800000
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@@ -132,7 +121,7 @@ struct FLASH {
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};
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#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
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#define FLASH ((struct FLASH *) FLASH_R_BASE)
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static struct FLASH *const FLASH = ((struct FLASH *const) FLASH_R_BASE);
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static void __attribute__((used))
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clock_init (void)
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@@ -204,8 +193,8 @@ struct GPIO {
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#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
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#define GPIOE ((struct GPIO *) GPIOE_BASE)
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#define GPIO_USB ((struct GPIO *) GPIO_USB_BASE)
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#define GPIO_LED ((struct GPIO *) GPIO_LED_BASE)
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static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
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static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
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static void __attribute__((used))
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gpio_init (void)
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@@ -14,7 +14,7 @@ OBJCOPY = $(CROSS)objcopy
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MCU = cortex-m3
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CWARN = -Wall -Wextra -Wstrict-prototypes
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DEFS = -DFREE_STANDING
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DEFS = -DHAVE_SYS_H -DFREE_STANDING
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OPT = -O3 -Os -g
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LIBS =
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@@ -21,10 +21,7 @@
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#define CORTEX_PRIORITY_BITS 4
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#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
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#define USB_LP_CAN1_RX0_IRQn 20
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#define STM32_USB_IRQ_PRIORITY 11
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#define FLASH_PAGE_SIZE 1024
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#define STM32_USB_IRQ_PRIORITY 11
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#define STM32_SW_PLL (2 << 0)
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@@ -336,9 +333,7 @@ flash_unlock (void)
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#define intr_disable() asm volatile ("cpsid i" : : : "memory")
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#define intr_enable() asm volatile ("msr BASEPRI, %0\n\t" \
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"cpsie i" : : "r" (0) : "memory")
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#define intr_enable() asm volatile ("cpsie i" : : : "memory")
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#define FLASH_SR_BSY 0x01
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#define FLASH_SR_PGERR 0x04
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@@ -93,3 +93,23 @@ nvic_system_reset (void)
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{
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(*vector[12]) ();
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}
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/*
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* Users can override INLINE by 'attribute((used))' to have an
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* implementation defined.
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*/
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#if !defined(INLINE)
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#define INLINE __inline__
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#endif
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static INLINE void
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clock_init (void)
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{
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(*vector[13]) ();
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}
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static INLINE void
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gpio_init (void)
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{
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(*vector[14]) ();
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}
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@@ -14,8 +14,8 @@ OBJCOPY = $(CROSS)objcopy
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MCU = cortex-m3
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CWARN = -Wall -Wextra -Wstrict-prototypes
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DEFS = -DFREE_STANDING
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# DEFS = -DFREE_STANDING -DBUSY_LOOP -DCHX_FLAGS_MAIN=CHOPSTX_SCHED_RR
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DEFS = -DHAVE_SYS_H -DFREE_STANDING
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# DEFS = -DFREE_STANDING -DHAVE_SYS_H -DBUSY_LOOP -DCHX_FLAGS_MAIN=CHOPSTX_SCHED_RR
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OPT = -O3 -Os -g
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LIBS =
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@@ -21,10 +21,7 @@
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#define CORTEX_PRIORITY_BITS 4
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#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
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#define USB_LP_CAN1_RX0_IRQn 20
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#define STM32_USB_IRQ_PRIORITY 11
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#define FLASH_PAGE_SIZE 1024
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#define STM32_USB_IRQ_PRIORITY 11
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#define STM32_SW_PLL (2 << 0)
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@@ -78,19 +75,19 @@ struct NVIC {
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uint32_t IPR[60];
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};
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#define NVICBase ((struct NVIC *)0xE000E100)
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#define NVIC_ISER(n) (NVICBase->ISER[n])
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#define NVIC_ICPR(n) (NVICBase->ICPR[n])
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#define NVIC_IPR(n) (NVICBase->IPR[n])
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static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
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#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
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#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
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#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
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static void
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nvic_enable_vector (uint32_t n, uint32_t prio)
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{
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unsigned int sh = (n & 3) << 3;
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NVIC_IPR (n >> 2) = (NVIC_IPR(n >> 2) & ~(0xFF << sh)) | (prio << sh);
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NVIC_ICPR (n >> 5) = 1 << (n & 0x1F);
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NVIC_ISER (n >> 5) = 1 << (n & 0x1F);
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NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
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NVIC_ICPR (n) = 1 << (n & 0x1F);
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NVIC_ISER (n) = 1 << (n & 0x1F);
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}
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@@ -112,7 +109,7 @@ struct RCC {
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};
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#define RCC_BASE (AHBPERIPH_BASE + 0x1000)
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#define RCC ((struct RCC *)RCC_BASE)
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static struct RCC *const RCC = ((struct RCC *const)RCC_BASE);
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#define RCC_APB1ENR_USBEN 0x00800000
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#define RCC_APB1RSTR_USBRST 0x00800000
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@@ -143,7 +140,7 @@ struct FLASH {
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};
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#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
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#define FLASH ((struct FLASH *) FLASH_R_BASE)
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static struct FLASH *const FLASH = ((struct FLASH *const) FLASH_R_BASE);
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static void
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clock_init (void)
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@@ -215,8 +212,8 @@ struct GPIO {
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#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
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#define GPIOE ((struct GPIO *) GPIOE_BASE)
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#define GPIO_USB ((struct GPIO *) GPIO_USB_BASE)
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#define GPIO_LED ((struct GPIO *) GPIO_LED_BASE)
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static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
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static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
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static void
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gpio_init (void)
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@@ -336,9 +333,7 @@ flash_unlock (void)
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#define intr_disable() asm volatile ("cpsid i" : : : "memory")
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#define intr_enable() asm volatile ("msr BASEPRI, %0\n\t" \
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"cpsie i" : : "r" (0) : "memory")
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#define intr_enable() asm volatile ("cpsie i" : : : "memory")
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#define FLASH_SR_BSY 0x01
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#define FLASH_SR_PGERR 0x04
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@@ -537,7 +532,7 @@ struct SCB
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#define SCS_BASE (0xE000E000)
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#define SCB_BASE (SCS_BASE + 0x0D00)
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#define SCB ((struct SCB *) SCB_BASE)
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static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
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#define SYSRESETREQ 0x04
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static void
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@@ -93,3 +93,23 @@ nvic_system_reset (void)
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{
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(*vector[12]) ();
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}
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/*
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* Users can override INLINE by 'attribute((used))' to have an
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* implementation defined.
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*/
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#if !defined(INLINE)
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#define INLINE __inline__
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#endif
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static INLINE void
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clock_init (void)
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{
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(*vector[13]) ();
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}
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static INLINE void
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gpio_init (void)
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{
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(*vector[14]) ();
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}
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