sys.h changes
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@@ -21,10 +21,7 @@
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#define CORTEX_PRIORITY_BITS 4
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#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
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#define USB_LP_CAN1_RX0_IRQn 20
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#define STM32_USB_IRQ_PRIORITY 11
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#define FLASH_PAGE_SIZE 1024
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#define STM32_USB_IRQ_PRIORITY 11
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#define STM32_SW_PLL (2 << 0)
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@@ -78,19 +75,19 @@ struct NVIC {
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uint32_t IPR[60];
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};
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#define NVICBase ((struct NVIC *)0xE000E100)
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#define NVIC_ISER(n) (NVICBase->ISER[n])
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#define NVIC_ICPR(n) (NVICBase->ICPR[n])
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#define NVIC_IPR(n) (NVICBase->IPR[n])
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static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
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#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
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#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
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#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
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static void
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nvic_enable_vector (uint32_t n, uint32_t prio)
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{
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unsigned int sh = (n & 3) << 3;
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NVIC_IPR (n >> 2) = (NVIC_IPR(n >> 2) & ~(0xFF << sh)) | (prio << sh);
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NVIC_ICPR (n >> 5) = 1 << (n & 0x1F);
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NVIC_ISER (n >> 5) = 1 << (n & 0x1F);
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NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
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NVIC_ICPR (n) = 1 << (n & 0x1F);
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NVIC_ISER (n) = 1 << (n & 0x1F);
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}
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@@ -112,7 +109,7 @@ struct RCC {
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};
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#define RCC_BASE (AHBPERIPH_BASE + 0x1000)
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#define RCC ((struct RCC *)RCC_BASE)
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static struct RCC *const RCC = ((struct RCC *const)RCC_BASE);
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#define RCC_APB1ENR_USBEN 0x00800000
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#define RCC_APB1RSTR_USBRST 0x00800000
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@@ -143,7 +140,7 @@ struct FLASH {
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};
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#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
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#define FLASH ((struct FLASH *) FLASH_R_BASE)
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static struct FLASH *const FLASH = ((struct FLASH *const) FLASH_R_BASE);
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static void
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clock_init (void)
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@@ -215,8 +212,8 @@ struct GPIO {
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#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800)
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#define GPIOE ((struct GPIO *) GPIOE_BASE)
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#define GPIO_USB ((struct GPIO *) GPIO_USB_BASE)
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#define GPIO_LED ((struct GPIO *) GPIO_LED_BASE)
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static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
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static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
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static void
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gpio_init (void)
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@@ -336,9 +333,7 @@ flash_unlock (void)
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#define intr_disable() asm volatile ("cpsid i" : : : "memory")
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#define intr_enable() asm volatile ("msr BASEPRI, %0\n\t" \
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"cpsie i" : : "r" (0) : "memory")
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#define intr_enable() asm volatile ("cpsie i" : : : "memory")
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#define FLASH_SR_BSY 0x01
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#define FLASH_SR_PGERR 0x04
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@@ -537,7 +532,7 @@ struct SCB
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#define SCS_BASE (0xE000E000)
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#define SCB_BASE (SCS_BASE + 0x0D00)
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#define SCB ((struct SCB *) SCB_BASE)
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static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
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#define SYSRESETREQ 0x04
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static void
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