Factor out RCC definition into stm32.h (common for STM32F0/STM32F1).
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@@ -1,47 +1,3 @@
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#define PERIPH_BASE 0x40000000
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#define APB1PERIPH_BASE PERIPH_BASE
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#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000)
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#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000)
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struct RCC {
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volatile uint32_t CR;
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volatile uint32_t CFGR;
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volatile uint32_t CIR;
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volatile uint32_t APB2RSTR;
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volatile uint32_t APB1RSTR;
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volatile uint32_t AHBENR;
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volatile uint32_t APB2ENR;
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volatile uint32_t APB1ENR;
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volatile uint32_t BDCR;
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volatile uint32_t CSR;
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};
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#define RCC_BASE (AHBPERIPH_BASE + 0x1000)
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static struct RCC *const RCC = (struct RCC *)RCC_BASE;
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#define RCC_AHBENR_DMA1EN 0x00000001
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#define RCC_AHBENR_CRCEN 0x00000040
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#define RCC_APB2ENR_ADC1EN 0x00000200
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#define RCC_APB2ENR_ADC2EN 0x00000400
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#define RCC_APB2ENR_TIM1EN 0x00000800
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#define RCC_APB1ENR_TIM2EN 0x00000001
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#define RCC_APB1ENR_TIM3EN 0x00000002
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#define RCC_APB1ENR_TIM4EN 0x00000004
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#define RCC_APB2RSTR_ADC1RST 0x00000200
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#define RCC_APB2RSTR_ADC2RST 0x00000400
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#define RCC_APB2RSTR_TIM1RST 0x00000800
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#define RCC_APB1RSTR_TIM2RST 0x00000001
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#define RCC_APB1RSTR_TIM3RST 0x00000002
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#define RCC_APB1RSTR_TIM4RST 0x00000004
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#define RCC_CFGR_SW_HCI (0 << 0)
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#define RCC_CFGR_SW_PLL (2 << 0)
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#define RCC_CFGR_SW_MASK (3 << 0)
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#define RCC_CFGR_SWS 0x0000000C
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#define CRC_CR_RESET 0x00000001
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struct CRC {
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