Move clk_gpio_init to mcu/
This commit is contained in:
@@ -1,5 +1,12 @@
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2016-05-26 NIIBE Yutaka <gniibe@fsij.org>
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* entry.c: Follow the move of clk_gpio_init*.c
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* example-cdc/sys.c: Likewise.
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* example-led/sys.c: Likewise. Update to 3.0.
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* example-primer2/sys.c: Update.
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* mcu/clk_gpio_init-stm32.c: Moved.
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* mcu/clk_gpio_init-kl.c: Moved.
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* mcu/kl_sim.h: New (was in example-fs-bb48).
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* example-fs-bb48/adc_kl27z.c: Use DMA0 and DMA1.
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4
entry.c
4
entry.c
@@ -39,9 +39,9 @@
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#else
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#include "board.h"
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#if defined (MCU_KINETIS_L)
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#include "clk_gpio_init-kl.c"
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#include "mcu/clk_gpio_init-kl.c"
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#else
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#include "clk_gpio_init-stm32.c"
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#include "mcu/clk_gpio_init-stm32.c"
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#endif
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#endif
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@@ -17,7 +17,7 @@
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#include <stdlib.h>
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#include "board.h"
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#include "clk_gpio_init-stm32.c"
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#include "mcu/clk_gpio_init-stm32.c"
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static void
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@@ -1,7 +1,7 @@
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/*
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* sys.c - system routines for the initial page for STM32F030 / STM32F103.
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*
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* Copyright (C) 2013, 2014, 2015 Flying Stone Technology
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* Copyright (C) 2013, 2014, 2015, 2016 Flying Stone Technology
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* Author: NIIBE Yutaka <gniibe@fsij.org>
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*
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* Copying and distribution of this file, with or without modification,
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@@ -17,41 +17,8 @@
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#include <stdlib.h>
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#include "board.h"
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#include "clk_gpio_init-stm32.c"
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#include "mcu/clk_gpio_init-stm32.c"
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#define CORTEX_PRIORITY_BITS 4
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#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
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#define USB_LP_CAN1_RX0_IRQn 20
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#define STM32_USB_IRQ_PRIORITY 11
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struct NVIC {
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volatile uint32_t ISER[8];
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volatile uint32_t unused1[24];
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volatile uint32_t ICER[8];
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volatile uint32_t unused2[24];
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volatile uint32_t ISPR[8];
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volatile uint32_t unused3[24];
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volatile uint32_t ICPR[8];
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volatile uint32_t unused4[24];
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volatile uint32_t IABR[8];
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volatile uint32_t unused5[56];
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volatile uint32_t IPR[60];
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};
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static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
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#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
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#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
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#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
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static void
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nvic_enable_vector (uint32_t n, uint32_t prio)
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{
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unsigned int sh = (n & 3) << 3;
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NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
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NVIC_ICPR (n) = 1 << (n & 0x1F);
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NVIC_ISER (n) = 1 << (n & 0x1F);
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}
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static void
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usb_cable_config (int enable)
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@@ -118,13 +85,6 @@ usb_lld_sys_init (void)
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usb_cable_config (1);
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RCC->APB1ENR |= RCC_APB1ENR_USBEN;
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nvic_enable_vector (USB_LP_CAN1_RX0_IRQn,
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CORTEX_PRIORITY_MASK (STM32_USB_IRQ_PRIORITY));
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/*
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* Note that we also have other IRQ(s):
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* USB_HP_CAN1_TX_IRQn (for double-buffered or isochronous)
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* USBWakeUp_IRQn (suspend/resume)
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*/
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RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
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RCC->APB1RSTR = 0;
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}
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@@ -450,8 +410,8 @@ handler vector[] __attribute__ ((section(".vectors"))) = {
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const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
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3*2+2, /* bLength */
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0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */
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/* sys version: "2.1" */
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'2', 0, '.', 0, '1', 0,
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/* sys version: "3.0" */
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'3', 0, '.', 0, '0', 0,
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};
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const uint32_t __attribute__((section(".sys.board_id")))
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@@ -1,7 +1,7 @@
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/*
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* sys.c - system routines for the initial page for STM32F103.
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*
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* Copyright (C) 2013, 2014, 2015 Flying Stone Technology
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* Copyright (C) 2013, 2014, 2015, 2016 Flying Stone Technology
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* Author: NIIBE Yutaka <gniibe@fsij.org>
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*
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* Copying and distribution of this file, with or without modification,
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@@ -17,87 +17,8 @@
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#include <stdlib.h>
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#include "board.h"
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/* Adds port C for shutdown function. */
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#undef RCC_ENR_IOP_EN
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#undef RCC_RSTR_IOP_RST
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#define RCC_ENR_IOP_EN \
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(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_IOPEEN \
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| RCC_APB2ENR_IOPCEN | RCC_APB2ENR_IOPBEN)
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#define RCC_RSTR_IOP_RST \
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(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPDRST | RCC_APB2RSTR_IOPERST \
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| RCC_APB2RSTR_IOPCRST | RCC_APB2RSTR_IOPBRST)
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#include "mcu/clk_gpio_init-stm32.c"
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#include "clk_gpio_init-stm32.c"
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static struct GPIO *const GPIO_OTHER1 = ((struct GPIO *const) GPIOC_BASE);
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static struct GPIO *const GPIO_OTHER2 = ((struct GPIO *const) GPIOB_BASE);
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static void __attribute__((used))
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gpio_init_primer2 (void)
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{
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gpio_init ();
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/*
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* Port C setup.
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* Everything input with pull-up except:
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* PC0 - Analog input (Touch panel L X+)
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* PC1 - Analog input (Touch panel R X-)
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* PC2 - Analog input (Touch panel U Y+)
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* PC3 - Analog input (Touch panel D Y-)
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* PC6 - Normal input because there is an external resistor.
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* PC7 - Normal input because there is an external resistor.
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* PC13 - Push Pull output (SHUTDOWN)
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*/
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GPIO_OTHER1->ODR = 0xffffdfff;
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GPIO_OTHER1->CRL = 0x44880000;
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GPIO_OTHER1->CRH = 0x88388888;
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/*
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* Port B setup.
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* Everything input with pull-up except:
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* PB8 - Backlight enable output.
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* PB13 - Alternate output (AUDIO SPI2 SCK).
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* PB14 - Normal input (AUDIO SPI2 MISO).
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* PB15 - Alternate output (AUDIO SPI2 MOSI).
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*/
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GPIO_OTHER2->ODR = 0xffffffff;
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GPIO_OTHER2->CRL = 0x88888888;
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GPIO_OTHER2->CRH = 0xb4b88883;
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}
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#define CORTEX_PRIORITY_BITS 4
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#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
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#define USB_LP_CAN1_RX0_IRQn 20
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#define STM32_USB_IRQ_PRIORITY 11
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struct NVIC {
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volatile uint32_t ISER[8];
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volatile uint32_t unused1[24];
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volatile uint32_t ICER[8];
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volatile uint32_t unused2[24];
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volatile uint32_t ISPR[8];
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volatile uint32_t unused3[24];
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volatile uint32_t ICPR[8];
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volatile uint32_t unused4[24];
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volatile uint32_t IABR[8];
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volatile uint32_t unused5[56];
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volatile uint32_t IPR[60];
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};
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static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
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#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
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#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
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#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
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static void
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nvic_enable_vector (uint32_t n, uint32_t prio)
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{
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unsigned int sh = (n & 3) << 3;
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NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
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NVIC_ICPR (n) = 1 << (n & 0x1F);
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NVIC_ISER (n) = 1 << (n & 0x1F);
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}
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static void
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usb_cable_config (int enable)
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@@ -164,13 +85,6 @@ usb_lld_sys_init (void)
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usb_cable_config (1);
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RCC->APB1ENR |= RCC_APB1ENR_USBEN;
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nvic_enable_vector (USB_LP_CAN1_RX0_IRQn,
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CORTEX_PRIORITY_MASK (STM32_USB_IRQ_PRIORITY));
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/*
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* Note that we also have other IRQ(s):
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* USB_HP_CAN1_TX_IRQn (for double-buffered or isochronous)
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* USBWakeUp_IRQn (suspend/resume)
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*/
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RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
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RCC->APB1RSTR = 0;
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}
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@@ -289,16 +203,19 @@ flash_check_blank (const uint8_t *p_start, size_t size)
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return 1;
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}
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extern uint8_t __flash_start__, __flash_end__;
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#define FLASH_START_ADDR 0x08000000 /* Fixed for all STM32F1. */
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#define FLASH_OFFSET 0x1000 /* First pages are not-writable. */
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#define FLASH_START (FLASH_START_ADDR+FLASH_OFFSET)
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#define CHIP_ID_REG ((uint32_t *)0xe0042000)
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#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7e0)
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static int
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flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
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{
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int status;
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uint32_t flash_start = (uint32_t)&__flash_start__;
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uint32_t flash_end = (uint32_t)&__flash_end__;
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uint32_t flash_end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
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if (dst_addr < flash_start || dst_addr + len > flash_end)
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if (dst_addr < FLASH_START || dst_addr + len > flash_end)
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return 0;
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while (len)
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@@ -351,17 +268,21 @@ flash_protect (void)
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static void __attribute__((naked))
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flash_erase_all_and_exec (void (*entry)(void))
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{
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uint32_t addr = (uint32_t)&__flash_start__;
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uint32_t end = (uint32_t)&__flash_end__;
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uint32_t addr = FLASH_START;
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uint32_t end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
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uint32_t page_size = 1024;
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int r;
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if (((*CHIP_ID_REG) & 0xfff) == 0x0414)
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page_size = 2048;
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while (addr < end)
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{
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r = flash_erase_page (addr);
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if (r != 0)
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break;
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addr += FLASH_PAGE_SIZE;
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addr += page_size;
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}
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if (addr >= end)
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@@ -455,13 +376,19 @@ handler vector[] __attribute__ ((section(".vectors"))) = {
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usb_lld_sys_shutdown,
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nvic_system_reset,
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clock_init,
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gpio_init_primer2,
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gpio_init,
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NULL,
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};
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const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
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3*2+2, /* bLength */
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0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE*/
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/* sys version: "2.0" */
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'2', 0, '.', 0, '0', 0,
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0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */
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/* sys version: "3.0" */
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'3', 0, '.', 0, '0', 0,
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};
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const uint32_t __attribute__((section(".sys.board_id")))
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sys_board_id = BOARD_ID;
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const uint8_t __attribute__((section(".sys.board_name")))
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sys_board_name[] = BOARD_NAME;
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