deon/chopstx
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

Fix PSR handling (ORRS instruction changes PSR)

Browse Source
This commit is contained in:
NIIBE Yutaka
2016-05-23 20:15:47 +09:00
parent 77255b0c1d
commit 2704416c38
2 changed files with 13 additions and 9 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
ChangeLog
View File

@@ -1,3 +1,7 @@
2016-05-23 NIIBE Yutaka <gniibe@fsij.org>
* chopst.x (chx_sched) [__ARM_ARCH_6M__]: Maintain PSR.
2016-05-23 NIIBE Yutaka <gniibe@fsij.org>
* chopstx.c (chopstx_poll): Fix a race. Check COUNTER.

18
chopstx.c
View File

@@ -727,7 +727,7 @@ chx_request_preemption (uint16_t prio)
* AAPCS: ARM Architecture Procedure Call Standard
*
* Returns:
* 1 on erroneous wakeup.
* 1 on wakeup by others.
* 0 on normal wakeup.
* -1 on cancellation.
*/
@@ -855,11 +855,11 @@ chx_sched (uint32_t yield)
"lsl r1, r0, #23\n\t"
"bcc 2f\n\t"
/**/
"msr APSR_nzcvq, r0\n\t"
"ldr r0, [sp, #24]\n\t"
"ldr r2, [sp, #24]\n\t"
"mov r1, #1\n\t"
"orr r0, r1\n\t" /* Ensure Thumb-mode */
"str r0, [sp, #32]\n\t"
"orr r2, r1\n\t" /* Ensure Thumb-mode */
"str r2, [sp, #32]\n\t"
"msr APSR_nzcvq, r0\n\t"
/**/
"ldr r0, [sp, #20]\n\t"
"mov lr, r0\n\t"
@@ -869,11 +869,11 @@ chx_sched (uint32_t yield)
"add sp, #16\n\t"
"pop {pc}\n"
"2:\n\t"
"msr APSR_nzcvq, r0\n\t"
"ldr r0, [sp, #24]\n\t"
"ldr r2, [sp, #24]\n\t"
"mov r1, #1\n\t"
"orr r0, r1\n\t" /* Ensure Thumb-mode */
"str r0, [sp, #28]\n\t"
"orr r2, r1\n\t" /* Ensure Thumb-mode */
"str r2, [sp, #28]\n\t"
"msr APSR_nzcvq, r0\n\t"
/**/
"ldr r0, [sp, #20]\n\t"
"mov lr, r0\n\t"