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rsa improvement

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NIIBE Yutaka
2011-05-26 12:04:45 +09:00
parent 4e1126f88c
commit ede8bdc2c0
2 changed files with 16 additions and 8 deletions
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7
ChangeLog
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@@ -1,3 +1,10 @@
2011-05-26 NIIBE Yutaka <gniibe@fsij.org>
* polarssl-0.14.0/include/polarssl/bn_mul.h [__arm__]
(MULADDC_INIT): Add ADDS instruction to clear of carry flag.
(MULADDC_CORE): Tune to 6 instructions and less registers.
(MULADDC_STOP): Add ADC instruction to save carry flag.
2011-05-25 NIIBE Yutaka <gniibe@fsij.org> 2011-05-25 NIIBE Yutaka <gniibe@fsij.org>
* tool/hub_ctrl.py: New. Port of original C implementation. * tool/hub_ctrl.py: New. Port of original C implementation.

17
polarssl-0.14.0/include/polarssl/bn_mul.h
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@@ -500,22 +500,23 @@
asm( "ldr r0, %0 " :: "m" (s)); \ asm( "ldr r0, %0 " :: "m" (s)); \
asm( "ldr r1, %0 " :: "m" (d)); \ asm( "ldr r1, %0 " :: "m" (d)); \
asm( "ldr r2, %0 " :: "m" (c)); \ asm( "ldr r2, %0 " :: "m" (c)); \
asm( "ldr r3, %0 " :: "m" (b)); asm( "ldr r3, %0 " :: "m" (b)); \
asm( "adds r0, #0 ");
#define MULADDC_CORE \ #define MULADDC_CORE \
asm( "ldr r5, [r1] " ); \
asm( "ldr r4, [r0], #4 " ); \ asm( "ldr r4, [r0], #4 " ); \
asm( "mov r5, #0 " ); \ asm( "adcs r5, r2, r5 " ); \
asm( "ldr r6, [r1] " ); \ asm( "mov r2, #0 " ); \
asm( "umlal r2, r5, r3, r4 " ); \ asm( "umlal r5, r2, r3, r4 " ); \
asm( "adds r7, r6, r2 " ); \ asm( "str r5, [r1], #4 " );
asm( "adc r2, r5, #0 " ); \
asm( "str r7, [r1], #4 " );
#define MULADDC_STOP \ #define MULADDC_STOP \
asm( "adc r2, r2, #0 " ); \
asm( "str r2, %0 " : "=m" (c)); \ asm( "str r2, %0 " : "=m" (c)); \
asm( "str r1, %0 " : "=m" (d)); \ asm( "str r1, %0 " : "=m" (d)); \
asm( "str r0, %0 " : "=m" (s) :: \ asm( "str r0, %0 " : "=m" (s) :: \
"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" ); "r0", "r1", "r2", "r3", "r4", "r5" );
#endif /* ARMv3 */ #endif /* ARMv3 */