From d636bf314ca5e6f00292439e29c1293b0a4b941f Mon Sep 17 00:00:00 2001 From: NIIBE Yutaka Date: Tue, 31 May 2016 21:18:08 +0900 Subject: [PATCH] Remove sys, adc and usb (use Chopstx's) --- ChangeLog | 3 + src/adc_stm32f103.c | 319 ------------ src/stm32f103.h | 700 --------------------------- src/sys.c | 394 --------------- src/usb_stm32f103.c | 1127 ------------------------------------------- 5 files changed, 3 insertions(+), 2540 deletions(-) delete mode 100644 src/adc_stm32f103.c delete mode 100644 src/stm32f103.h delete mode 100644 src/sys.c delete mode 100644 src/usb_stm32f103.c diff --git a/ChangeLog b/ChangeLog index 8f10023..8866f3d 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,5 +1,8 @@ 2016-05-31 NIIBE Yutaka + * src/usb_stm32f103.c, src/stm32f103.h: Remove. + * src/adc_stm32f103.c, src/sys.c: Remove. + * src/usb_ctrl.c (usb_cb_interface): call ccid_usb_reset. (usb_cb_handle_event): Likewise. diff --git a/src/adc_stm32f103.c b/src/adc_stm32f103.c deleted file mode 100644 index 839b958..0000000 --- a/src/adc_stm32f103.c +++ /dev/null @@ -1,319 +0,0 @@ -/* - * adc_stm32f103.c - ADC driver for STM32F103 - * In this ADC driver, there are NeuG specific parts. - * You need to modify to use this as generic ADC driver. - * - * Copyright (C) 2011, 2012, 2013, 2015 - * Free Software Initiative of Japan - * Author: NIIBE Yutaka - * - * This file is a part of NeuG, a True Random Number Generator - * implementation based on quantization error of ADC (for STM32F103). - * - * NeuG is free software: you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by - * the Free Software Foundation, either version 3 of the License, or - * (at your option) any later version. - * - * NeuG is distributed in the hope that it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY - * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public - * License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program. If not, see . - * - */ - -#include -#include -#include - -#include "neug.h" -#include "stm32f103.h" -#include "adc.h" - -#define NEUG_CRC32_COUNTS 4 - -#define STM32_ADC_ADC1_DMA_PRIORITY 2 - -#define ADC_SMPR1_SMP_VREF(n) ((n) << 21) -#define ADC_SMPR1_SMP_SENSOR(n) ((n) << 18) - -#define ADC_SMPR1_SMP_AN10(n) ((n) << 0) -#define ADC_SMPR1_SMP_AN11(n) ((n) << 3) - -#define ADC_SMPR2_SMP_AN0(n) ((n) << 0) -#define ADC_SMPR2_SMP_AN1(n) ((n) << 3) -#define ADC_SMPR2_SMP_AN2(n) ((n) << 6) -#define ADC_SMPR2_SMP_AN9(n) ((n) << 27) - -#define ADC_SQR1_NUM_CH(n) (((n) - 1) << 20) - -#define ADC_SQR3_SQ1_N(n) ((n) << 0) -#define ADC_SQR3_SQ2_N(n) ((n) << 5) -#define ADC_SQR3_SQ3_N(n) ((n) << 10) -#define ADC_SQR3_SQ4_N(n) ((n) << 15) - -#define ADC_SAMPLE_1P5 0 - -#define ADC_CHANNEL_IN0 0 -#define ADC_CHANNEL_IN1 1 -#define ADC_CHANNEL_IN2 2 -#define ADC_CHANNEL_IN9 9 -#define ADC_CHANNEL_IN10 10 -#define ADC_CHANNEL_IN11 11 -#define ADC_CHANNEL_SENSOR 16 -#define ADC_CHANNEL_VREFINT 17 - -#define DELIBARATELY_DO_IT_WRONG_VREF_SAMPLE_TIME -#define DELIBARATELY_DO_IT_WRONG_START_STOP - -#ifdef DELIBARATELY_DO_IT_WRONG_VREF_SAMPLE_TIME -#define ADC_SAMPLE_VREF ADC_SAMPLE_1P5 -#define ADC_SAMPLE_SENSOR ADC_SAMPLE_1P5 -#else -#define ADC_SAMPLE_VREF ADC_SAMPLE_239P5 -#define ADC_SAMPLE_SENSOR ADC_SAMPLE_239P5 -#endif - -#define NEUG_DMA_CHANNEL STM32_DMA1_STREAM1 -#define NEUG_DMA_MODE \ - ( STM32_DMA_CR_PL (STM32_ADC_ADC1_DMA_PRIORITY) \ - | STM32_DMA_CR_MSIZE_WORD | STM32_DMA_CR_PSIZE_WORD \ - | STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE \ - | STM32_DMA_CR_TEIE ) - -#define NEUG_ADC_SETTING1_SMPR1 ADC_SMPR1_SMP_VREF(ADC_SAMPLE_VREF) \ - | ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_SENSOR) -#define NEUG_ADC_SETTING1_SMPR2 0 -#define NEUG_ADC_SETTING1_SQR3 ADC_SQR3_SQ1_N(ADC_CHANNEL_VREFINT) \ - | ADC_SQR3_SQ2_N(ADC_CHANNEL_SENSOR) \ - | ADC_SQR3_SQ3_N(ADC_CHANNEL_SENSOR) \ - | ADC_SQR3_SQ4_N(ADC_CHANNEL_VREFINT) -#define NEUG_ADC_SETTING1_NUM_CHANNELS 4 - - -/* - * Do calibration for both of ADCs. - */ -void adc_init (void) -{ - RCC->APB2ENR |= (RCC_APB2ENR_ADC1EN | RCC_APB2ENR_ADC2EN); - RCC->APB2RSTR = (RCC_APB2RSTR_ADC1RST | RCC_APB2RSTR_ADC2RST); - RCC->APB2RSTR = 0; - - ADC1->CR1 = 0; - ADC1->CR2 = ADC_CR2_ADON; - ADC1->CR2 = ADC_CR2_ADON | ADC_CR2_RSTCAL; - while ((ADC1->CR2 & ADC_CR2_RSTCAL) != 0) - ; - ADC1->CR2 = ADC_CR2_ADON | ADC_CR2_CAL; - while ((ADC1->CR2 & ADC_CR2_CAL) != 0) - ; - ADC1->CR2 = 0; - - ADC2->CR1 = 0; - ADC2->CR2 = ADC_CR2_ADON; - ADC2->CR2 = ADC_CR2_ADON | ADC_CR2_RSTCAL; - while ((ADC2->CR2 & ADC_CR2_RSTCAL) != 0) - ; - ADC2->CR2 = ADC_CR2_ADON | ADC_CR2_CAL; - while ((ADC2->CR2 & ADC_CR2_CAL) != 0) - ; - ADC2->CR2 = 0; - RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN | RCC_APB2ENR_ADC2EN); -} - -#include "sys.h" -#if defined(HAVE_SYS_H) -# define SYS_BOARD_ID sys_board_id -#else -# include "board.h" -# define SYS_BOARD_ID BOARD_ID -#endif - -static void -get_adc_config (uint32_t config[4]) -{ - config[2] = ADC_SQR1_NUM_CH(2); - switch (SYS_BOARD_ID) - { - case BOARD_ID_FST_01: - config[0] = 0; - config[1] = ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5) - | ADC_SMPR2_SMP_AN9(ADC_SAMPLE_1P5); - config[3] = ADC_SQR3_SQ1_N(ADC_CHANNEL_IN0) - | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN9); - break; - - case BOARD_ID_OLIMEX_STM32_H103: - case BOARD_ID_STBEE: - config[0] = ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) - | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_1P5); - config[1] = 0; - config[3] = ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) - | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11); - break; - - case BOARD_ID_STBEE_MINI: - config[0] = 0; - config[1] = ADC_SMPR2_SMP_AN1(ADC_SAMPLE_1P5) - | ADC_SMPR2_SMP_AN2(ADC_SAMPLE_1P5); - config[3] = ADC_SQR3_SQ1_N(ADC_CHANNEL_IN1) - | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN2); - break; - - case BOARD_ID_CQ_STARM: - case BOARD_ID_FST_01_00: - case BOARD_ID_MAPLE_MINI: - case BOARD_ID_STM32_PRIMER2: - case BOARD_ID_STM8S_DISCOVERY: - case BOARD_ID_ST_DONGLE: - case BOARD_ID_ST_NUCLEO_F103: - case BOARD_ID_NITROKEY_START: - default: - config[0] = 0; - config[1] = ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5) - | ADC_SMPR2_SMP_AN1(ADC_SAMPLE_1P5); - config[3] = ADC_SQR3_SQ1_N(ADC_CHANNEL_IN0) - | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN1); - break; - } -} - - -void adc_start (void) -{ - uint32_t config[4]; - - get_adc_config (config); - - /* Use DMA channel 1. */ - RCC->AHBENR |= RCC_AHBENR_DMA1EN; - DMA1_Channel1->CCR = STM32_DMA_CCR_RESET_VALUE; - DMA1->IFCR = 0xffffffff; - - RCC->APB2ENR |= (RCC_APB2ENR_ADC1EN | RCC_APB2ENR_ADC2EN); - - ADC1->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0 - | ADC_CR1_SCAN); - ADC1->CR2 = (ADC_CR2_TSVREFE | ADC_CR2_EXTTRIG | ADC_CR2_SWSTART - | ADC_CR2_EXTSEL | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON); - ADC1->SMPR1 = NEUG_ADC_SETTING1_SMPR1; - ADC1->SMPR2 = NEUG_ADC_SETTING1_SMPR2; - ADC1->SQR1 = ADC_SQR1_NUM_CH(NEUG_ADC_SETTING1_NUM_CHANNELS); - ADC1->SQR2 = 0; - ADC1->SQR3 = NEUG_ADC_SETTING1_SQR3; - - ADC2->CR1 = (ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0 - | ADC_CR1_SCAN); - ADC2->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_CONT | ADC_CR2_ADON; - ADC2->SMPR1 = config[0]; - ADC2->SMPR2 = config[1]; - ADC2->SQR1 = config[2]; - ADC2->SQR2 = 0; - ADC2->SQR3 = config[3]; - -#ifdef DELIBARATELY_DO_IT_WRONG_START_STOP - /* - * We could just let ADC run continuously always and only enable DMA - * to receive stable data from ADC. But our purpose is not to get - * correct data but noise. In fact, we can get more noise when we - * start/stop ADC each time. - */ - ADC2->CR2 = 0; - ADC1->CR2 = 0; -#else - /* Start conversion. */ - ADC2->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_CONT | ADC_CR2_ADON; - ADC1->CR2 = (ADC_CR2_TSVREFE | ADC_CR2_EXTTRIG | ADC_CR2_SWSTART - | ADC_CR2_EXTSEL | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON); -#endif -} - -uint32_t adc_buf[64]; - -void adc_start_conversion (int offset, int count) -{ - DMA1_Channel1->CPAR = (uint32_t)&ADC1->DR; /* SetPeripheral */ - DMA1_Channel1->CMAR = (uint32_t)&adc_buf[offset]; /* SetMemory0 */ - DMA1_Channel1->CNDTR = count; /* Counter */ - DMA1_Channel1->CCR = NEUG_DMA_MODE | DMA_CCR1_EN; /* Mode */ - -#ifdef DELIBARATELY_DO_IT_WRONG_START_STOP - /* Power on */ - ADC2->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_CONT | ADC_CR2_ADON; - ADC1->CR2 = (ADC_CR2_TSVREFE | ADC_CR2_EXTTRIG | ADC_CR2_SWSTART - | ADC_CR2_EXTSEL | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON); - /* - * Start conversion. tSTAB is 1uS, but we don't follow the spec, to - * get more noise. - */ - ADC2->CR2 = ADC_CR2_EXTTRIG | ADC_CR2_CONT | ADC_CR2_ADON; - ADC1->CR2 = (ADC_CR2_TSVREFE | ADC_CR2_EXTTRIG | ADC_CR2_SWSTART - | ADC_CR2_EXTSEL | ADC_CR2_DMA | ADC_CR2_CONT | ADC_CR2_ADON); -#endif -} - - -static void adc_stop_conversion (void) -{ - DMA1_Channel1->CCR &= ~DMA_CCR1_EN; - -#ifdef DELIBARATELY_DO_IT_WRONG_START_STOP - ADC2->CR2 = 0; - ADC1->CR2 = 0; -#endif -} - -void adc_stop (void) -{ - ADC1->CR1 = 0; - ADC1->CR2 = 0; - - ADC2->CR1 = 0; - ADC2->CR2 = 0; - - RCC->AHBENR &= ~RCC_AHBENR_DMA1EN; - RCC->APB2ENR &= ~(RCC_APB2ENR_ADC1EN | RCC_APB2ENR_ADC2EN); -} - - -static uint32_t adc_err; - -/* - * Return 0 on success. - * Return 1 on error. - */ -int adc_wait_completion (chopstx_intr_t *intr) -{ - uint32_t flags; - - while (1) - { - chopstx_intr_wait (intr); - flags = DMA1->ISR & STM32_DMA_ISR_MASK; /* Channel 1 interrupt cause. */ - /* - * Clear interrupt cause of channel 1. - * - * Note that CGIFx=0, as CGIFx=1 clears all of GIF, HTIF, TCIF - * and TEIF. - */ - DMA1->IFCR = (flags & ~1); - - if ((flags & STM32_DMA_ISR_TEIF) != 0) /* DMA errors */ - { - /* Should never happened. If any, it's coding error. */ - /* Access an unmapped address space or alignment violation. */ - adc_err++; - adc_stop_conversion (); - return 1; - } - else if ((flags & STM32_DMA_ISR_TCIF) != 0) /* Transfer complete */ - { - adc_stop_conversion (); - return 0; - } - } -} diff --git a/src/stm32f103.h b/src/stm32f103.h deleted file mode 100644 index f7ec6a2..0000000 --- a/src/stm32f103.h +++ /dev/null @@ -1,700 +0,0 @@ -#define PERIPH_BASE 0x40000000 -#define APB1PERIPH_BASE PERIPH_BASE -#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) -#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) - -struct RCC { - volatile uint32_t CR; - volatile uint32_t CFGR; - volatile uint32_t CIR; - volatile uint32_t APB2RSTR; - volatile uint32_t APB1RSTR; - volatile uint32_t AHBENR; - volatile uint32_t APB2ENR; - volatile uint32_t APB1ENR; - volatile uint32_t BDCR; - volatile uint32_t CSR; -}; - -#define RCC_BASE (AHBPERIPH_BASE + 0x1000) -static struct RCC *const RCC = ((struct RCC *const)RCC_BASE); - -#define RCC_AHBENR_DMA1EN 0x00000001 -#define RCC_AHBENR_CRCEN 0x00000040 - -#define RCC_APB2ENR_ADC1EN 0x00000200 -#define RCC_APB2ENR_ADC2EN 0x00000400 -#define RCC_APB2ENR_TIM1EN 0x00000800 -#define RCC_APB1ENR_TIM2EN 0x00000001 -#define RCC_APB1ENR_TIM3EN 0x00000002 -#define RCC_APB1ENR_TIM4EN 0x00000004 - -#define RCC_APB2RSTR_ADC1RST 0x00000200 -#define RCC_APB2RSTR_ADC2RST 0x00000400 -#define RCC_APB2RSTR_TIM1RST 0x00000800 -#define RCC_APB1RSTR_TIM2RST 0x00000001 -#define RCC_APB1RSTR_TIM3RST 0x00000002 -#define RCC_APB1RSTR_TIM4RST 0x00000004 - -#define CRC_CR_RESET 0x00000001 - -struct CRC { - volatile uint32_t DR; - volatile uint8_t IDR; - uint8_t RESERVED0; - uint16_t RESERVED1; - volatile uint32_t CR; -}; - -#define CRC_BASE (AHBPERIPH_BASE + 0x3000) -static struct CRC *const CRC = ((struct CRC *const)CRC_BASE); - - -struct ADC { - volatile uint32_t SR; - volatile uint32_t CR1; - volatile uint32_t CR2; - volatile uint32_t SMPR1; - volatile uint32_t SMPR2; - volatile uint32_t JOFR1; - volatile uint32_t JOFR2; - volatile uint32_t JOFR3; - volatile uint32_t JOFR4; - volatile uint32_t HTR; - volatile uint32_t LTR; - volatile uint32_t SQR1; - volatile uint32_t SQR2; - volatile uint32_t SQR3; - volatile uint32_t JSQR; - volatile uint32_t JDR1; - volatile uint32_t JDR2; - volatile uint32_t JDR3; - volatile uint32_t JDR4; - volatile uint32_t DR; -}; - -#define ADC1_BASE (APB2PERIPH_BASE + 0x2400) -#define ADC2_BASE (APB2PERIPH_BASE + 0x2800) - -static struct ADC *const ADC1 = (struct ADC *const)ADC1_BASE; -static struct ADC *const ADC2 = (struct ADC *const)ADC2_BASE; - -#define ADC_CR1_DUALMOD_0 0x00010000 -#define ADC_CR1_DUALMOD_1 0x00020000 -#define ADC_CR1_DUALMOD_2 0x00040000 -#define ADC_CR1_DUALMOD_3 0x00080000 - -#define ADC_CR1_SCAN 0x00000100 - -#define ADC_CR2_ADON 0x00000001 -#define ADC_CR2_CONT 0x00000002 -#define ADC_CR2_CAL 0x00000004 -#define ADC_CR2_RSTCAL 0x00000008 -#define ADC_CR2_DMA 0x00000100 -#define ADC_CR2_ALIGN 0x00000800 -#define ADC_CR2_EXTSEL 0x000E0000 -#define ADC_CR2_EXTSEL_0 0x00020000 -#define ADC_CR2_EXTSEL_1 0x00040000 -#define ADC_CR2_EXTSEL_2 0x00080000 -#define ADC_CR2_EXTTRIG 0x00100000 -#define ADC_CR2_SWSTART 0x00400000 -#define ADC_CR2_TSVREFE 0x00800000 - -struct DMA_Channel { - volatile uint32_t CCR; - volatile uint32_t CNDTR; - volatile uint32_t CPAR; - volatile uint32_t CMAR; -}; - -struct DMA { - volatile uint32_t ISR; - volatile uint32_t IFCR; -}; - -#define STM32_DMA_CR_MINC DMA_CCR1_MINC -#define STM32_DMA_CR_MSIZE_WORD DMA_CCR1_MSIZE_1 -#define STM32_DMA_CR_PSIZE_WORD DMA_CCR1_PSIZE_1 -#define STM32_DMA_CR_TCIE DMA_CCR1_TCIE -#define STM32_DMA_CR_TEIE DMA_CCR1_TEIE -#define STM32_DMA_CR_HTIE DMA_CCR1_HTIE -#define STM32_DMA_ISR_TEIF DMA_ISR_TEIF1 -#define STM32_DMA_ISR_HTIF DMA_ISR_HTIF1 -#define STM32_DMA_ISR_TCIF DMA_ISR_TCIF1 - -#define STM32_DMA_ISR_MASK 0x0F -#define STM32_DMA_CCR_RESET_VALUE 0x00000000 -#define STM32_DMA_CR_PL_MASK DMA_CCR1_PL -#define STM32_DMA_CR_PL(n) ((n) << 12) - -#define DMA_CCR1_EN 0x00000001 -#define DMA_CCR1_TCIE 0x00000002 -#define DMA_CCR1_HTIE 0x00000004 -#define DMA_CCR1_TEIE 0x00000008 -#define DMA_CCR1_DIR 0x00000010 -#define DMA_CCR1_CIRC 0x00000020 -#define DMA_CCR1_PINC 0x00000040 -#define DMA_CCR1_MINC 0x00000080 -#define DMA_CCR1_PSIZE 0x00000300 -#define DMA_CCR1_PSIZE_0 0x00000100 -#define DMA_CCR1_PSIZE_1 0x00000200 -#define DMA_CCR1_MSIZE 0x00000C00 -#define DMA_CCR1_MSIZE_0 0x00000400 -#define DMA_CCR1_MSIZE_1 0x00000800 -#define DMA_CCR1_PL 0x00003000 -#define DMA_CCR1_PL_0 0x00001000 -#define DMA_CCR1_PL_1 0x00002000 -#define DMA_CCR1_MEM2MEM 0x00004000 - -#define DMA_ISR_GIF1 0x00000001 -#define DMA_ISR_TCIF1 0x00000002 -#define DMA_ISR_HTIF1 0x00000004 -#define DMA_ISR_TEIF1 0x00000008 -#define DMA_ISR_GIF2 0x00000010 -#define DMA_ISR_TCIF2 0x00000020 -#define DMA_ISR_HTIF2 0x00000040 -#define DMA_ISR_TEIF2 0x00000080 -#define DMA_ISR_GIF3 0x00000100 -#define DMA_ISR_TCIF3 0x00000200 -#define DMA_ISR_HTIF3 0x00000400 -#define DMA_ISR_TEIF3 0x00000800 -#define DMA_ISR_GIF4 0x00001000 -#define DMA_ISR_TCIF4 0x00002000 -#define DMA_ISR_HTIF4 0x00004000 -#define DMA_ISR_TEIF4 0x00008000 -#define DMA_ISR_GIF5 0x00010000 -#define DMA_ISR_TCIF5 0x00020000 -#define DMA_ISR_HTIF5 0x00040000 -#define DMA_ISR_TEIF5 0x00080000 -#define DMA_ISR_GIF6 0x00100000 -#define DMA_ISR_TCIF6 0x00200000 -#define DMA_ISR_HTIF6 0x00400000 -#define DMA_ISR_TEIF6 0x00800000 -#define DMA_ISR_GIF7 0x01000000 -#define DMA_ISR_TCIF7 0x02000000 -#define DMA_ISR_HTIF7 0x04000000 -#define DMA_ISR_TEIF7 0x08000000 - -#define DMA1_BASE (AHBPERIPH_BASE + 0x0000) -static struct DMA *const DMA1 = (struct DMA *const)DMA1_BASE; - -#define DMA1_Channel1_BASE (AHBPERIPH_BASE + 0x0008) -static struct DMA_Channel *const DMA1_Channel1 = - (struct DMA_Channel *const)DMA1_Channel1_BASE; - -/* System Control Block */ -struct SCB -{ - volatile uint32_t CPUID; - volatile uint32_t ICSR; - volatile uint32_t VTOR; - volatile uint32_t AIRCR; - volatile uint32_t SCR; - volatile uint32_t CCR; - volatile uint8_t SHP[12]; - volatile uint32_t SHCSR; - volatile uint32_t CFSR; - volatile uint32_t HFSR; - volatile uint32_t DFSR; - volatile uint32_t MMFAR; - volatile uint32_t BFAR; - volatile uint32_t AFSR; - volatile uint32_t PFR[2]; - volatile uint32_t DFR; - volatile uint32_t ADR; - volatile uint32_t MMFR[4]; - volatile uint32_t ISAR[5]; - uint32_t RESERVED0[5]; - volatile uint32_t CPACR; -}; - -#define SCS_BASE 0xE000E000 -#define SCB_BASE (SCS_BASE + 0x0D00) -static struct SCB *const SCB = (struct SCB *const)SCB_BASE; - -/* Timer */ -struct TIM -{ - volatile uint16_t CR1; uint16_t RESERVED0; - volatile uint16_t CR2; uint16_t RESERVED1; - volatile uint16_t SMCR; uint16_t RESERVED2; - volatile uint16_t DIER; uint16_t RESERVED3; - volatile uint16_t SR; uint16_t RESERVED4; - volatile uint16_t EGR; uint16_t RESERVED5; - volatile uint16_t CCMR1; uint16_t RESERVED6; - volatile uint16_t CCMR2; uint16_t RESERVED7; - volatile uint16_t CCER; uint16_t RESERVED8; - volatile uint16_t CNT; uint16_t RESERVED9; - volatile uint16_t PSC; uint16_t RESERVED10; - volatile uint16_t ARR; uint16_t RESERVED11; - volatile uint16_t RCR; uint16_t RESERVED12; - volatile uint16_t CCR1; uint16_t RESERVED13; - volatile uint16_t CCR2; uint16_t RESERVED14; - volatile uint16_t CCR3; uint16_t RESERVED15; - volatile uint16_t CCR4; uint16_t RESERVED16; - volatile uint16_t BDTR; uint16_t RESERVED17; - volatile uint16_t DCR; uint16_t RESERVED18; - volatile uint16_t DMAR; uint16_t RESERVED19; -}; - -#define TIM2_BASE 0x40000000 -#define TIM3_BASE 0x40000400 -#define TIM4_BASE 0x40000800 -static struct TIM *const TIM2 = (struct TIM *const)TIM2_BASE; -static struct TIM *const TIM3 = (struct TIM *const)TIM3_BASE; -static struct TIM *const TIM4 = (struct TIM *const)TIM4_BASE; - -#define TIM_CR1_CEN 0x0001 -#define TIM_CR1_UDIS 0x0002 -#define TIM_CR1_URS 0x0004 -#define TIM_CR1_OPM 0x0008 -#define TIM_CR1_DIR 0x0010 -#define TIM_CR1_CMS 0x0060 -#define TIM_CR1_CMS_0 0x0020 -#define TIM_CR1_CMS_1 0x0040 -#define TIM_CR1_ARPE 0x0080 -#define TIM_CR1_CKD 0x0300 -#define TIM_CR1_CKD_0 0x0100 -#define TIM_CR1_CKD_1 0x0200 - -#define TIM_CR2_CCPC 0x0001 -#define TIM_CR2_CCUS 0x0004 -#define TIM_CR2_CCDS 0x0008 -#define TIM_CR2_MMS 0x0070 -#define TIM_CR2_MMS_0 0x0010 -#define TIM_CR2_MMS_1 0x0020 -#define TIM_CR2_MMS_2 0x0040 -#define TIM_CR2_TI1S 0x0080 -#define TIM_CR2_OIS1 0x0100 -#define TIM_CR2_OIS1N 0x0200 -#define TIM_CR2_OIS2 0x0400 -#define TIM_CR2_OIS2N 0x0800 -#define TIM_CR2_OIS3 0x1000 -#define TIM_CR2_OIS3N 0x2000 -#define TIM_CR2_OIS4 0x4000 - -#define TIM_SMCR_SMS 0x0007 -#define TIM_SMCR_SMS_0 0x0001 -#define TIM_SMCR_SMS_1 0x0002 -#define TIM_SMCR_SMS_2 0x0004 -#define TIM_SMCR_TS 0x0070 -#define TIM_SMCR_TS_0 0x0010 -#define TIM_SMCR_TS_1 0x0020 -#define TIM_SMCR_TS_2 0x0040 -#define TIM_SMCR_MSM 0x0080 - -#define TIM_SMCR_ETF 0x0F00 -#define TIM_SMCR_ETF_0 0x0100 -#define TIM_SMCR_ETF_1 0x0200 -#define TIM_SMCR_ETF_2 0x0400 -#define TIM_SMCR_ETF_3 0x0800 - -#define TIM_SMCR_ETPS 0x3000 -#define TIM_SMCR_ETPS_0 0x1000 -#define TIM_SMCR_ETPS_1 0x2000 - -#define TIM_SMCR_ECE 0x4000 -#define TIM_SMCR_ETP 0x8000 - -#define TIM_DIER_UIE 0x0001 -#define TIM_DIER_CC1IE 0x0002 -#define TIM_DIER_CC2IE 0x0004 -#define TIM_DIER_CC3IE 0x0008 -#define TIM_DIER_CC4IE 0x0010 -#define TIM_DIER_COMIE 0x0020 -#define TIM_DIER_TIE 0x0040 -#define TIM_DIER_BIE 0x0080 -#define TIM_DIER_UDE 0x0100 -#define TIM_DIER_CC1DE 0x0200 -#define TIM_DIER_CC2DE 0x0400 -#define TIM_DIER_CC3DE 0x0800 -#define TIM_DIER_CC4DE 0x1000 -#define TIM_DIER_COMDE 0x2000 -#define TIM_DIER_TDE 0x4000 - -#define TIM_SR_UIF 0x0001 -#define TIM_SR_CC1IF 0x0002 -#define TIM_SR_CC2IF 0x0004 -#define TIM_SR_CC3IF 0x0008 -#define TIM_SR_CC4IF 0x0010 -#define TIM_SR_COMIF 0x0020 -#define TIM_SR_TIF 0x0040 -#define TIM_SR_BIF 0x0080 -#define TIM_SR_CC1OF 0x0200 -#define TIM_SR_CC2OF 0x0400 -#define TIM_SR_CC3OF 0x0800 -#define TIM_SR_CC4OF 0x1000 - -#define TIM_EGR_UG 0x01 -#define TIM_EGR_CC1G 0x02 -#define TIM_EGR_CC2G 0x04 -#define TIM_EGR_CC3G 0x08 -#define TIM_EGR_CC4G 0x10 -#define TIM_EGR_COMG 0x20 -#define TIM_EGR_TG 0x40 -#define TIM_EGR_BG 0x80 - -#define TIM_CCMR1_CC1S 0x0003 -#define TIM_CCMR1_CC1S_0 0x0001 -#define TIM_CCMR1_CC1S_1 0x0002 - -#define TIM_CCMR1_OC1FE 0x0004 -#define TIM_CCMR1_OC1PE 0x0008 - -#define TIM_CCMR1_OC1M 0x0070 -#define TIM_CCMR1_OC1M_0 0x0010 -#define TIM_CCMR1_OC1M_1 0x0020 -#define TIM_CCMR1_OC1M_2 0x0040 - -#define TIM_CCMR1_OC1CE 0x0080 - -#define TIM_CCMR1_CC2S 0x0300 -#define TIM_CCMR1_CC2S_0 0x0100 -#define TIM_CCMR1_CC2S_1 0x0200 - -#define TIM_CCMR1_OC2FE 0x0400 -#define TIM_CCMR1_OC2PE 0x0800 - -#define TIM_CCMR1_OC2M 0x7000 -#define TIM_CCMR1_OC2M_0 0x1000 -#define TIM_CCMR1_OC2M_1 0x2000 -#define TIM_CCMR1_OC2M_2 0x4000 - -#define TIM_CCMR1_OC2CE 0x8000 - - -#define TIM_CCMR1_IC1PSC 0x000C -#define TIM_CCMR1_IC1PSC_0 0x0004 -#define TIM_CCMR1_IC1PSC_1 0x0008 - -#define TIM_CCMR1_IC1F 0x00F0 -#define TIM_CCMR1_IC1F_0 0x0010 -#define TIM_CCMR1_IC1F_1 0x0020 -#define TIM_CCMR1_IC1F_2 0x0040 -#define TIM_CCMR1_IC1F_3 0x0080 - -#define TIM_CCMR1_IC2PSC 0x0C00 -#define TIM_CCMR1_IC2PSC_0 0x0400 -#define TIM_CCMR1_IC2PSC_1 0x0800 - -#define TIM_CCMR1_IC2F 0xF000 -#define TIM_CCMR1_IC2F_0 0x1000 -#define TIM_CCMR1_IC2F_1 0x2000 -#define TIM_CCMR1_IC2F_2 0x4000 -#define TIM_CCMR1_IC2F_3 0x8000 - -#define TIM_CCMR2_CC3S 0x0003 -#define TIM_CCMR2_CC3S_0 0x0001 -#define TIM_CCMR2_CC3S_1 0x0002 - -#define TIM_CCMR2_OC3FE 0x0004 -#define TIM_CCMR2_OC3PE 0x0008 - -#define TIM_CCMR2_OC3M 0x0070 -#define TIM_CCMR2_OC3M_0 0x0010 -#define TIM_CCMR2_OC3M_1 0x0020 -#define TIM_CCMR2_OC3M_2 0x0040 - -#define TIM_CCMR2_OC3CE 0x0080 - -#define TIM_CCMR2_CC4S 0x0300 -#define TIM_CCMR2_CC4S_0 0x0100 -#define TIM_CCMR2_CC4S_1 0x0200 - -#define TIM_CCMR2_OC4FE 0x0400 -#define TIM_CCMR2_OC4PE 0x0800 - -#define TIM_CCMR2_OC4M 0x7000 -#define TIM_CCMR2_OC4M_0 0x1000 -#define TIM_CCMR2_OC4M_1 0x2000 -#define TIM_CCMR2_OC4M_2 0x4000 - -#define TIM_CCMR2_OC4CE 0x8000 - - -#define TIM_CCMR2_IC3PSC 0x000C -#define TIM_CCMR2_IC3PSC_0 0x0004 -#define TIM_CCMR2_IC3PSC_1 0x0008 - -#define TIM_CCMR2_IC3F 0x00F0 -#define TIM_CCMR2_IC3F_0 0x0010 -#define TIM_CCMR2_IC3F_1 0x0020 -#define TIM_CCMR2_IC3F_2 0x0040 -#define TIM_CCMR2_IC3F_3 0x0080 - -#define TIM_CCMR2_IC4PSC 0x0C00 -#define TIM_CCMR2_IC4PSC_0 0x0400 -#define TIM_CCMR2_IC4PSC_1 0x0800 - -#define TIM_CCMR2_IC4F 0xF000 -#define TIM_CCMR2_IC4F_0 0x1000 -#define TIM_CCMR2_IC4F_1 0x2000 -#define TIM_CCMR2_IC4F_2 0x4000 -#define TIM_CCMR2_IC4F_3 0x8000 - -#define TIM_CCER_CC1E 0x0001 -#define TIM_CCER_CC1P 0x0002 -#define TIM_CCER_CC1NE 0x0004 -#define TIM_CCER_CC1NP 0x0008 -#define TIM_CCER_CC2E 0x0010 -#define TIM_CCER_CC2P 0x0020 -#define TIM_CCER_CC2NE 0x0040 -#define TIM_CCER_CC2NP 0x0080 -#define TIM_CCER_CC3E 0x0100 -#define TIM_CCER_CC3P 0x0200 -#define TIM_CCER_CC3NE 0x0400 -#define TIM_CCER_CC3NP 0x0800 -#define TIM_CCER_CC4E 0x1000 -#define TIM_CCER_CC4P 0x2000 - -#define TIM_CNT_CNT 0xFFFF - -#define TIM_PSC_PSC 0xFFFF - -#define TIM_ARR_ARR 0xFFFF - -#define TIM_RCR_REP 0xFF - -#define TIM_CCR1_CCR1 0xFFFF -#define TIM_CCR2_CCR2 0xFFFF -#define TIM_CCR3_CCR3 0xFFFF -#define TIM_CCR4_CCR4 0xFFFF - -#define TIM_BDTR_DTG 0x00FF -#define TIM_BDTR_DTG_0 0x0001 -#define TIM_BDTR_DTG_1 0x0002 -#define TIM_BDTR_DTG_2 0x0004 -#define TIM_BDTR_DTG_3 0x0008 -#define TIM_BDTR_DTG_4 0x0010 -#define TIM_BDTR_DTG_5 0x0020 -#define TIM_BDTR_DTG_6 0x0040 -#define TIM_BDTR_DTG_7 0x0080 - -#define TIM_BDTR_LOCK 0x0300 -#define TIM_BDTR_LOCK_0 0x0100 -#define TIM_BDTR_LOCK_1 0x0200 - -#define TIM_BDTR_OSSI 0x0400 -#define TIM_BDTR_OSSR 0x0800 -#define TIM_BDTR_BKE 0x1000 -#define TIM_BDTR_BKP 0x2000 -#define TIM_BDTR_AOE 0x4000 -#define TIM_BDTR_MOE 0x8000 - -#define TIM_DCR_DBA 0x001F -#define TIM_DCR_DBA_0 0x0001 -#define TIM_DCR_DBA_1 0x0002 -#define TIM_DCR_DBA_2 0x0004 -#define TIM_DCR_DBA_3 0x0008 -#define TIM_DCR_DBA_4 0x0010 - -#define TIM_DCR_DBL 0x1F00 -#define TIM_DCR_DBL_0 0x0100 -#define TIM_DCR_DBL_1 0x0200 -#define TIM_DCR_DBL_2 0x0400 -#define TIM_DCR_DBL_3 0x0800 -#define TIM_DCR_DBL_4 0x1000 - -#define TIM_DMAR_DMAB 0xFFFF - -struct EXTI -{ - volatile uint32_t IMR; - volatile uint32_t EMR; - volatile uint32_t RTSR; - volatile uint32_t FTSR; - volatile uint32_t SWIER; - volatile uint32_t PR; -}; - -#define EXTI_BASE 0x40010400 -static struct EXTI *const EXTI = (struct EXTI *const)EXTI_BASE; - -#define EXTI_IMR_MR0 0x00000001 -#define EXTI_IMR_MR1 0x00000002 -#define EXTI_IMR_MR2 0x00000004 -#define EXTI_IMR_MR3 0x00000008 -#define EXTI_IMR_MR4 0x00000010 -#define EXTI_IMR_MR5 0x00000020 -#define EXTI_IMR_MR6 0x00000040 -#define EXTI_IMR_MR7 0x00000080 -#define EXTI_IMR_MR8 0x00000100 -#define EXTI_IMR_MR9 0x00000200 -#define EXTI_IMR_MR10 0x00000400 -#define EXTI_IMR_MR11 0x00000800 -#define EXTI_IMR_MR12 0x00001000 -#define EXTI_IMR_MR13 0x00002000 -#define EXTI_IMR_MR14 0x00004000 -#define EXTI_IMR_MR15 0x00008000 -#define EXTI_IMR_MR16 0x00010000 -#define EXTI_IMR_MR17 0x00020000 -#define EXTI_IMR_MR18 0x00040000 -#define EXTI_IMR_MR19 0x00080000 - -#define EXTI_EMR_MR0 0x00000001 -#define EXTI_EMR_MR1 0x00000002 -#define EXTI_EMR_MR2 0x00000004 -#define EXTI_EMR_MR3 0x00000008 -#define EXTI_EMR_MR4 0x00000010 -#define EXTI_EMR_MR5 0x00000020 -#define EXTI_EMR_MR6 0x00000040 -#define EXTI_EMR_MR7 0x00000080 -#define EXTI_EMR_MR8 0x00000100 -#define EXTI_EMR_MR9 0x00000200 -#define EXTI_EMR_MR10 0x00000400 -#define EXTI_EMR_MR11 0x00000800 -#define EXTI_EMR_MR12 0x00001000 -#define EXTI_EMR_MR13 0x00002000 -#define EXTI_EMR_MR14 0x00004000 -#define EXTI_EMR_MR15 0x00008000 -#define EXTI_EMR_MR16 0x00010000 -#define EXTI_EMR_MR17 0x00020000 -#define EXTI_EMR_MR18 0x00040000 -#define EXTI_EMR_MR19 0x00080000 - -#define EXTI_RTSR_TR0 0x00000001 -#define EXTI_RTSR_TR1 0x00000002 -#define EXTI_RTSR_TR2 0x00000004 -#define EXTI_RTSR_TR3 0x00000008 -#define EXTI_RTSR_TR4 0x00000010 -#define EXTI_RTSR_TR5 0x00000020 -#define EXTI_RTSR_TR6 0x00000040 -#define EXTI_RTSR_TR7 0x00000080 -#define EXTI_RTSR_TR8 0x00000100 -#define EXTI_RTSR_TR9 0x00000200 -#define EXTI_RTSR_TR10 0x00000400 -#define EXTI_RTSR_TR11 0x00000800 -#define EXTI_RTSR_TR12 0x00001000 -#define EXTI_RTSR_TR13 0x00002000 -#define EXTI_RTSR_TR14 0x00004000 -#define EXTI_RTSR_TR15 0x00008000 -#define EXTI_RTSR_TR16 0x00010000 -#define EXTI_RTSR_TR17 0x00020000 -#define EXTI_RTSR_TR18 0x00040000 -#define EXTI_RTSR_TR19 0x00080000 - -#define EXTI_FTSR_TR0 0x00000001 -#define EXTI_FTSR_TR1 0x00000002 -#define EXTI_FTSR_TR2 0x00000004 -#define EXTI_FTSR_TR3 0x00000008 -#define EXTI_FTSR_TR4 0x00000010 -#define EXTI_FTSR_TR5 0x00000020 -#define EXTI_FTSR_TR6 0x00000040 -#define EXTI_FTSR_TR7 0x00000080 -#define EXTI_FTSR_TR8 0x00000100 -#define EXTI_FTSR_TR9 0x00000200 -#define EXTI_FTSR_TR10 0x00000400 -#define EXTI_FTSR_TR11 0x00000800 -#define EXTI_FTSR_TR12 0x00001000 -#define EXTI_FTSR_TR13 0x00002000 -#define EXTI_FTSR_TR14 0x00004000 -#define EXTI_FTSR_TR15 0x00008000 -#define EXTI_FTSR_TR16 0x00010000 -#define EXTI_FTSR_TR17 0x00020000 -#define EXTI_FTSR_TR18 0x00040000 -#define EXTI_FTSR_TR19 0x00080000 - -#define EXTI_SWIER_SWIER0 0x00000001 -#define EXTI_SWIER_SWIER1 0x00000002 -#define EXTI_SWIER_SWIER2 0x00000004 -#define EXTI_SWIER_SWIER3 0x00000008 -#define EXTI_SWIER_SWIER4 0x00000010 -#define EXTI_SWIER_SWIER5 0x00000020 -#define EXTI_SWIER_SWIER6 0x00000040 -#define EXTI_SWIER_SWIER7 0x00000080 -#define EXTI_SWIER_SWIER8 0x00000100 -#define EXTI_SWIER_SWIER9 0x00000200 -#define EXTI_SWIER_SWIER10 0x00000400 -#define EXTI_SWIER_SWIER11 0x00000800 -#define EXTI_SWIER_SWIER12 0x00001000 -#define EXTI_SWIER_SWIER13 0x00002000 -#define EXTI_SWIER_SWIER14 0x00004000 -#define EXTI_SWIER_SWIER15 0x00008000 -#define EXTI_SWIER_SWIER16 0x00010000 -#define EXTI_SWIER_SWIER17 0x00020000 -#define EXTI_SWIER_SWIER18 0x00040000 -#define EXTI_SWIER_SWIER19 0x00080000 - -#define EXTI_PR_PR0 0x00000001 -#define EXTI_PR_PR1 0x00000002 -#define EXTI_PR_PR2 0x00000004 -#define EXTI_PR_PR3 0x00000008 -#define EXTI_PR_PR4 0x00000010 -#define EXTI_PR_PR5 0x00000020 -#define EXTI_PR_PR6 0x00000040 -#define EXTI_PR_PR7 0x00000080 -#define EXTI_PR_PR8 0x00000100 -#define EXTI_PR_PR9 0x00000200 -#define EXTI_PR_PR10 0x00000400 -#define EXTI_PR_PR11 0x00000800 -#define EXTI_PR_PR12 0x00001000 -#define EXTI_PR_PR13 0x00002000 -#define EXTI_PR_PR14 0x00004000 -#define EXTI_PR_PR15 0x00008000 -#define EXTI_PR_PR16 0x00010000 -#define EXTI_PR_PR17 0x00020000 -#define EXTI_PR_PR18 0x00040000 -#define EXTI_PR_PR19 0x00080000 - -#define EXTI0_IRQ 6 -#define EXTI1_IRQ 7 -#define EXTI2_IRQ 8 -#define EXTI9_5_IRQ 23 -#define TIM2_IRQ 28 -#define TIM3_IRQ 29 -#define TIM4_IRQ 30 - -struct AFIO -{ - volatile uint32_t EVCR; - volatile uint32_t MAPR; - volatile uint32_t EXTICR[4]; - uint32_t RESERVED0; - volatile uint32_t MAPR2; -}; - -#define AFIO_BASE 0x40010000 -static struct AFIO *const AFIO = (struct AFIO *const)AFIO_BASE; - -#define AFIO_EXTICR1_EXTI0_PA 0x0000 -#define AFIO_EXTICR1_EXTI0_PB 0x0001 -#define AFIO_EXTICR1_EXTI0_PC 0x0002 -#define AFIO_EXTICR1_EXTI0_PD 0x0003 - -#define AFIO_EXTICR1_EXTI1_PA 0x0000 -#define AFIO_EXTICR1_EXTI1_PB 0x0010 -#define AFIO_EXTICR1_EXTI1_PC 0x0020 -#define AFIO_EXTICR1_EXTI1_PD 0x0030 - -#define AFIO_EXTICR1_EXTI2_PA 0x0000 -#define AFIO_EXTICR1_EXTI2_PB 0x0100 -#define AFIO_EXTICR1_EXTI2_PC 0x0200 -#define AFIO_EXTICR1_EXTI2_PD 0x0300 - -#define AFIO_EXTICR1_EXTI3_PA 0x0000 -#define AFIO_EXTICR1_EXTI3_PB 0x1000 -#define AFIO_EXTICR1_EXTI3_PC 0x2000 -#define AFIO_EXTICR1_EXTI3_PD 0x3000 - -#define AFIO_EXTICR2_EXTI4_PA 0x0000 -#define AFIO_EXTICR2_EXTI4_PB 0x0001 -#define AFIO_EXTICR2_EXTI4_PC 0x0002 -#define AFIO_EXTICR2_EXTI4_PD 0x0003 - -#define AFIO_EXTICR2_EXTI5_PA 0x0000 -#define AFIO_EXTICR2_EXTI5_PB 0x0010 -#define AFIO_EXTICR2_EXTI5_PC 0x0020 -#define AFIO_EXTICR2_EXTI5_PD 0x0030 - -#define AFIO_EXTICR2_EXTI6_PA 0x0000 -#define AFIO_EXTICR2_EXTI6_PB 0x0100 -#define AFIO_EXTICR2_EXTI6_PC 0x0200 -#define AFIO_EXTICR2_EXTI6_PD 0x0300 - -#define AFIO_EXTICR2_EXTI7_PA 0x0000 -#define AFIO_EXTICR2_EXTI7_PB 0x1000 -#define AFIO_EXTICR2_EXTI7_PC 0x2000 -#define AFIO_EXTICR2_EXTI7_PD 0x3000 - -#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800 -#define AFIO_MAPR_SWJ_CFG_DISABLE 0x04000000 diff --git a/src/sys.c b/src/sys.c deleted file mode 100644 index 9ec3b06..0000000 --- a/src/sys.c +++ /dev/null @@ -1,394 +0,0 @@ -/* - * sys.c - system routines for the initial page for STM32F103. - * - * Copyright (C) 2013, 2014, 2015, 2016 Flying Stone Technology - * Author: NIIBE Yutaka - * - * Copying and distribution of this file, with or without modification, - * are permitted in any medium without royalty provided the copyright - * notice and this notice are preserved. This file is offered as-is, - * without any warranty. - * - * When the flash ROM is protected, we cannot modify the initial page. - * We put some system routines (which is useful for any program) here. - */ - -#include -#include -#include "board.h" - -#include "clk_gpio_init-stm32.c" - - -static void -usb_cable_config (int enable) -{ -#if defined(GPIO_USB_SET_TO_ENABLE) - if (enable) - GPIO_USB->BSRR = (1 << GPIO_USB_SET_TO_ENABLE); - else - GPIO_USB->BRR = (1 << GPIO_USB_SET_TO_ENABLE); -#elif defined(GPIO_USB_CLEAR_TO_ENABLE) - if (enable) - GPIO_USB->BRR = (1 << GPIO_USB_CLEAR_TO_ENABLE); - else - GPIO_USB->BSRR = (1 << GPIO_USB_CLEAR_TO_ENABLE); -#else - (void)enable; -#endif -} - -void -set_led (int on) -{ -#if defined(GPIO_LED_CLEAR_TO_EMIT) - if (on) - GPIO_LED->BRR = (1 << GPIO_LED_CLEAR_TO_EMIT); - else - GPIO_LED->BSRR = (1 << GPIO_LED_CLEAR_TO_EMIT); -#else - if (on) - GPIO_LED->BSRR = (1 << GPIO_LED_SET_TO_EMIT); - else - GPIO_LED->BRR = (1 << GPIO_LED_SET_TO_EMIT); -#endif -} - -static void wait (int count) -{ - int i; - - for (i = 0; i < count; i++) - asm volatile ("" : : "r" (i) : "memory"); -} - - -static void -usb_lld_sys_shutdown (void) -{ - RCC->APB1ENR &= ~RCC_APB1ENR_USBEN; - RCC->APB1RSTR = RCC_APB1RSTR_USBRST; - usb_cable_config (0); -} - -static void -usb_lld_sys_init (void) -{ - if ((RCC->APB1ENR & RCC_APB1ENR_USBEN) - && (RCC->APB1RSTR & RCC_APB1RSTR_USBRST) == 0) - /* Make sure the device is disconnected, even after core reset. */ - { - usb_lld_sys_shutdown (); - /* Disconnect requires SE0 (>= 2.5uS). */ - wait (300); - } - - usb_cable_config (1); - RCC->APB1ENR |= RCC_APB1ENR_USBEN; - RCC->APB1RSTR = RCC_APB1RSTR_USBRST; - RCC->APB1RSTR = 0; -} - -#define FLASH_KEY1 0x45670123UL -#define FLASH_KEY2 0xCDEF89ABUL - -enum flash_status -{ - FLASH_BUSY = 1, - FLASH_ERROR_PG, - FLASH_ERROR_WRP, - FLASH_COMPLETE, - FLASH_TIMEOUT -}; - -static void __attribute__ ((used)) -flash_unlock (void) -{ - FLASH->KEYR = FLASH_KEY1; - FLASH->KEYR = FLASH_KEY2; -} - - -#define intr_disable() asm volatile ("cpsid i" : : : "memory") -#define intr_enable() asm volatile ("cpsie i" : : : "memory") - -#define FLASH_SR_BSY 0x01 -#define FLASH_SR_PGERR 0x04 -#define FLASH_SR_WRPRTERR 0x10 -#define FLASH_SR_EOP 0x20 - -#define FLASH_CR_PG 0x0001 -#define FLASH_CR_PER 0x0002 -#define FLASH_CR_MER 0x0004 -#define FLASH_CR_OPTPG 0x0010 -#define FLASH_CR_OPTER 0x0020 -#define FLASH_CR_STRT 0x0040 -#define FLASH_CR_LOCK 0x0080 -#define FLASH_CR_OPTWRE 0x0200 -#define FLASH_CR_ERRIE 0x0400 -#define FLASH_CR_EOPIE 0x1000 - -static int -flash_wait_for_last_operation (uint32_t timeout) -{ - int status; - - do - { - status = FLASH->SR; - if (--timeout == 0) - break; - } - while ((status & FLASH_SR_BSY) != 0); - - return status & (FLASH_SR_BSY|FLASH_SR_PGERR|FLASH_SR_WRPRTERR); -} - -#define FLASH_PROGRAM_TIMEOUT 0x00010000 -#define FLASH_ERASE_TIMEOUT 0x01000000 - -static int -flash_program_halfword (uint32_t addr, uint16_t data) -{ - int status; - - status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT); - - intr_disable (); - if (status == 0) - { - FLASH->CR |= FLASH_CR_PG; - - *(volatile uint16_t *)addr = data; - - status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT); - FLASH->CR &= ~FLASH_CR_PG; - } - intr_enable (); - - return status; -} - -static int -flash_erase_page (uint32_t addr) -{ - int status; - - status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT); - - intr_disable (); - if (status == 0) - { - FLASH->CR |= FLASH_CR_PER; - FLASH->AR = addr; - FLASH->CR |= FLASH_CR_STRT; - - status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT); - FLASH->CR &= ~FLASH_CR_PER; - } - intr_enable (); - - return status; -} - -static int -flash_check_blank (const uint8_t *p_start, size_t size) -{ - const uint8_t *p; - - for (p = p_start; p < p_start + size; p++) - if (*p != 0xff) - return 0; - - return 1; -} - -#define FLASH_START_ADDR 0x08000000 /* Fixed for all STM32F1. */ -#define FLASH_OFFSET 0x1000 /* First pages are not-writable. */ -#define FLASH_START (FLASH_START_ADDR+FLASH_OFFSET) -#define CHIP_ID_REG ((uint32_t *)0xe0042000) -#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7e0) - -static int -flash_write (uint32_t dst_addr, const uint8_t *src, size_t len) -{ - int status; - uint32_t flash_end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024; - - if (dst_addr < FLASH_START || dst_addr + len > flash_end) - return 0; - - while (len) - { - uint16_t hw = *src++; - - hw |= (*src++ << 8); - status = flash_program_halfword (dst_addr, hw); - if (status != 0) - return 0; /* error return */ - - dst_addr += 2; - len -= 2; - } - - return 1; -} - -#define OPTION_BYTES_ADDR 0x1ffff800 - -static int -flash_protect (void) -{ - int status; - uint32_t option_bytes_value; - - status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT); - - intr_disable (); - if (status == 0) - { - FLASH->OPTKEYR = FLASH_KEY1; - FLASH->OPTKEYR = FLASH_KEY2; - - FLASH->CR |= FLASH_CR_OPTER; - FLASH->CR |= FLASH_CR_STRT; - - status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT); - FLASH->CR &= ~FLASH_CR_OPTER; - } - intr_enable (); - - if (status != 0) - return 0; - - option_bytes_value = *(uint32_t *)OPTION_BYTES_ADDR; - return (option_bytes_value & 0xff) == 0xff ? 1 : 0; -} - -static void __attribute__((naked)) -flash_erase_all_and_exec (void (*entry)(void)) -{ - uint32_t addr = FLASH_START; - uint32_t end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024; - uint32_t page_size = 1024; - int r; - - if (((*CHIP_ID_REG) & 0xfff) == 0x0414) - page_size = 2048; - - while (addr < end) - { - r = flash_erase_page (addr); - if (r != 0) - break; - - addr += page_size; - } - - if (addr >= end) - (*entry) (); - - for (;;); -} - -struct SCB -{ - volatile uint32_t CPUID; - volatile uint32_t ICSR; - volatile uint32_t VTOR; - volatile uint32_t AIRCR; - volatile uint32_t SCR; - volatile uint32_t CCR; - volatile uint8_t SHP[12]; - volatile uint32_t SHCSR; - volatile uint32_t CFSR; - volatile uint32_t HFSR; - volatile uint32_t DFSR; - volatile uint32_t MMFAR; - volatile uint32_t BFAR; - volatile uint32_t AFSR; - volatile uint32_t PFR[2]; - volatile uint32_t DFR; - volatile uint32_t ADR; - volatile uint32_t MMFR[4]; - volatile uint32_t ISAR[5]; -}; - -#define SCS_BASE (0xE000E000) -#define SCB_BASE (SCS_BASE + 0x0D00) -static struct SCB *const SCB = ((struct SCB *const) SCB_BASE); - -#define SYSRESETREQ 0x04 -static void -nvic_system_reset (void) -{ - SCB->AIRCR = (0x05FA0000 | (SCB->AIRCR & 0x70) | SYSRESETREQ); - asm volatile ("dsb"); - for (;;); -} - -static void __attribute__ ((naked)) -reset (void) -{ - extern const unsigned long *FT0, *FT1, *FT2; - - /* - * This code may not be at the start of flash ROM, because of DFU. - * So, we take the address from PC. - */ - asm volatile ("cpsid i\n\t" /* Mask all interrupts. */ - "ldr r0, 1f\n\t" /* r0 = SCR */ - "mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */ - "mov r2, #0x1000\n\t" - "add r1, r1, r2\n\t" - "sub r2, r2, #1\n\t" - "bic r1, r1, r2\n\t" - "str r1, [r0, #8]\n\t" /* Set SCR->VCR */ - "ldr r0, [r1], #4\n\t" - "msr MSP, r0\n\t" /* Main (exception handler) stack. */ - "ldr r0, [r1]\n\t" /* Reset handler. */ - "bx r0\n\t" - ".align 2\n" - "1: .word 0xe000ed00" - : /* no output */ : /* no input */ : "memory"); - - /* Never reach here. */ - /* Artificial entry to refer FT0, FT1, and FT2. */ - asm volatile ("" - : : "r" (FT0), "r" (FT1), "r" (FT2)); -} - -typedef void (*handler)(void); -extern uint8_t __ram_end__; - -handler vector[] __attribute__ ((section(".vectors"))) = { - (handler)&__ram_end__, - reset, - (handler)set_led, - flash_unlock, - (handler)flash_program_halfword, - (handler)flash_erase_page, - (handler)flash_check_blank, - (handler)flash_write, - (handler)flash_protect, - (handler)flash_erase_all_and_exec, - usb_lld_sys_init, - usb_lld_sys_shutdown, - nvic_system_reset, - clock_init, - gpio_init, - NULL, -}; - -const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = { - 3*2+2, /* bLength */ - 0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */ - /* sys version: "3.0" */ - '3', 0, '.', 0, '0', 0, -}; - -const uint32_t __attribute__((section(".sys.board_id"))) -sys_board_id = BOARD_ID; - -const uint8_t __attribute__((section(".sys.board_name"))) -sys_board_name[] = BOARD_NAME; diff --git a/src/usb_stm32f103.c b/src/usb_stm32f103.c deleted file mode 100644 index 80fbcc7..0000000 --- a/src/usb_stm32f103.c +++ /dev/null @@ -1,1127 +0,0 @@ -#include -#include - -#include "sys.h" -#include "usb_lld.h" - -#define USB_MAX_PACKET_SIZE 64 /* For FS device */ - -enum STANDARD_REQUESTS -{ - GET_STATUS = 0, - CLEAR_FEATURE, - RESERVED1, - SET_FEATURE, - RESERVED2, - SET_ADDRESS, - GET_DESCRIPTOR, - SET_DESCRIPTOR, - GET_CONFIGURATION, - SET_CONFIGURATION, - GET_INTERFACE, - SET_INTERFACE, - SYNCH_FRAME, - TOTAL_REQUEST /* Total number of Standard request */ -}; - -/* The state machine states of a control pipe */ -enum CONTROL_STATE -{ - WAIT_SETUP, - SETTING_UP, - IN_DATA, - OUT_DATA, - LAST_IN_DATA, - WAIT_STATUS_IN, - WAIT_STATUS_OUT, - STALLED, - PAUSE -}; - -enum FEATURE_SELECTOR -{ - ENDPOINT_STALL, - DEVICE_REMOTE_WAKEUP -}; - -struct DATA_INFO -{ - uint8_t *addr; - uint16_t len; - uint8_t require_zlp; -}; - - -struct DEVICE_INFO -{ - uint8_t current_configuration; - uint8_t current_feature; - uint8_t state; - /**/ - uint8_t bmRequestType; - uint8_t bRequest; - /**/ - uint16_t value; - uint16_t index; - uint16_t len; -}; - -static struct DEVICE_INFO device_info; -static struct DATA_INFO data_info; - -static struct DEVICE_INFO *const dev_p = &device_info; -static struct DATA_INFO *const data_p = &data_info; - -#define REG_BASE (0x40005C00UL) /* USB_IP Peripheral Registers base address */ -#define PMA_ADDR (0x40006000UL) /* USB_IP Packet Memory Area base address */ - -/* Control register */ -#define CNTR ((volatile uint16_t *)(REG_BASE + 0x40)) -/* Interrupt status register */ -#define ISTR ((volatile uint16_t *)(REG_BASE + 0x44)) -/* Frame number register */ -#define FNR ((volatile uint16_t *)(REG_BASE + 0x48)) -/* Device address register */ -#define DADDR ((volatile uint16_t *)(REG_BASE + 0x4C)) -/* Buffer Table address register */ -#define BTABLE ((volatile uint16_t *)(REG_BASE + 0x50)) - -#define ISTR_CTR (0x8000) /* Correct TRansfer (read-only bit) */ -#define ISTR_OVR (0x4000) /* OVeR/underrun (clear-only bit) */ -#define ISTR_ERR (0x2000) /* ERRor (clear-only bit) */ -#define ISTR_WKUP (0x1000) /* WaKe UP (clear-only bit) */ -#define ISTR_SUSP (0x0800) /* SUSPend (clear-only bit) */ -#define ISTR_RESET (0x0400) /* RESET (clear-only bit) */ -#define ISTR_SOF (0x0200) /* Start Of Frame (clear-only bit) */ -#define ISTR_ESOF (0x0100) /* Expected Start Of Frame (clear-only bit) */ - -#define ISTR_DIR (0x0010) /* DIRection of transaction (read-only bit) */ -#define ISTR_EP_ID (0x000F) /* EndPoint IDentifier (read-only bit) */ - -#define CLR_OVR (~ISTR_OVR) /* clear OVeR/underrun bit*/ -#define CLR_ERR (~ISTR_ERR) /* clear ERRor bit */ -#define CLR_WKUP (~ISTR_WKUP) /* clear WaKe UP bit */ -#define CLR_SUSP (~ISTR_SUSP) /* clear SUSPend bit */ -#define CLR_RESET (~ISTR_RESET) /* clear RESET bit */ -#define CLR_SOF (~ISTR_SOF) /* clear Start Of Frame bit */ -#define CLR_ESOF (~ISTR_ESOF) /* clear Expected Start Of Frame bit */ - -#define CNTR_CTRM (0x8000) /* Correct TRansfer Mask */ -#define CNTR_OVRM (0x4000) /* OVeR/underrun Mask */ -#define CNTR_ERRM (0x2000) /* ERRor Mask */ -#define CNTR_WKUPM (0x1000) /* WaKe UP Mask */ -#define CNTR_SUSPM (0x0800) /* SUSPend Mask */ -#define CNTR_RESETM (0x0400) /* RESET Mask */ -#define CNTR_SOFM (0x0200) /* Start Of Frame Mask */ -#define CNTR_ESOFM (0x0100) /* Expected Start Of Frame Mask */ - -#define CNTR_RESUME (0x0010) /* RESUME request */ -#define CNTR_FSUSP (0x0008) /* Force SUSPend */ -#define CNTR_LPMODE (0x0004) /* Low-power MODE */ -#define CNTR_PDWN (0x0002) /* Power DoWN */ -#define CNTR_FRES (0x0001) /* Force USB RESet */ - -#define DADDR_EF (0x80) -#define DADDR_ADD (0x7F) - -#define EP_CTR_RX (0x8000) /* EndPoint Correct TRansfer RX */ -#define EP_DTOG_RX (0x4000) /* EndPoint Data TOGGLE RX */ -#define EPRX_STAT (0x3000) /* EndPoint RX STATus bit field */ -#define EP_SETUP (0x0800) /* EndPoint SETUP */ -#define EP_T_FIELD (0x0600) /* EndPoint TYPE */ -#define EP_KIND (0x0100) /* EndPoint KIND */ -#define EP_CTR_TX (0x0080) /* EndPoint Correct TRansfer TX */ -#define EP_DTOG_TX (0x0040) /* EndPoint Data TOGGLE TX */ -#define EPTX_STAT (0x0030) /* EndPoint TX STATus bit field */ -#define EPADDR_FIELD (0x000F) /* EndPoint ADDRess FIELD */ - -#define EPREG_MASK (EP_CTR_RX|EP_SETUP|EP_T_FIELD|EP_KIND|EP_CTR_TX|EPADDR_FIELD) - -/* STAT_TX[1:0] STATus for TX transfer */ -#define EP_TX_DIS (0x0000) /* EndPoint TX DISabled */ -#define EP_TX_STALL (0x0010) /* EndPoint TX STALLed */ -#define EP_TX_NAK (0x0020) /* EndPoint TX NAKed */ -#define EP_TX_VALID (0x0030) /* EndPoint TX VALID */ -#define EPTX_DTOG1 (0x0010) /* EndPoint TX Data TOGgle bit1 */ -#define EPTX_DTOG2 (0x0020) /* EndPoint TX Data TOGgle bit2 */ - -/* STAT_RX[1:0] STATus for RX transfer */ -#define EP_RX_DIS (0x0000) /* EndPoint RX DISabled */ -#define EP_RX_STALL (0x1000) /* EndPoint RX STALLed */ -#define EP_RX_NAK (0x2000) /* EndPoint RX NAKed */ -#define EP_RX_VALID (0x3000) /* EndPoint RX VALID */ -#define EPRX_DTOG1 (0x1000) /* EndPoint RX Data TOGgle bit1 */ -#define EPRX_DTOG2 (0x2000) /* EndPoint RX Data TOGgle bit1 */ - -static void usb_handle_transfer (uint16_t istr_value); - -static void st103_set_btable (void) -{ - *BTABLE = 0; -} - -static uint16_t st103_get_istr (void) -{ - return *ISTR; -} - -static void st103_set_istr (uint16_t istr) -{ - *ISTR = istr; -} - -static void st103_set_cntr (uint16_t cntr) -{ - *CNTR = cntr; -} - -static void st103_set_daddr (uint16_t daddr) -{ - *DADDR = daddr | DADDR_EF; -} - -static void st103_set_epreg (uint8_t ep_num, uint16_t value) -{ - uint16_t *reg_p = (uint16_t *)(REG_BASE + ep_num*4); - - *reg_p = value; -} - -static uint16_t st103_get_epreg (uint8_t ep_num) -{ - uint16_t *reg_p = (uint16_t *)(REG_BASE + ep_num*4); - - return *reg_p; -} - -static void st103_set_tx_addr (uint8_t ep_num, uint16_t addr) -{ - uint16_t *reg_p = (uint16_t *)(PMA_ADDR + (ep_num*8+0)*2); - - *reg_p = addr; -} - -static uint16_t st103_get_tx_addr (uint8_t ep_num) -{ - uint16_t *reg_p = (uint16_t *)(PMA_ADDR + (ep_num*8+0)*2); - - return *reg_p; -} - - -static void st103_set_tx_count (uint8_t ep_num, uint16_t size) -{ - uint16_t *reg_p = (uint16_t *)(PMA_ADDR + (ep_num*8+2)*2); - - *reg_p = size; -} - -static uint16_t st103_get_tx_count (uint8_t ep_num) -{ - uint16_t *reg_p = (uint16_t *)(PMA_ADDR + (ep_num*8+2)*2); - - return *reg_p & 0x03ff; -} - - -static void st103_set_rx_addr (uint8_t ep_num, uint16_t addr) -{ - uint16_t *reg_p = (uint16_t *)(PMA_ADDR + (ep_num*8+4)*2); - - *reg_p = addr; -} - -static uint16_t st103_get_rx_addr (uint8_t ep_num) -{ - uint16_t *reg_p = (uint16_t *)(PMA_ADDR + (ep_num*8+4)*2); - - return *reg_p; -} - - -static void st103_set_rx_buf_size (uint8_t ep_num, uint16_t size) -{ /* Assume size is even */ - uint16_t *reg_p = (uint16_t *)(PMA_ADDR + (ep_num*8+6)*2); - uint16_t value; - - if (size <= 62) - value = (size & 0x3e) << 9; - else - value = 0x8000 | (((size >> 5) - 1) << 10); - - *reg_p = value; -} - -static uint16_t st103_get_rx_count (uint8_t ep_num) -{ - uint16_t *reg_p = (uint16_t *)(PMA_ADDR + (ep_num*8+6)*2); - - return *reg_p & 0x03ff; -} - - -static void st103_ep_clear_ctr_rx (uint8_t ep_num) -{ - uint16_t value = st103_get_epreg (ep_num) & ~EP_CTR_RX & EPREG_MASK; - - st103_set_epreg (ep_num, value); -} - -static void st103_ep_clear_ctr_tx (uint8_t ep_num) -{ - uint16_t value = st103_get_epreg (ep_num) & ~EP_CTR_TX & EPREG_MASK; - - st103_set_epreg (ep_num, value); -} - -static void st103_ep_set_rxtx_status (uint8_t ep_num, uint16_t st_rx, - uint16_t st_tx) -{ - uint16_t value = st103_get_epreg (ep_num); - - value &= (EPREG_MASK|EPRX_STAT|EPTX_STAT); - value ^= (EPRX_DTOG1 & st_rx); - value ^= (EPRX_DTOG2 & st_rx); - value ^= (EPTX_DTOG1 & st_tx); - value ^= (EPTX_DTOG2 & st_tx); - value |= EP_CTR_RX | EP_CTR_TX; - st103_set_epreg (ep_num, value); -} - -static void st103_ep_set_rx_status (uint8_t ep_num, uint16_t st_rx) -{ - uint16_t value = st103_get_epreg (ep_num); - - value &= (EPREG_MASK|EPRX_STAT); - value ^= (EPRX_DTOG1 & st_rx); - value ^= (EPRX_DTOG2 & st_rx); - value |= EP_CTR_RX | EP_CTR_TX; - st103_set_epreg (ep_num, value); -} - -static uint16_t st103_ep_get_rx_status (uint8_t ep_num) -{ - uint16_t value = st103_get_epreg (ep_num); - - return value & EPRX_STAT; -} - -static void st103_ep_set_tx_status (uint8_t ep_num, uint16_t st_tx) -{ - uint16_t value = st103_get_epreg (ep_num); - - value &= (EPREG_MASK|EPTX_STAT); - value ^= (EPTX_DTOG1 & st_tx); - value ^= (EPTX_DTOG2 & st_tx); - value |= EP_CTR_RX | EP_CTR_TX; - st103_set_epreg (ep_num, value); -} - -static uint16_t st103_ep_get_tx_status (uint8_t ep_num) -{ - uint16_t value = st103_get_epreg (ep_num); - - return value & EPTX_STAT; -} - -static void st103_ep_clear_dtog_rx (uint8_t ep_num) -{ - uint16_t value = st103_get_epreg (ep_num); - - if ((value & EP_DTOG_RX)) - { - value &= EPREG_MASK; - value |= EP_CTR_RX | EP_CTR_TX | EP_DTOG_RX; - st103_set_epreg (ep_num, value); - } -} - -static void st103_ep_clear_dtog_tx (uint8_t ep_num) -{ - uint16_t value = st103_get_epreg (ep_num); - - if ((value & EP_DTOG_TX)) - { - value &= EPREG_MASK; - value |= EP_CTR_RX | EP_CTR_TX | EP_DTOG_TX; - st103_set_epreg (ep_num, value); - } -} - -void usb_lld_init (uint8_t feature) -{ - usb_lld_sys_init (); - - dev_p->state = IN_DATA; - - usb_lld_set_configuration (0); - dev_p->current_feature = feature; - - /* Reset USB */ - st103_set_cntr (CNTR_FRES); - st103_set_cntr (0); - - /* Clear Interrupt Status Register, and enable interrupt for USB */ - st103_set_istr (0); - st103_set_cntr (CNTR_CTRM | CNTR_RESETM); -} - -void usb_lld_prepare_shutdown (void) -{ - st103_set_istr (0); - st103_set_cntr (0); -} - -void usb_lld_shutdown (void) -{ - st103_set_cntr (CNTR_PDWN); - usb_lld_sys_shutdown (); -} - -void -usb_interrupt_handler (void) -{ - uint16_t istr_value = st103_get_istr (); - - if ((istr_value & ISTR_RESET)) - { - st103_set_istr (CLR_RESET); - usb_cb_device_reset (); - } - else - { - if ((istr_value & ISTR_OVR)) - st103_set_istr (CLR_OVR); - - if ((istr_value & ISTR_ERR)) - st103_set_istr (CLR_ERR); - - if ((istr_value & ISTR_CTR)) - usb_handle_transfer (istr_value); - } -} - -static void handle_datastage_out (void) -{ - if (data_p->addr && data_p->len) - { - uint32_t len = st103_get_rx_count (ENDP0); - - if (len > data_p->len) - len = data_p->len; - - usb_lld_from_pmabuf (data_p->addr, st103_get_rx_addr (ENDP0), len); - data_p->len -= len; - data_p->addr += len; - } - - if (data_p->len == 0) - { - dev_p->state = WAIT_STATUS_IN; - st103_set_tx_count (ENDP0, 0); - st103_ep_set_rxtx_status (ENDP0, EP_RX_STALL, EP_TX_VALID); - } - else - { - dev_p->state = OUT_DATA; - st103_ep_set_rx_status (ENDP0, EP_RX_VALID); - } -} - -static void handle_datastage_in (void) -{ - uint32_t len = USB_MAX_PACKET_SIZE;; - - if ((data_p->len == 0) && (dev_p->state == LAST_IN_DATA)) - { - if (data_p->require_zlp) - { - data_p->require_zlp = 0; - - /* No more data to send. Send empty packet */ - st103_set_tx_count (ENDP0, 0); - st103_ep_set_rxtx_status (ENDP0, EP_RX_VALID, EP_TX_VALID); - } - else - { - /* No more data to send, proceed to receive OUT acknowledge.*/ - dev_p->state = WAIT_STATUS_OUT; - st103_ep_set_rxtx_status (ENDP0, EP_RX_VALID, EP_TX_STALL); - } - - return; - } - - dev_p->state = (data_p->len <= len) ? LAST_IN_DATA : IN_DATA; - - if (len > data_p->len) - len = data_p->len; - - usb_lld_to_pmabuf (data_p->addr, st103_get_tx_addr (ENDP0), len); - data_p->len -= len; - data_p->addr += len; - st103_set_tx_count (ENDP0, len); - st103_ep_set_tx_status (ENDP0, EP_TX_VALID); -} - -typedef int (*HANDLER) (uint8_t req, struct req_args *arg); - -static int std_none (uint8_t req, struct req_args *arg) -{ - (void)req; (void)arg; - return USB_UNSUPPORT; -} - -static int std_get_status (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - uint16_t status_info = 0; - - if (arg->value != 0 || arg->len != 2 || (arg->index >> 8) != 0 - || USB_SETUP_SET (req)) - return USB_UNSUPPORT; - - if (rcp == DEVICE_RECIPIENT) - { - if (arg->index == 0) - { - /* Get Device Status */ - uint8_t feature = dev_p->current_feature; - - /* Remote Wakeup enabled */ - if ((feature & (1 << 5))) - status_info |= 2; - else - status_info &= ~2; - - /* Bus-powered */ - if ((feature & (1 << 6))) - status_info |= 1; - else /* Self-powered */ - status_info &= ~1; - - return usb_lld_reply_request (&status_info, 2, arg); - } - } - else if (rcp == INTERFACE_RECIPIENT) - { - int r; - - if (dev_p->current_configuration == 0) - return USB_UNSUPPORT; - - r = usb_cb_interface (USB_QUERY_INTERFACE, arg); - if (r != USB_SUCCESS) - return USB_UNSUPPORT; - - return usb_lld_reply_request (&status_info, 2, arg); - } - else if (rcp == ENDPOINT_RECIPIENT) - { - uint8_t endpoint = (arg->index & 0x0f); - uint16_t status; - - if ((arg->index & 0x70) || endpoint == ENDP0) - return USB_UNSUPPORT; - - if ((arg->index & 0x80)) - { - status = st103_ep_get_tx_status (endpoint); - if (status == 0) /* Disabled */ - return USB_UNSUPPORT; - else if (status == EP_TX_STALL) - status_info |= 1; /* IN Endpoint stalled */ - } - else - { - status = st103_ep_get_rx_status (endpoint); - if (status == 0) /* Disabled */ - return USB_UNSUPPORT; - else if (status == EP_RX_STALL) - status_info |= 1; /* OUT Endpoint stalled */ - } - - return usb_lld_reply_request (&status_info, 2, arg); - } - - return USB_UNSUPPORT; -} - -static int std_clear_feature (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - - if (USB_SETUP_GET (req)) - return USB_UNSUPPORT; - - if (rcp == DEVICE_RECIPIENT) - { - if (arg->len != 0 || arg->index != 0) - return USB_UNSUPPORT; - - if (arg->value == DEVICE_REMOTE_WAKEUP) - { - dev_p->current_feature &= ~(1 << 5); - return USB_SUCCESS; - } - } - else if (rcp == ENDPOINT_RECIPIENT) - { - uint8_t endpoint = (arg->index & 0x0f); - uint16_t status; - - if (dev_p->current_configuration == 0) - return USB_UNSUPPORT; - - if (arg->len != 0 || (arg->index >> 8) != 0 - || arg->value != ENDPOINT_STALL || endpoint == ENDP0) - return USB_UNSUPPORT; - - if ((arg->index & 0x80)) - status = st103_ep_get_tx_status (endpoint); - else - status = st103_ep_get_rx_status (endpoint); - - if (status == 0) /* Disabled */ - return USB_UNSUPPORT; - - if (arg->index & 0x80) /* IN endpoint */ - st103_ep_clear_dtog_tx (endpoint); - else /* OUT endpoint */ - st103_ep_clear_dtog_rx (endpoint); - - // event?? - return USB_SUCCESS; - } - - return USB_UNSUPPORT; -} - -static int std_set_feature (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - - if (USB_SETUP_GET (req)) - return USB_UNSUPPORT; - - if (rcp == DEVICE_RECIPIENT) - { - if (arg->len != 0 || arg->index != 0) - return USB_UNSUPPORT; - - if (arg->value == DEVICE_REMOTE_WAKEUP) - { - dev_p->current_feature |= 1 << 5; - // event?? - return USB_SUCCESS; - } - } - else if (rcp == ENDPOINT_RECIPIENT) - { - uint8_t endpoint = (arg->index & 0x0f); - uint32_t status; - - if (dev_p->current_configuration == 0) - return USB_UNSUPPORT; - - if (arg->len != 0 || (arg->index >> 8) != 0 - || arg->value != 0 || endpoint == ENDP0) - return USB_UNSUPPORT; - - if ((arg->index & 0x80)) - status = st103_ep_get_tx_status (endpoint); - else - status = st103_ep_get_rx_status (endpoint); - - if (status == 0) /* Disabled */ - return USB_UNSUPPORT; - - if (arg->index & 0x80) - /* IN endpoint */ - st103_ep_set_tx_status (endpoint, EP_TX_STALL); - else - /* OUT endpoint */ - st103_ep_set_rx_status (endpoint, EP_RX_STALL); - - // event?? - return USB_SUCCESS; - } - - return USB_UNSUPPORT; -} - -static int std_set_address (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - - if (USB_SETUP_GET (req)) - return USB_UNSUPPORT; - - if (rcp == DEVICE_RECIPIENT && arg->len == 0 && arg->value <= 127 - && arg->index == 0 && dev_p->current_configuration == 0) - return USB_SUCCESS; - - return USB_UNSUPPORT; -} - -static int std_get_descriptor (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - - if (USB_SETUP_SET (req)) - return USB_UNSUPPORT; - - return usb_cb_get_descriptor (rcp, (arg->value >> 8), - (arg->value & 0xff), arg); -} - -static int std_get_configuration (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - - if (USB_SETUP_SET (req)) - return USB_UNSUPPORT; - - if (rcp == DEVICE_RECIPIENT) - return usb_lld_reply_request (&dev_p->current_configuration, 1, arg); - - return USB_UNSUPPORT; -} - -static int std_set_configuration (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - - if (USB_SETUP_GET (req)) - return USB_UNSUPPORT; - - if (rcp == DEVICE_RECIPIENT && arg->index == 0 && arg->len == 0) - return usb_cb_handle_event (USB_EVENT_CONFIG, arg->value); - - return USB_UNSUPPORT; -} - -static int std_get_interface (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - - if (USB_SETUP_SET (req)) - return USB_UNSUPPORT; - - if (rcp == INTERFACE_RECIPIENT) - { - if (arg->value != 0 || (arg->index >> 8) != 0 || arg->len != 1) - return USB_UNSUPPORT; - - if (dev_p->current_configuration == 0) - return USB_UNSUPPORT; - - return usb_cb_interface (USB_GET_INTERFACE, arg); - } - - return USB_UNSUPPORT; -} - -static int std_set_interface (uint8_t req, struct req_args *arg) -{ - uint8_t rcp = req & RECIPIENT; - - if (USB_SETUP_GET (req) || rcp != INTERFACE_RECIPIENT - || arg->len != 0 || (arg->index >> 8) != 0 - || (arg->value >> 8) != 0 || dev_p->current_configuration == 0) - return USB_UNSUPPORT; - - return usb_cb_interface (USB_SET_INTERFACE, arg); -} - - -static void handle_setup0 (void) -{ - const uint16_t *pw; - uint16_t w; - uint8_t req_no; - int r = USB_UNSUPPORT; - HANDLER handler; - - pw = (uint16_t *)(PMA_ADDR + (uint8_t *)(st103_get_rx_addr (ENDP0) * 2)); - w = *pw++; - - dev_p->bmRequestType = w & 0xff; - dev_p->bRequest = req_no = w >> 8; - pw++; - dev_p->value = *pw++; - pw++; - dev_p->index = *pw++; - pw++; - dev_p->len = *pw; - - data_p->addr = NULL; - data_p->len = 0; - data_p->require_zlp = 0; - - if ((dev_p->bmRequestType & REQUEST_TYPE) == STANDARD_REQUEST) - { - if (req_no < TOTAL_REQUEST) - { - switch (req_no) - { - case 0: handler = std_get_status; break; - case 1: handler = std_clear_feature; break; - case 3: handler = std_set_feature; break; - case 5: handler = std_set_address; break; - case 6: handler = std_get_descriptor; break; - case 8: handler = std_get_configuration; break; - case 9: handler = std_set_configuration; break; - case 10: handler = std_get_interface; break; - case 11: handler = std_set_interface; break; - default: handler = std_none; break; - } - - r = (*handler) (dev_p->bmRequestType, - (struct req_args *)&dev_p->value); - } - } - else - r = usb_cb_setup (dev_p->bmRequestType, req_no, - (struct req_args *)&dev_p->value); - - if (r != USB_SUCCESS) - dev_p->state = STALLED; - else - { - if (USB_SETUP_SET (dev_p->bmRequestType)) - { - if (dev_p->len == 0) - { - dev_p->state = WAIT_STATUS_IN; - st103_set_tx_count (ENDP0, 0); - st103_ep_set_rxtx_status (ENDP0, EP_RX_STALL, EP_TX_VALID); - } - else - { - dev_p->state = OUT_DATA; - st103_ep_set_rx_status (ENDP0, EP_RX_VALID); - } - } - } -} - -static void handle_in0 (void) -{ - if (dev_p->state == IN_DATA || dev_p->state == LAST_IN_DATA) - handle_datastage_in (); - else if (dev_p->state == WAIT_STATUS_IN) - { - if ((dev_p->bRequest == SET_ADDRESS) && - ((dev_p->bmRequestType & (REQUEST_TYPE | RECIPIENT)) - == (STANDARD_REQUEST | DEVICE_RECIPIENT))) - { - st103_set_daddr (dev_p->value); - usb_cb_handle_event (USB_EVENT_ADDRESS, dev_p->value); - } - else - usb_cb_ctrl_write_finish (dev_p->bmRequestType, dev_p->bRequest, - (struct req_args *)&dev_p->value); - - dev_p->state = STALLED; - } - else - dev_p->state = STALLED; -} - -static void handle_out0 (void) -{ - if (dev_p->state == IN_DATA || dev_p->state == LAST_IN_DATA) - /* host aborts the transfer before finish */ - dev_p->state = STALLED; - else if (dev_p->state == OUT_DATA) - handle_datastage_out (); - else if (dev_p->state == WAIT_STATUS_OUT) - dev_p->state = STALLED; - /* Unexpect state, STALL the endpoint */ - else - dev_p->state = STALLED; -} - -static void -usb_handle_transfer (uint16_t istr_value) -{ - uint16_t ep_value = 0; - uint8_t ep_index; - - ep_index = (istr_value & ISTR_EP_ID); - /* Decode and service non control endpoints interrupt */ - /* process related endpoint register */ - ep_value = st103_get_epreg (ep_index); - - if (ep_index == 0) - { - if ((ep_value & EP_CTR_TX)) - { - st103_ep_clear_ctr_tx (ep_index); - handle_in0 (); - } - - if ((ep_value & EP_CTR_RX)) - { - st103_ep_clear_ctr_rx (ep_index); - - if ((ep_value & EP_SETUP)) - handle_setup0 (); - else - handle_out0 (); - } - - if (dev_p->state == STALLED) - st103_ep_set_rxtx_status (ENDP0, EP_RX_STALL, EP_TX_STALL); - } - else - { - if ((ep_value & EP_CTR_RX)) - { - st103_ep_clear_ctr_rx (ep_index); - usb_cb_rx_ready (ep_index); - } - - if ((ep_value & EP_CTR_TX)) - { - st103_ep_clear_ctr_tx (ep_index); - usb_cb_tx_done (ep_index); - } - } -} - -void usb_lld_reset (uint8_t feature) -{ - usb_lld_set_configuration (0); - dev_p->current_feature = feature; - st103_set_btable (); - st103_set_daddr (0); -} - -void usb_lld_txcpy (const void *src, - int ep_num, int offset, size_t len) -{ - usb_lld_to_pmabuf (src, st103_get_tx_addr (ep_num) + offset, len); -} - -void usb_lld_write (uint8_t ep_num, const void *buf, size_t len) -{ - usb_lld_to_pmabuf (buf, st103_get_tx_addr (ep_num), len); - st103_set_tx_count (ep_num, len); - st103_ep_set_tx_status (ep_num, EP_TX_VALID); -} - -void usb_lld_rxcpy (uint8_t *dst, - int ep_num, int offset, size_t len) -{ - usb_lld_from_pmabuf (dst, st103_get_rx_addr (ep_num) + offset, len); -} - -void usb_lld_tx_enable (int ep_num, size_t len) -{ - st103_set_tx_count (ep_num, len); - st103_ep_set_tx_status (ep_num, EP_TX_VALID); -} - -int usb_lld_tx_data_len (int ep_num) -{ - return st103_get_tx_count (ep_num); -} - -int usb_lld_rx_data_len (int ep_num) -{ - return st103_get_rx_count (ep_num); -} - -void usb_lld_stall_tx (int ep_num) -{ - st103_ep_set_tx_status (ep_num, EP_TX_STALL); -} - -void usb_lld_stall_rx (int ep_num) -{ - st103_ep_set_rx_status (ep_num, EP_RX_STALL); -} - -void usb_lld_rx_enable (int ep_num) -{ - st103_ep_set_rx_status (ep_num, EP_RX_VALID); -} - -void usb_lld_setup_endpoint (int ep_num, int ep_type, int ep_kind, - int ep_rx_addr, int ep_tx_addr, - int ep_rx_buf_size) -{ - uint16_t epreg_value = st103_get_epreg (ep_num); - uint16_t ep_rxtx_status = 0; /* Both disabled */ - - /* Clear: Write 1 if 1: EP_DTOG_RX, EP_DTOG_TX */ - /* Set: Write: EP_T_FIELD, EP_KIND, EPADDR_FIELD */ - /* Set: Toggle: EPRX_STAT, EPTX_STAT */ - epreg_value &= (EPRX_STAT | EP_SETUP | EPTX_STAT | EP_DTOG_RX | EP_DTOG_TX); -#if USB_KEEP_CORRECT_TRANSFER_FLAGS - /* Keep: Write 1: EP_CTR_RX, EP_CTR_TX */ - epreg_value |= (EP_CTR_RX|EP_CTR_TX); -#else - /* Clear: Write 0: EP_CTR_RX, EP_CTR_TX */ -#endif - epreg_value |= ep_type; - epreg_value |= ep_kind; - epreg_value |= ep_num; - - if (ep_rx_addr) - { - ep_rxtx_status |= EP_RX_VALID; - st103_set_rx_addr (ep_num, ep_rx_addr); - st103_set_rx_buf_size (ep_num, ep_rx_buf_size); - } - - if (ep_tx_addr) - { - ep_rxtx_status |= EP_TX_NAK; - st103_set_tx_addr (ep_num, ep_tx_addr); - } - - epreg_value ^= (EPRX_DTOG1 & ep_rxtx_status); - epreg_value ^= (EPRX_DTOG2 & ep_rxtx_status); - epreg_value ^= (EPTX_DTOG1 & ep_rxtx_status); - epreg_value ^= (EPTX_DTOG2 & ep_rxtx_status); - - st103_set_epreg (ep_num, epreg_value); -} - -void usb_lld_set_configuration (uint8_t config) -{ - dev_p->current_configuration = config; -} - -uint8_t usb_lld_current_configuration (void) -{ - return dev_p->current_configuration; -} - -void usb_lld_set_data_to_recv (void *p, size_t len) -{ - data_p->addr = p; - data_p->len = len; -} - -void usb_lld_to_pmabuf (const void *src, uint16_t addr, size_t n) -{ - const uint8_t *s = (const uint8_t *)src; - uint16_t *p; - uint16_t w; - - if (n == 0) - return; - - if ((addr & 1)) - { - p = (uint16_t *)(PMA_ADDR + (addr - 1) * 2); - w = *p; - w = (w & 0xff) | (*s++) << 8; - *p = w; - p += 2; - n--; - } - else - p = (uint16_t *)(PMA_ADDR + addr * 2); - - while (n >= 2) - { - w = *s++; - w |= (*s++) << 8; - *p = w; - p += 2; - n -= 2; - } - - if (n > 0) - { - w = *s; - *p = w; - } -} - -void usb_lld_from_pmabuf (void *dst, uint16_t addr, size_t n) -{ - uint8_t *d = (uint8_t *)dst; - uint16_t *p; - uint16_t w; - - if (n == 0) - return; - - if ((addr & 1)) - { - p = (uint16_t *)(PMA_ADDR + (addr - 1) * 2); - w = *p; - *d++ = (w >> 8); - p += 2; - n--; - } - else - p = (uint16_t *)(PMA_ADDR + addr * 2); - - while (n >= 2) - { - w = *p; - *d++ = (w & 0xff); - *d++ = (w >> 8); - p += 2; - n -= 2; - } - - if (n > 0) - { - w = *p; - *d = (w & 0xff); - } -} - - -/* - * BUF: Pointer to data memory. Data memory should not be allocated - * on stack when BUFLEN > USB_MAX_PACKET_SIZE. - * - * BUFLEN: size of the data. - */ -int -usb_lld_reply_request (const void *buf, size_t buflen, struct req_args *ctl) -{ - uint32_t len_asked = ctl->len; - uint32_t len; - - data_p->addr = (void *)buf; - data_p->len = buflen; - - /* Restrict the data length to be the one host asks for */ - if (data_p->len > len_asked) - data_p->len = len_asked; - - if (data_p->len != 0 && (data_p->len % USB_MAX_PACKET_SIZE) == 0) - data_p->require_zlp = 1; - - if (data_p->len < USB_MAX_PACKET_SIZE) - { - len = data_p->len; - dev_p->state = LAST_IN_DATA; - } - else - { - len = USB_MAX_PACKET_SIZE; - dev_p->state = IN_DATA; - } - - if (len) - { - usb_lld_to_pmabuf (data_p->addr, st103_get_tx_addr (ENDP0), len); - data_p->len -= len; - data_p->addr += len; - } - - st103_set_tx_count (ENDP0, len); - st103_ep_set_tx_status (ENDP0, EP_TX_VALID); - return USB_SUCCESS; -}