diff --git a/ChangeLog b/ChangeLog
index d56f146..c5c67b7 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,10 @@
 2010-11-26  NIIBE Yutaka  <gniibe@fsij.org>
 
+	* boards/STBEE_MINI/board.h (CPU_WITH_NO_GPIOE): New define.
+	* ChibiOS_2.0.6/os/hal/platforms/STM32/hal_lld.c: Use it.
+	* ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.c: Likewise.
+	* ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.h: Likewise.
+
 	* src/openpgp.c (cmd_pso): DigestInfo by SHA224/SHA384/SHA512 is supported.
 
 2010-11-22  NIIBE Yutaka  <gniibe@fsij.org>
diff --git a/ChibiOS_2.0.6/os/hal/platforms/STM32/hal_lld.c b/ChibiOS_2.0.6/os/hal/platforms/STM32/hal_lld.c
index 07d04a5..fb98fb0 100644
--- a/ChibiOS_2.0.6/os/hal/platforms/STM32/hal_lld.c
+++ b/ChibiOS_2.0.6/os/hal/platforms/STM32/hal_lld.c
@@ -55,7 +55,7 @@ const PALConfig pal_default_config =
   {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
   {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
   {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
-#if !defined(STM32F10X_LD) && !defined(BOARD_STBEE_MINI)
+#if !defined(STM32F10X_LD) && !defined(CPU_WITH_NO_GPIOE)
   {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
 #endif
 #if defined(STM32F10X_HD)
diff --git a/ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.c b/ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.c
index 677264e..34b205d 100644
--- a/ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.c
+++ b/ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.c
@@ -114,7 +114,7 @@ void _pal_lld_init(const PALConfig *config) {
   IOPORT4->ODR = config->PDData.odr;
   IOPORT4->CRH = config->PDData.crh;
   IOPORT4->CRL = config->PDData.crl;
-#if !(defined(STM32F10X_LD) || defined(BOARD_STBEE_MINI)) || defined(__DOXYGEN__)
+#if !(defined(STM32F10X_LD) || defined(CPU_WITH_NO_GPIOE)) || defined(__DOXYGEN__)
   IOPORT5->ODR = config->PEData.odr;
   IOPORT5->CRH = config->PEData.crh;
   IOPORT5->CRL = config->PEData.crl;
diff --git a/ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.h b/ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.h
index cbb2fc1..3cfec41 100644
--- a/ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.h
+++ b/ChibiOS_2.0.6/os/hal/platforms/STM32/pal_lld.h
@@ -83,7 +83,7 @@ typedef struct {
   stm32_gpio_setup_t    PCData;
   /** @brief Port D setup data.*/
   stm32_gpio_setup_t    PDData;
-#if !(defined(STM32F10X_LD) || defined(BOARD_STBEE_MINI)) || defined(__DOXYGEN__)
+#if !(defined(STM32F10X_LD) || defined(CPU_WITH_NO_GPIOE)) || defined(__DOXYGEN__)
   /** @brief Port E setup data.*/
   stm32_gpio_setup_t    PEData;
 #endif
diff --git a/boards/STBEE_MINI/board.h b/boards/STBEE_MINI/board.h
index 0607ddc..e0026bc 100644
--- a/boards/STBEE_MINI/board.h
+++ b/boards/STBEE_MINI/board.h
@@ -36,6 +36,7 @@
  */
 #define BOARD_STBEE_MINI
 #define BOARD_NAME "STBee Mini"
+#define CPU_WITH_NO_GPIOE	1
 
 /*
  * Board frequencies.