experimental pin-cir
This commit is contained in:
NIIBE Yutaka
@@ -738,12 +738,12 @@ GPGthread (void *arg)
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{
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Thread *icc_thread = (Thread *)arg;
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#if defined(PINPAD_SUPPORT)
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extern msg_t pindial_main (void *arg);
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Thread *pindial_thread;
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extern msg_t pin_main (void *arg);
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Thread *pin_thread;
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static WORKING_AREA(waPINthread, 128);
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pindial_thread = chThdCreateStatic (waPINthread, sizeof(waPINthread),
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NORMALPRIO, pindial_main, NULL);
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pin_thread = chThdCreateStatic (waPINthread, sizeof(waPINthread),
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NORMALPRIO, pin_main, NULL);
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#endif
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gpg_init ();
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312
src/pin-cir.c
Normal file
312
src/pin-cir.c
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@@ -0,0 +1,312 @@
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/*
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* pin-cir.c -- PIN input device support (Consumer Infra Red)
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*
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* Copyright (C) 2010 Free Software Initiative of Japan
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* Author: NIIBE Yutaka <gniibe@fsij.org>
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*
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* This file is a part of Gnuk, a GnuPG USB Token implementation.
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*
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* Gnuk is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Gnuk is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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* or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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* License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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*/
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#include "config.h"
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#include "ch.h"
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#include "hal.h"
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#include "board.h"
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#include "gnuk.h"
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/*
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* Controller of Sharp AQUOS: (START + 48-bit + STOP) x N
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* Controller of Toshiba REGZA: (START + 32-bit + STOP) + (START + STOP) x N
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*/
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/*
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* PB0 / TIM3_CH3
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*
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* 72MHz
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*
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* Prescaler = 72
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*
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* 1us
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*
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*
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* TIM3_CR1
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* CKD = 10 (sampling x4)
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* ARPE = 0 (not buffered)
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* CMS = 00 (up counter)
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* DIR = 0 (up counter)
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* OPM = 0 (up counter)
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* URS = 1 (update request source: overflow only)
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* UDIS = 0 (UEV (update event) enabled)
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* CEN = 1 (counter enable)
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*
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* TIM3_CR2
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* TI1S = 1 (TI1 is XOR of ch1, ch2, ch3)
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* MMS = 000 (TRGO at Reset)
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* CCDS = 0 (DMA on capture)
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* RSVD = 000
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*
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* TIM3_SMCR
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* ETP = 0
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* ECE = 0
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* ETPS = 00
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* ETF = 0000
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* MSM = 0
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* TS = 101 (TI1FP1 selected)
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* RSVD = 0
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* SMS = 100 (Reset-mode)
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*
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* TIM3_DIER
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*
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* TIM3_SR
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*
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* TIM3_EGR
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*
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* TIM3_CCMR1
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* CC1S = 01 (TI1 selected)
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* CC2S = 10 (TI1 selected)
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*
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* TIM3_CCMR2
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*
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* TIM3_CCER
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* CC2P = 1 (polarity = falling edge: TI1FP1)
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* CC2E = 1
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* CC1P = 0 (polarity = rising edge: TI1FP1)
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* CC1E = 1
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*
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* TIM3_CNT
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* TIM3_PSC = 71
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* TIM3_ARR = 18000
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*
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* TIM3_CCR1 period
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* TIM3_CCR2 duty
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*
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* TIM3_DCR
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* TIM3_DMAR
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*/
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#define PINDISP_TIMEOUT_INTERVAL0 MS2ST(25)
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#define PINDISP_TIMEOUT_INTERVAL1 MS2ST(300)
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static void
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pindisp (uint8_t c)
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{
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switch (c)
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{
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case 'G':
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palWritePort (IOPORT2, 0xa1ff);
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break;
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case 'P':
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palWritePort (IOPORT2, 0x98ff);
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break;
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case '.':
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palWritePort (IOPORT2, 0x7fff);
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break;
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default:
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palWritePort (IOPORT2, 0xffff);
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}
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}
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#if defined(DEBUG_CIR)
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static uint16_t intr_ext;
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static uint16_t intr_trg;
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static uint16_t intr_ovf;
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#define MAX_PININPUT_BIT 256
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static uint16_t pininput[MAX_PININPUT_BIT];
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static uint16_t *pininput_p;
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#endif
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/*
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* Currently, only NEC protocol is supported.
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*/
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static uint16_t cir_adr;
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static uint16_t cir_cmd;
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static uint8_t cir_seq;
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#define CIR_BIT_PERIOD 1000
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static void
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cir_init (void)
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{
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cir_adr = 0;
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cir_cmd = 0;
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cir_seq = 0;
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cir_ext_enable ();
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}
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static Thread *pin_thread;
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msg_t
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pin_main (void *arg)
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{
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uint8_t s = 0;
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(void)arg;
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pin_thread = chThdSelf ();
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#if defined(DEBUG_CIR)
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pininput_p = pininput;
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#endif
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chEvtClear (ALL_EVENTS);
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cir_init ();
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while (!chThdShouldTerminate ())
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{
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eventmask_t m;
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m = chEvtWaitOneTimeout (ALL_EVENTS, PINDISP_TIMEOUT_INTERVAL1);
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if (m)
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{
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#if defined(DEBUG_CIR)
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uint16_t *p;
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DEBUG_INFO ("****\r\n");
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DEBUG_SHORT (intr_ext);
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DEBUG_SHORT (intr_trg);
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DEBUG_SHORT (intr_ovf);
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DEBUG_INFO ("----\r\n");
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for (p = pininput; p < pininput_p; p++)
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DEBUG_SHORT (*p);
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DEBUG_INFO ("====\r\n");
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pininput_p = pininput;
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#endif
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DEBUG_INFO ("**** CIR commdand:");
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DEBUG_SHORT (cir_cmd);
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cir_init ();
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}
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switch (s++)
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{
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case 0:
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pindisp ('G');
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break;
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case 1:
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pindisp ('P');
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break;
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case 2:
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pindisp ('G');
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break;
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case 3:
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pindisp ('.');
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break;
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default:
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pindisp (' ');
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s = 0;
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break;
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}
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chThdSleep (PINDISP_TIMEOUT_INTERVAL0);
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}
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return 0;
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}
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void
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cir_ext_interrupt (void)
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{
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cir_ext_disable ();
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#if defined(DEBUG_CIR)
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intr_ext++;
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if (pininput_p - pininput < MAX_PININPUT_BIT)
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{
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*pininput_p++ = 0x0000;
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*pininput_p++ = (uint16_t)chTimeNow ();
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}
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#endif
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TIM3->EGR = TIM_EGR_UG; /* Generate UEV to load PSC and ARR */
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/* Enable Timer */
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TIM3->SR &= ~(TIM_SR_UIF
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| TIM_SR_CC1IF | TIM_SR_CC2IF
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| TIM_SR_TIF
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| TIM_SR_CC1OF | TIM_SR_CC2OF);
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TIM3->DIER = TIM_DIER_UIE /*overflow*/ | TIM_DIER_TIE /*trigger*/;
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TIM3->CR1 |= TIM_CR1_CEN;
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}
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void
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cir_timer_interrupt (void)
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{
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if ((TIM3->SR & TIM_SR_TIF))
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{
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uint16_t period, on, off;
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period = TIM3->CCR1;
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on = TIM3->CCR2;
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off = period - on;
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if (cir_seq >= 2)
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{
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uint8_t bit = (on >= CIR_BIT_PERIOD) ? 1 : 0;
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if (cir_seq < 2 + 16)
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cir_adr |= (bit << (cir_seq - 2));
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else
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cir_cmd |= (bit << (cir_seq - 2 - 16));
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}
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cir_seq++;
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#if defined(DEBUG_CIR)
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if (pininput_p - pininput < MAX_PININPUT_BIT)
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{
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*pininput_p++ = on;
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*pininput_p++ = off;
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}
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intr_trg++;
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#endif
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TIM3->EGR = TIM_EGR_UG; /* Generate UEV */
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TIM3->SR &= ~TIM_SR_TIF;
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}
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else
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/* overflow occurred */
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{
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TIM3->SR &= ~TIM_SR_UIF;
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if (palReadPad (IOPORT2, GPIOB_CIR))
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{
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/* disable Timer */
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TIM3->CR1 &= ~TIM_CR1_CEN;
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TIM3->DIER = 0;
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if (cir_seq == 2 + 16 + 16
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&& (cir_cmd >> 8) == (cir_cmd & 0xff) ^ 0xff)
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{
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/* Notify thread */
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chEvtSignal (pin_thread, (eventmask_t)1);
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cir_cmd &= 0xff;
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}
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else
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/* Ignore data received and enable CIR again */
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cir_init ();
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#if defined(DEBUG_CIR)
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if (pininput_p - pininput < MAX_PININPUT_BIT)
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{
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*pininput_p++ = 0xffff;
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*pininput_p++ = (uint16_t)chTimeNow ();
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}
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intr_ovf++;
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#endif
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}
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}
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}
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