minor improvement of bignum
This commit is contained in:
@@ -1,9 +1,15 @@
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2013-12-16 Niibe Yutaka <gniibe@fsij.org>
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2013-12-16 Niibe Yutaka <gniibe@fsij.org>
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* polarssl/include/polarssl/bn_mul.h (MULADDC_1024_CORE)
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(MULADDC_1024_LOOP, MULADDC_HUIT, MULADDC_INIT, MULADDC_CORE)
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(MULADDC_STOP) [__arm__]: The value of input B won't change.
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More acculate specification for asm statement.
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* polarssl/library/bignum.c (mpi_cmp_abs_limbs): New.
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* polarssl/library/bignum.c (mpi_cmp_abs_limbs): New.
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(mpi_montmul): Change the signature and use the upper half of T.
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(mpi_montmul): Change the signature and use the upper half of T.
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(mpi_montred): Likewise.
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(mpi_montred): Likewise.
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(mpi_exp_mod): Use improved mpi_montmul and mpi_montred.
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(mpi_exp_mod): Use improved mpi_montmul and mpi_montred.
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(mpi_sub_hlp, mpi_mul_hlp): Add const qualifier for S.
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2013-12-13 Niibe Yutaka <gniibe@fsij.org>
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2013-12-13 Niibe Yutaka <gniibe@fsij.org>
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@@ -495,130 +495,130 @@
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#endif /* TriCore */
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#endif /* TriCore */
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#if defined(__arm__)
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#if defined(__arm__)
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#define MULADDC_1024_CORE \
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#define MULADDC_1024_CORE \
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"ldmia %0!, { r5, r6, r7 } \n" \
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"ldmia %0!, { r5, r6, r7 } \n\t" \
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"ldmia %1, { r8, r9, r10 } \n" \
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"ldmia %1, { r8, r9, r10 } \n\t" \
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"umull r11, r12, %2, r5 \n" \
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"umull r11, r12, %4, r5 \n\t" \
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"adcs r11, r11, %3 \n" \
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"adcs r11, r11, %2 \n\t" \
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"adc %3, r12, #0 \n" \
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"adc %2, r12, #0 \n\t" \
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"adds r8, r8, r11 \n" \
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"adds r8, r8, r11 \n\t" \
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"umull r11, r12, %2, r6 \n" \
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"umull r11, r12, %4, r6 \n\t" \
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"adcs r11, r11, %3 \n" \
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"adcs r11, r11, %2 \n\t" \
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"adc %3, r12, #0 \n" \
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"adc %2, r12, #0 \n\t" \
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"adds r9, r9, r11 \n" \
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"adds r9, r9, r11 \n\t" \
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"umull r11, r12, %2, r7 \n" \
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"umull r11, r12, %4, r7 \n\t" \
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"adcs r11, r11, %3 \n" \
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"adcs r11, r11, %2 \n\t" \
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"adc %3, r12, #0 \n" \
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"adc %2, r12, #0 \n\t" \
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"adds r10, r10, r11 \n" \
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"adds r10, r10, r11 \n\t" \
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"stmia %1!, { r8, r9, r10 } \n"
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"stmia %1!, { r8, r9, r10 } \n\t"
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#define MULADDC_1024_LOOP \
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#define MULADDC_1024_LOOP \
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asm( "tst %4, #0xfe0 \n" \
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asm( "tst %3, #0xfe0 \n\t" \
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"beq 0f \n" \
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"beq 0f \n" \
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"1: sub %4, %4, #32 \n" \
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"1: sub %3, %3, #32 \n\t" \
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"ldmia %0!, { r5, r6, r7 } \n" \
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"ldmia %0!, { r5, r6, r7 } \n\t" \
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"ldmia %1, { r8, r9, r10 } \n" \
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"ldmia %1, { r8, r9, r10 } \n\t" \
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"umull r11, r12, %2, r5 \n" \
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"umull r11, r12, %4, r5 \n\t" \
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"adds r11, r11, %3 \n" \
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"adds r11, r11, %2 \n\t" \
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"adc %3, r12, #0 \n" \
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"adc %2, r12, #0 \n\t" \
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"adds r8, r8, r11 \n" \
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"adds r8, r8, r11 \n\t" \
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"umull r11, r12, %2, r6 \n" \
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"umull r11, r12, %4, r6 \n\t" \
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"adcs r11, r11, %3 \n" \
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"adcs r11, r11, %2 \n\t" \
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"adc %3, r12, #0 \n" \
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"adc %2, r12, #0 \n\t" \
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"adds r9, r9, r11 \n" \
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"adds r9, r9, r11 \n\t" \
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"umull r11, r12, %2, r7 \n" \
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"umull r11, r12, %4, r7 \n\t" \
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"adcs r11, r11, %3 \n" \
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"adcs r11, r11, %2 \n\t" \
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"adc %3, r12, #0 \n" \
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"adc %2, r12, #0 \n\t" \
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"adds r10, r10, r11 \n" \
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"adds r10, r10, r11 \n\t" \
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"stmia %1!, { r8, r9, r10 } \n" \
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"stmia %1!, { r8, r9, r10 } \n\t" \
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MULADDC_1024_CORE MULADDC_1024_CORE \
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MULADDC_1024_CORE MULADDC_1024_CORE \
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MULADDC_1024_CORE MULADDC_1024_CORE \
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MULADDC_1024_CORE MULADDC_1024_CORE \
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MULADDC_1024_CORE MULADDC_1024_CORE \
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MULADDC_1024_CORE MULADDC_1024_CORE \
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MULADDC_1024_CORE MULADDC_1024_CORE \
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MULADDC_1024_CORE MULADDC_1024_CORE \
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MULADDC_1024_CORE \
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MULADDC_1024_CORE \
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"ldmia %0!, { r5, r6 } \n" \
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"ldmia %0!, { r5, r6 } \n\t" \
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"ldmia %1, { r8, r9 } \n" \
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"ldmia %1, { r8, r9 } \n\t" \
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"umull r11, r12, %2, r5 \n" \
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"umull r11, r12, %4, r5 \n\t" \
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"adcs r11, r11, %3 \n" \
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"adcs r11, r11, %2 \n\t" \
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"adc %3, r12, #0 \n" \
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"adc %2, r12, #0 \n\t" \
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"adds r8, r8, r11 \n" \
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"adds r8, r8, r11 \n\t" \
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"umull r11, r12, %2, r6 \n" \
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"umull r11, r12, %4, r6 \n\t" \
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"adcs r11, r11, %3 \n" \
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"adcs r11, r11, %2 \n\t" \
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"adc %3, r12, #0 \n" \
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"adc %2, r12, #0 \n\t" \
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"adds r9, r9, r11 \n" \
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"adds r9, r9, r11 \n\t" \
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"stmia %1!, { r8, r9 } \n" \
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"stmia %1!, { r8, r9 } \n\t" \
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"adc %3, %3, #0 \n" \
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"adc %2, %2, #0 \n\t" \
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"tst %4, #0xfe0 \n" \
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"tst %3, #0xfe0 \n\t" \
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"bne 1b \n" \
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"bne 1b \n" \
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"0:" \
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"0:" \
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: "=r" (s), "=r" (d), "=r" (b), "=r" (c), "=r" (i) \
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: "=r" (s), "=r" (d), "=r" (c), "=r" (i) \
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: "0" (s), "1" (d), "2" (b), "3" (c), "4" (i) \
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: "r" (b), "0" (s), "1" (d), "2" (c), "3" (i) \
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: "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "memory", "cc" );
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: "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12", "memory", "cc" );
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/* Just for reference (dead code) */
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/* Just for reference (dead code) */
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#define MULADDC_HUIT \
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#define MULADDC_HUIT \
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"ldmia %0!, { r4, r5 } \n" \
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"ldmia %0!, { r4, r5 } \n\t" \
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"ldmia %1, { r8, r9 } \n" \
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"ldmia %1, { r8, r9 } \n\t" \
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"umull r6, r7, %2, r4 \n" \
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"umull r6, r7, %3, r4 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r8, r8, r6 \n" \
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"adds r8, r8, r6 \n\t" \
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"umull r6, r7, %2, r5 \n" \
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"umull r6, r7, %3, r5 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r9, r9, r6 \n" \
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"adds r9, r9, r6 \n\t" \
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"stmia %1!, { r8, r9 } \n" \
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"stmia %1!, { r8, r9 } \n\t" \
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"ldmia %0!, { r4, r5 } \n" \
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"ldmia %0!, { r4, r5 } \n\t" \
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"ldmia %1, { r8, r9 } \n" \
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"ldmia %1, { r8, r9 } \n\t" \
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"umull r6, r7, %2, r4 \n" \
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"umull r6, r7, %3, r4 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r8, r8, r6 \n" \
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"adds r8, r8, r6 \n\t" \
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"umull r6, r7, %2, r5 \n" \
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"umull r6, r7, %3, r5 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r9, r9, r6 \n" \
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"adds r9, r9, r6 \n\t" \
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"stmia %1!, { r8, r9 } \n" \
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"stmia %1!, { r8, r9 } \n\t" \
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"ldmia %0!, { r4, r5 } \n" \
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"ldmia %0!, { r4, r5 } \n\t" \
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"ldmia %1, { r8, r9 } \n" \
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"ldmia %1, { r8, r9 } \n\t" \
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"umull r6, r7, %2, r4 \n" \
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"umull r6, r7, %3, r4 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r8, r8, r6 \n" \
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"adds r8, r8, r6 \n\t" \
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"umull r6, r7, %2, r5 \n" \
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"umull r6, r7, %3, r5 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r9, r9, r6 \n" \
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"adds r9, r9, r6 \n\t" \
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"stmia %1!, { r8, r9 } \n" \
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"stmia %1!, { r8, r9 } \n\t" \
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"ldmia %0!, { r4, r5 } \n" \
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"ldmia %0!, { r4, r5 } \n\t" \
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"ldmia %1, { r8, r9 } \n" \
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"ldmia %1, { r8, r9 } \n\t" \
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"umull r6, r7, %2, r4 \n" \
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"umull r6, r7, %3, r4 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r8, r8, r6 \n" \
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"adds r8, r8, r6 \n\t" \
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"umull r6, r7, %2, r5 \n" \
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"umull r6, r7, %3, r5 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r9, r9, r6 \n" \
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"adds r9, r9, r6 \n\t" \
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"stmia %1!, { r8, r9 } \n"
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"stmia %1!, { r8, r9 } \n\t"
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#define MULADDC_INIT \
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#define MULADDC_INIT \
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asm( "adds %0, #0 \n"
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asm( "adds %0, #0 \n\t"
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#define MULADDC_CORE \
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#define MULADDC_CORE \
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"ldr r5, [%1] \n" \
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"ldr r5, [%1] \n\t" \
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"ldr r4, [%0], #4 \n" \
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"ldr r4, [%0], #4 \n\t" \
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"umull r6, r7, %2, r4 \n" \
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"umull r6, r7, %3, r4 \n\t" \
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"adcs r6, r6, %3 \n" \
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"adcs r6, r6, %2 \n\t" \
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"adc %3, r7, #0 \n" \
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"adc %2, r7, #0 \n\t" \
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"adds r5, r5, r6 \n" \
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"adds r5, r5, r6 \n\t" \
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"str r5, [%1], #4 \n"
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"str r5, [%1], #4 \n\t"
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#define MULADDC_STOP \
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#define MULADDC_STOP \
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"adc %3, %3, #0 " \
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"adc %2, %2, #0 " \
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: "=r" (s), "=r" (d), "=r" (b), "=r" (c) \
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: "=r" (s), "=r" (d), "=r" (c) \
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: "0" (s), "1" (d), "2" (b), "3" (c) \
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: "r" (b), "0" (s), "1" (d), "2" (c) \
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: "r4", "r5", "r6", "r7", "r8", "r9", "memory", "cc" );
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: "r4", "r5", "r6", "r7", "memory", "cc" );
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#endif /* ARMv3 */
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#endif /* ARMv3 */
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@@ -810,7 +810,7 @@ cleanup:
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/*
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/*
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* Helper for mpi substraction
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* Helper for mpi substraction
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*/
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*/
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static t_uint mpi_sub_hlp( size_t n, t_uint *s, t_uint *d )
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static t_uint mpi_sub_hlp( size_t n, const t_uint *s, t_uint *d )
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{
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{
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size_t i;
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size_t i;
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t_uint c, z;
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t_uint c, z;
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@@ -981,7 +981,7 @@ static
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*/
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*/
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__attribute__ ((noinline))
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__attribute__ ((noinline))
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#endif
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#endif
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t_uint mpi_mul_hlp( size_t i, t_uint *s, t_uint *d, t_uint b )
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t_uint mpi_mul_hlp( size_t i, const t_uint *s, t_uint *d, t_uint b )
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{
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{
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t_uint c = 0, t = 0;
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t_uint c = 0, t = 0;
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