diff --git a/regnual/Makefile b/regnual/Makefile index 2a3f333..cb9d57c 100644 --- a/regnual/Makefile +++ b/regnual/Makefile @@ -22,7 +22,7 @@ MCFLAGS= -mcpu=$(MCU) DEFS = -DFREE_STANDING CFLAGS = -O2 -g -CFLAGS += -Wa,-alms=$(notdir $(<:.c=.lst)) +CFLAGS += -Wa,-alms=$(notdir $(<:.c=.lst)) -fpie CFLAGS += $(CWARN) -I . -I ../src -fno-common $(MCFLAGS) $(TOPT) $(DEFS) LDFLAGS = -T$(LDSCRIPT) -nostartfiles $(MCFLAGS) $(TOPT) diff --git a/regnual/regnual.ld b/regnual/regnual.ld index 648b27c..3efabef 100644 --- a/regnual/regnual.ld +++ b/regnual/regnual.ld @@ -7,8 +7,8 @@ __stacks_total_size__ = __main_stack_size__ + __process_stack_size__; MEMORY { - ram0 : org = 0x20000000, len = 0x1c00 - ram1 : org = 0x20001c00, len = 20k - 0x1c00 + ram0 : org = 0x20000000, len = 0x1400 + ram1 : org = 0x20001400, len = 20k - 0x1400 } vector = 0x08000000; @@ -39,6 +39,7 @@ SECTIONS { _text = .; KEEP(*(.vectors)) + *(.text.entry) *(.text) *(.text.*) *(.rodata) @@ -48,6 +49,12 @@ SECTIONS *(.gcc*) } > ram1 + .got : + { + *(.got) + *(.got.*) + } > ram1 + .ctors : { PROVIDE(_ctors_start_ = .); diff --git a/regnual/sys.c b/regnual/sys.c index 702e4c8..7222c42 100644 --- a/regnual/sys.c +++ b/regnual/sys.c @@ -9,17 +9,41 @@ static void none (void) { } -/* Note: it is not reset */ -static __attribute__ ((naked)) +/* + * Note: the address of this routine 'entry' will be in the vectors as + * RESET, but this will be called from application. It's not RESET + * state, then. + */ +static __attribute__ ((naked,section(".text.entry"))) void entry (void) { - asm volatile ("ldr r0, =__ram_end__\n\t" - "ldr r1, =__main_stack_size__\n\t" + asm volatile ("mov r0, pc\n\t" + "bic r0, r0, #255\n\t" /* R0 := vector_table address */ + "mov r1, #0x90\n" /* R1 := numbers of entries * 4 */ + "0:\n\t" + "ldr r2, [r0, r1]\n\t" + "add r2, r2, #-0x20000000\n\t" + "sub r2, r2, #0x1400\n\t" + "add r2, r2, r0\n\t" /* Relocate: -0x20001400 + R0 */ + "str r2, [r0, r1]\n\t" + "subs r1, r1, #4\n\t" + "bne 0b\n\t" + /* Relocation done. We don't care the first entry. */ + "ldr r3, .L00\n" + ".LPIC00:\n\t" + "add r3, pc\n\t" /* R3 := @_GLOBAL_OFFSET_TABLE_ */ + "ldr r4, .L00+4\n\t" + "ldr r0, [r3, r4]\n\t" + "ldr r4, .L00+8\n\t" + "ldr r1, [r3, r4]\n\t" "sub r0, r0, r1\n\t" "mov sp, r0\n\t" + /* Clear BSS. */ "mov r0, #0\n\t" - "ldr r1, =_bss_start\n\t" - "ldr r2, =_bss_end\n" + "ldr r4, .L00+12\n\t" + "ldr r1, [r3, r4]\n\t" + "ldr r4, .L00+16\n\t" + "ldr r2, [r3, r4]\n" "0:\n\t" "str r0, [r1], #4\n\t" "cmp r2, r1\n\t" @@ -30,6 +54,12 @@ void entry (void) "bl main\n" "1:\n\t" "b 1b\n" + ".L00:\n\t" + ".word _GLOBAL_OFFSET_TABLE_-(.LPIC00+4)\n\t" + ".word __ram_end__(GOT)\n\t" + ".word __main_stack_size__(GOT)\n\t" + ".word _bss_start(GOT)\n\t" + ".word _bss_end(GOT)" : /* no output */ : /* no input */ : "memory"); }