stlinkv2.py: merge Cortex-M0 support for FSM-55

This commit is contained in:
NIIBE Yutaka
2015-07-06 15:52:04 +09:00
parent 35c880fc0c
commit 9ba59de212
5 changed files with 109 additions and 42 deletions

View File

@@ -8,11 +8,9 @@
#define FLASH_SR_OFFSET 0x0c
#define FLASH_CR_OFFSET 0x10
#define COUNT 0x1000
.cpu cortex-m3
.cpu cortex-m0
.thumb
movw r2, #COUNT
ldr r2, .SIZE
ldr r0, .SRC_ADDR
ldr r1, .TARGET_ADDR
ldr r4, .FLASH_BASE_ADDR
@@ -35,5 +33,6 @@
bkpt #0x00
.align 2
.FLASH_BASE_ADDR: .word 0x40022000
.SRC_ADDR: .word 0x20000038
.SRC_ADDR: .word 0x2000003C
.TARGET_ADDR: .word 0x08000000
.SIZE: .word 0x00000000