fix sys.c
This commit is contained in:
@@ -1,3 +1,8 @@
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2012-05-25 Niibe Yutaka <gniibe@fsij.org>
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* regnual/sys.c (clock_init, gpio_init, flash_unlock): Removed.
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(entry): Rename (was: reset).
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2012-05-24 Niibe Yutaka <gniibe@fsij.org>
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2012-05-24 Niibe Yutaka <gniibe@fsij.org>
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* src/main.c (good_bye): Care LSB of function pointer.
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* src/main.c (good_bye): Care LSB of function pointer.
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@@ -111,41 +111,6 @@ struct FLASH {
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#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
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#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000)
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#define FLASH ((struct FLASH *) FLASH_R_BASE)
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#define FLASH ((struct FLASH *) FLASH_R_BASE)
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static __attribute__ ((used))
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void clock_init (void)
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{
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/* HSI setup */
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RCC->CR |= RCC_CR_HSION;
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while (!(RCC->CR & RCC_CR_HSIRDY))
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;
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RCC->CR &= RCC_CR_HSITRIM | RCC_CR_HSION;
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RCC->CFGR = 0;
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while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_HSI)
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;
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/* HSE setup */
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RCC->CR |= RCC_CR_HSEON;
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while (!(RCC->CR & RCC_CR_HSERDY))
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;
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/* PLL setup */
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RCC->CFGR |= STM32_PLLMUL | STM32_PLLXTPRE | STM32_PLLSRC;
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RCC->CR |= RCC_CR_PLLON;
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while (!(RCC->CR & RCC_CR_PLLRDY))
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;
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/* Clock settings */
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RCC->CFGR = STM32_MCO | STM32_PLLMUL | STM32_PLLXTPRE | STM32_PLLSRC |
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STM32_ADCPRE | STM32_PPRE2 | STM32_PPRE1 | STM32_HPRE;
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/* Flash setup */
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FLASH->ACR = STM32_FLASHBITS;
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/* Switching on the configured clock source. */
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RCC->CFGR |= STM32_SW;
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while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2))
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;
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}
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#define RCC_APB2ENR_IOPAEN 0x00000004
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#define RCC_APB2ENR_IOPAEN 0x00000004
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#define RCC_APB2RSTR_IOPARST 0x00000004
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#define RCC_APB2RSTR_IOPARST 0x00000004
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@@ -182,25 +147,6 @@ struct GPIO {
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#endif
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#endif
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#define GPIO_LED ((struct GPIO *) GPIO_LED_BASE)
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#define GPIO_LED ((struct GPIO *) GPIO_LED_BASE)
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static __attribute__ ((used))
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void gpio_init (void)
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{
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/* Enable GPIOD clock. */
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RCC->APB2ENR |= RCC_APB2ENR_IOPDEN;
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RCC->APB2RSTR = RCC_APB2RSTR_IOPDRST;
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RCC->APB2RSTR = 0;
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GPIO_LED->ODR = VAL_GPIO_ODR;
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GPIO_LED->CRH = VAL_GPIO_CRH;
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GPIO_LED->CRL = VAL_GPIO_CRL;
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#if defined(GPIO_USB_BASE) && GPIO_USB_BASE != GPIO_LED_BASE
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GPIO_USB->ODR = VAL_GPIO_USB_ODR;
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GPIO_USB->CRH = VAL_GPIO_USB_CRH;
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GPIO_USB->CRL = VAL_GPIO_USB_CRL;
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#endif
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}
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static void
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static void
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usb_cable_config (int on)
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usb_cable_config (int on)
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{
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{
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@@ -258,7 +204,6 @@ void usb_lld_sys_shutdown (void)
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}
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}
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#define FLASH_KEY1 0x45670123UL
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#define FLASH_KEY1 0x45670123UL
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#define FLASH_KEY2 0xCDEF89ABUL
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#define FLASH_KEY2 0xCDEF89ABUL
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@@ -291,16 +236,6 @@ enum flash_status
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#define OPTION_BYTES_ADDR 0x1ffff800
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#define OPTION_BYTES_ADDR 0x1ffff800
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static void __attribute__ ((used))
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flash_unlock (void)
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{
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if ((FLASH->CR & FLASH_CR_LOCK) != 0)
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{
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FLASH->KEYR = FLASH_KEY1;
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FLASH->KEYR = FLASH_KEY2;
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}
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}
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static void fatal (void)
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static void fatal (void)
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{
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{
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for (;;);
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for (;;);
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@@ -310,8 +245,9 @@ static void none (void)
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{
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{
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}
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}
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/* Note: it is not reset */
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static __attribute__ ((naked))
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static __attribute__ ((naked))
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void reset (void)
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void entry (void)
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{
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{
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asm volatile ("cpsid i\n\t" /* Mask all interrupts */
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asm volatile ("cpsid i\n\t" /* Mask all interrupts */
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"ldr r0, =__ram_end__\n\t"
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"ldr r0, =__ram_end__\n\t"
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@@ -319,7 +255,6 @@ void reset (void)
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"ldr r1, =__main_stack_size__\n\t"
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"ldr r1, =__main_stack_size__\n\t"
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"subs r0, r0, r1\n\t"
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"subs r0, r0, r1\n\t"
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"msr PSP, r0\n\t" /* Process (main routine) stack */
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"msr PSP, r0\n\t" /* Process (main routine) stack */
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"bl clock_init\n\t"
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"movs r0, #0\n\t"
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"movs r0, #0\n\t"
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"ldr r1, =_bss_start\n\t"
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"ldr r1, =_bss_start\n\t"
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"ldr r2, =_bss_start\n"
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"ldr r2, =_bss_start\n"
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@@ -333,8 +268,6 @@ void reset (void)
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"movs r0, #2\n\t" /* Switch to PSP */
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"movs r0, #2\n\t" /* Switch to PSP */
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"msr CONTROL, r0\n\t"
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"msr CONTROL, r0\n\t"
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"isb\n\t"
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"isb\n\t"
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"bl flash_unlock\n\t"
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"bl gpio_init\n\t"
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"movs r0, #0\n\t"
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"movs r0, #0\n\t"
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"msr BASEPRI, r0\n\t" /* Enable interrupts */
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"msr BASEPRI, r0\n\t" /* Enable interrupts */
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"cpsie i\n\t"
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"cpsie i\n\t"
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@@ -356,7 +289,7 @@ extern void usb_interrupt_handler (void);
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handler vector_table[] __attribute__ ((section(".vectors"))) = {
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handler vector_table[] __attribute__ ((section(".vectors"))) = {
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(handler)&__ram_end__,
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(handler)&__ram_end__,
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reset,
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entry,
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fatal, /* nmi */
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fatal, /* nmi */
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fatal, /* hard fault */
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fatal, /* hard fault */
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/* 10 */
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/* 10 */
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