cleanup
This commit is contained in:
NIIBE Yutaka
419
Virtual_COM_Port/usb_istr.c
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419
Virtual_COM_Port/usb_istr.c
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/******************** (C) COPYRIGHT 2010 STMicroelectronics ********************
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* File Name : usb_istr.c
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* Author : MCD Application Team
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* Version : V3.1.1
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* Date : 04/07/2010
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* Description : ISTR events interrupt service routines
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********************************************************************************
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* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
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* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE TIME.
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* AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
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* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING FROM THE
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* CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE CODING
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* INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
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*******************************************************************************/
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/* Includes ------------------------------------------------------------------*/
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#include "usb_lib.h"
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#include "usb_prop.h"
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#include "usb_pwr.h"
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#include "usb_istr.h"
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/* function prototypes Automatically built defining related macros */
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void NOP_Proc(void) {
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}
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#define WEAK __attribute__ ((weak))
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void WEAK EP1_IN_Callback(void);
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void WEAK EP2_IN_Callback(void);
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void WEAK EP3_IN_Callback(void);
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void WEAK EP4_IN_Callback(void);
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void WEAK EP5_IN_Callback(void);
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void WEAK EP6_IN_Callback(void);
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void WEAK EP7_IN_Callback(void);
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void WEAK EP1_OUT_Callback(void);
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void WEAK EP2_OUT_Callback(void);
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void WEAK EP3_OUT_Callback(void);
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void WEAK EP4_OUT_Callback(void);
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void WEAK EP5_OUT_Callback(void);
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void WEAK EP6_OUT_Callback(void);
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void WEAK EP7_OUT_Callback(void);
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#pragma weak EP1_IN_Callback = NOP_Proc
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#pragma weak EP2_IN_Callback = NOP_Proc
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#pragma weak EP3_IN_Callback = NOP_Proc
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#pragma weak EP4_IN_Callback = NOP_Proc
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#pragma weak EP5_IN_Callback = NOP_Proc
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#pragma weak EP6_IN_Callback = NOP_Proc
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#pragma weak EP7_IN_Callback = NOP_Proc
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#pragma weak EP1_OUT_Callback = NOP_Proc
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#pragma weak EP2_OUT_Callback = NOP_Proc
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#pragma weak EP3_OUT_Callback = NOP_Proc
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#pragma weak EP4_OUT_Callback = NOP_Proc
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#pragma weak EP5_OUT_Callback = NOP_Proc
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#pragma weak EP6_OUT_Callback = NOP_Proc
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#pragma weak EP7_OUT_Callback = NOP_Proc
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/* Private typedef -----------------------------------------------------------*/
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/* Private define ------------------------------------------------------------*/
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/* Private macro -------------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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__IO uint16_t wIstr; /* ISTR register last read value */
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__IO uint8_t bIntPackSOF = 0; /* SOFs received between 2 consecutive packets */
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/* Extern variables ----------------------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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/* Private functions ---------------------------------------------------------*/
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/* function pointers to non-control endpoints service routines */
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void (*pEpInt_IN[7])(void) =
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{
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EP1_IN_Callback,
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EP2_IN_Callback,
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EP3_IN_Callback,
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EP4_IN_Callback,
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EP5_IN_Callback,
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EP6_IN_Callback,
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EP7_IN_Callback,
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};
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void (*pEpInt_OUT[7])(void) =
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{
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EP1_OUT_Callback,
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EP2_OUT_Callback,
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EP3_OUT_Callback,
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EP4_OUT_Callback,
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EP5_OUT_Callback,
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EP6_OUT_Callback,
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EP7_OUT_Callback,
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};
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#ifndef STM32F10X_CL
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/*******************************************************************************
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* Function Name : USB_Istr
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* Description : STR events interrupt service routine
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* Input :
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* Output :
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* Return :
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*******************************************************************************/
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void USB_Istr(void)
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{
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wIstr = _GetISTR();
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#if (IMR_MSK & ISTR_CTR)
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if (wIstr & ISTR_CTR & wInterrupt_Mask)
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{
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/* servicing of the endpoint correct transfer interrupt */
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/* clear of the CTR flag into the sub */
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CTR_LP();
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#ifdef CTR_CALLBACK
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CTR_Callback();
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#endif
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}
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#endif
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#if (IMR_MSK & ISTR_RESET)
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if (wIstr & ISTR_RESET & wInterrupt_Mask)
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{
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_SetISTR((uint16_t)CLR_RESET);
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Device_Property.Reset();
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#ifdef RESET_CALLBACK
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RESET_Callback();
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#endif
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}
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#endif
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#if (IMR_MSK & ISTR_DOVR)
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if (wIstr & ISTR_DOVR & wInterrupt_Mask)
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{
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_SetISTR((uint16_t)CLR_DOVR);
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#ifdef DOVR_CALLBACK
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DOVR_Callback();
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#endif
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}
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#endif
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#if (IMR_MSK & ISTR_ERR)
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if (wIstr & ISTR_ERR & wInterrupt_Mask)
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{
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_SetISTR((uint16_t)CLR_ERR);
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#ifdef ERR_CALLBACK
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ERR_Callback();
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#endif
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}
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#endif
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#if (IMR_MSK & ISTR_WKUP)
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if (wIstr & ISTR_WKUP & wInterrupt_Mask)
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{
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_SetISTR((uint16_t)CLR_WKUP);
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Resume(RESUME_EXTERNAL);
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#ifdef WKUP_CALLBACK
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WKUP_Callback();
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#endif
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}
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#endif
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#if (IMR_MSK & ISTR_SUSP)
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if (wIstr & ISTR_SUSP & wInterrupt_Mask)
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{
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/* check if SUSPEND is possible */
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if (fSuspendEnabled)
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{
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Suspend();
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}
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else
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{
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/* if not possible then resume after xx ms */
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Resume(RESUME_LATER);
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}
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/* clear of the ISTR bit must be done after setting of CNTR_FSUSP */
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_SetISTR((uint16_t)CLR_SUSP);
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#ifdef SUSP_CALLBACK
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SUSP_Callback();
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#endif
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}
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#endif
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#if (IMR_MSK & ISTR_SOF)
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if (wIstr & ISTR_SOF & wInterrupt_Mask)
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{
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_SetISTR((uint16_t)CLR_SOF);
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bIntPackSOF++;
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#ifdef SOF_CALLBACK
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SOF_Callback();
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#endif
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}
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#endif
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#if (IMR_MSK & ISTR_ESOF)
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if (wIstr & ISTR_ESOF & wInterrupt_Mask)
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{
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_SetISTR((uint16_t)CLR_ESOF);
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/* resume handling timing is made with ESOFs */
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Resume(RESUME_ESOF); /* request without change of the machine state */
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#ifdef ESOF_CALLBACK
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ESOF_Callback();
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#endif
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}
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#endif
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} /* USB_Istr */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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#else /* STM32F10X_CL */
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/*******************************************************************************
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* Function Name : STM32_PCD_OTG_ISR_Handler
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* Description : Handles all USB Device Interrupts
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* Input : None
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* Output : None
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* Return : status
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*******************************************************************************/
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u32 STM32_PCD_OTG_ISR_Handler (void)
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{
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USB_OTG_int_sts_data gintr_status;
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u32 retval = 0;
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if (IsDeviceMode()) /* ensure that we are in device mode */
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{
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gintr_status.d32 = OTGD_FS_ReadCoreItr();
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* If there is no interrupt pending exit the interrupt routine */
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if (!gintr_status.d32)
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{
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return 0;
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}
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Early Suspend interrupt */
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#ifdef INTR_ERLYSUSPEND
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if (gintr_status.b.erlysuspend)
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{
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retval |= OTGD_FS_Handle_EarlySuspend_ISR();
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}
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#endif /* INTR_ERLYSUSPEND */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* End of Periodic Frame interrupt */
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#ifdef INTR_EOPFRAME
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if (gintr_status.b.eopframe)
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{
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retval |= OTGD_FS_Handle_EOPF_ISR();
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}
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#endif /* INTR_EOPFRAME */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Non Periodic Tx FIFO Emty interrupt */
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#ifdef INTR_NPTXFEMPTY
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if (gintr_status.b.nptxfempty)
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{
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retval |= OTGD_FS_Handle_NPTxFE_ISR();
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}
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#endif /* INTR_NPTXFEMPTY */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Wakeup or RemoteWakeup interrupt */
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#ifdef INTR_WKUPINTR
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if (gintr_status.b.wkupintr)
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{
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retval |= OTGD_FS_Handle_Wakeup_ISR();
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}
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#endif /* INTR_WKUPINTR */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Suspend interrupt */
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#ifdef INTR_USBSUSPEND
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if (gintr_status.b.usbsuspend)
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{
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/* check if SUSPEND is possible */
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if (fSuspendEnabled)
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{
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Suspend();
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}
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else
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{
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/* if not possible then resume after xx ms */
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Resume(RESUME_LATER); /* This case shouldn't happen in OTG Device mode because
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there's no ESOF interrupt to increment the ResumeS.bESOFcnt in the Resume state machine */
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}
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retval |= OTGD_FS_Handle_USBSuspend_ISR();
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}
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#endif /* INTR_USBSUSPEND */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Start of Frame interrupt */
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#ifdef INTR_SOFINTR
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if (gintr_status.b.sofintr)
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{
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/* Update the frame number variable */
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bIntPackSOF++;
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retval |= OTGD_FS_Handle_Sof_ISR();
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}
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#endif /* INTR_SOFINTR */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Receive FIFO Queue Status Level interrupt */
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#ifdef INTR_RXSTSQLVL
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if (gintr_status.b.rxstsqlvl)
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{
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retval |= OTGD_FS_Handle_RxStatusQueueLevel_ISR();
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}
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#endif /* INTR_RXSTSQLVL */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Enumeration Done interrupt */
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#ifdef INTR_ENUMDONE
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if (gintr_status.b.enumdone)
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{
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retval |= OTGD_FS_Handle_EnumDone_ISR();
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}
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#endif /* INTR_ENUMDONE */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Reset interrutp */
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#ifdef INTR_USBRESET
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if (gintr_status.b.usbreset)
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{
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retval |= OTGD_FS_Handle_UsbReset_ISR();
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}
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#endif /* INTR_USBRESET */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* IN Endpoint interrupt */
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#ifdef INTR_INEPINTR
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if (gintr_status.b.inepint)
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{
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retval |= OTGD_FS_Handle_InEP_ISR();
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}
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#endif /* INTR_INEPINTR */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* OUT Endpoint interrupt */
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#ifdef INTR_OUTEPINTR
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if (gintr_status.b.outepintr)
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{
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retval |= OTGD_FS_Handle_OutEP_ISR();
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}
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#endif /* INTR_OUTEPINTR */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Mode Mismatch interrupt */
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#ifdef INTR_MODEMISMATCH
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if (gintr_status.b.modemismatch)
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{
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retval |= OTGD_FS_Handle_ModeMismatch_ISR();
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}
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#endif /* INTR_MODEMISMATCH */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Global IN Endpoints NAK Effective interrupt */
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#ifdef INTR_GINNAKEFF
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if (gintr_status.b.ginnakeff)
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{
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retval |= OTGD_FS_Handle_GInNakEff_ISR();
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}
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#endif /* INTR_GINNAKEFF */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Global OUT Endpoints NAK effective interrupt */
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#ifdef INTR_GOUTNAKEFF
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if (gintr_status.b.goutnakeff)
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{
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retval |= OTGD_FS_Handle_GOutNakEff_ISR();
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}
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#endif /* INTR_GOUTNAKEFF */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Isochrounous Out packet Dropped interrupt */
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#ifdef INTR_ISOOUTDROP
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if (gintr_status.b.isooutdrop)
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{
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retval |= OTGD_FS_Handle_IsoOutDrop_ISR();
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}
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#endif /* INTR_ISOOUTDROP */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Endpoint Mismatch error interrupt */
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#ifdef INTR_EPMISMATCH
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if (gintr_status.b.epmismatch)
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{
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retval |= OTGD_FS_Handle_EPMismatch_ISR();
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}
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#endif /* INTR_EPMISMATCH */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Incomplete Isochrous IN tranfer error interrupt */
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#ifdef INTR_INCOMPLISOIN
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if (gintr_status.b.incomplisoin)
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{
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retval |= OTGD_FS_Handle_IncomplIsoIn_ISR();
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}
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#endif /* INTR_INCOMPLISOIN */
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/*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*-*/
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/* Incomplete Isochrous OUT tranfer error interrupt */
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#ifdef INTR_INCOMPLISOOUT
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if (gintr_status.b.outepintr)
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{
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retval |= OTGD_FS_Handle_IncomplIsoOut_ISR();
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}
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#endif /* INTR_INCOMPLISOOUT */
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}
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return retval;
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}
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#endif /* STM32F10X_CL */
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/******************* (C) COPYRIGHT 2010 STMicroelectronics *****END OF FILE****/
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