diff --git a/ChangeLog b/ChangeLog
index 3c8efd1..a1ade4d 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,5 +1,7 @@
 2012-07-09  Niibe Yutaka  <gniibe@fsij.org>
 
+	* tool/stlinkv2.py (stlinkv2.setup_gpio): Fix GPIOB_CRL.
+
 	* test/rsa_keys.py (integer_to_bytes_256): Rename from
 	integer_to_bytes and it should be exactly 256-byte long.
 
diff --git a/boards/FST_01/board.h b/boards/FST_01/board.h
index 7b78e93..eafad06 100644
--- a/boards/FST_01/board.h
+++ b/boards/FST_01/board.h
@@ -101,10 +101,9 @@
  * PA5  - Alternate Push pull output (SPI1_SCK)
  * PA6  - Alternate Push pull output (SPI1_MISO)
  * PA7  - Alternate Push pull output (SPI1_MOSI)
+ * PA10 - Push pull output   (USB 1:ON 0:OFF)
  * PA11 - input with pull-up (USBDM)
  * PA12 - input with pull-up (USBDP)
- * Everything input with pull-up except:
- * PA10 - Push pull output   (USB 1:ON 0:OFF)
  */
 #define VAL_GPIOACRL            0xBBB38888      /*  PA7...PA0 */
 #define VAL_GPIOACRH            0x88888388      /* PA15...PA8 */
diff --git a/tool/stlinkv2.py b/tool/stlinkv2.py
index bbb902f..8597ab7 100755
--- a/tool/stlinkv2.py
+++ b/tool/stlinkv2.py
@@ -227,8 +227,8 @@ class stlinkv2(object):
         self.write_memory_u32(GPIOA+0x04, 0x88888383) # CRH
         self.write_memory_u32(GPIOA+0x00, 0xBBB38888) # CRL
         self.write_memory_u32(GPIOB+0x0c, 0xffffffff) # ODR
-        self.write_memory_u32(GPIOB+0x04, 0x88888883) # CRH
-        self.write_memory_u32(GPIOB+0x00, 0x88888888) # CRL
+        self.write_memory_u32(GPIOB+0x04, 0x88888888) # CRH
+        self.write_memory_u32(GPIOB+0x00, 0x88888883) # CRL
 
     # For FST-01-00 and FST-01: LED off, USB off
     def finish_gpio(self):