560 lines
12 KiB
C
560 lines
12 KiB
C
#include <stdint.h>
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#include <stdlib.h>
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#include <chopstx.h>
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#include <mcu/stm32l.h>
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#include <contrib/usart.h>
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#define RCC_APB1_1_USART2 (1 << 17)
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#define RCC_APB2_USART1 (1 << 14)
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/* Hardware registers */
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struct USART {
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volatile uint32_t CR1;
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volatile uint32_t CR2;
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volatile uint32_t CR3;
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volatile uint32_t BRR;
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volatile uint32_t GTPR;
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volatile uint32_t RTOR;
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volatile uint32_t RQR;
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volatile uint32_t ISR;
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volatile uint32_t ICR;
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volatile uint32_t RDR;
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volatile uint32_t TDR;
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};
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#define USART1_BASE (APB2PERIPH_BASE + 0x3800)
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#define USART1 ((struct USART *)USART1_BASE)
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#define USART2_BASE (APB1PERIPH_BASE + 0x4400)
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#define USART2 ((struct USART *)USART2_BASE)
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#define USART_ISR_CTS (1 << 10)
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#define USART_ISR_LBDF (1 << 8)
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#define USART_ISR_TXE (1 << 7)
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#define USART_ISR_TC (1 << 6)
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#define USART_ISR_RXNE (1 << 5)
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#define USART_ISR_IDLE (1 << 4)
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#define USART_ISR_ORE (1 << 3)
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#define USART_ISR_NE (1 << 2)
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#define USART_ISR_FE (1 << 1)
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#define USART_ISR_PE (1 << 0)
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#define USART_CR1_M1 (1 << 28)
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#define USART_CR1_M0 (1 << 12)
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#define USART_CR1_WAKE (1 << 11)
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#define USART_CR1_PCE (1 << 10)
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#define USART_CR1_PS (1 << 9)
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#define USART_CR1_PEIE (1 << 8)
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#define USART_CR1_TXEIE (1 << 7)
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#define USART_CR1_TCIE (1 << 6)
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#define USART_CR1_RXNEIE (1 << 5)
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#define USART_CR1_IDLEIE (1 << 4)
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#define USART_CR1_TE (1 << 3)
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#define USART_CR1_RE (1 << 2)
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#define USART_CR1_UESM (1 << 1)
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#define USART_CR1_UE (1 << 0)
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#define USART_CR3_CTSE (1 << 9)
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#define USART_CR3_RTSE (1 << 8)
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#define USART_CR3_SCEN (1 << 5)
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#define USART_CR3_NACK (1 << 4)
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static struct usart_stat usart2_stat;
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static struct chx_intr usart1_intr;
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static struct chx_intr usart2_intr;
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#define BUF_A2H_SIZE 256
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#define BUF_H2A_SIZE 512
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static uint8_t buf_usart2_rb_a2h[BUF_A2H_SIZE];
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static uint8_t buf_usart2_rb_h2a[BUF_H2A_SIZE];
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static struct rb usart2_rb_a2h;
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static struct rb usart2_rb_h2a;
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static chopstx_poll_cond_t usart2_app_write_event;
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/* Global variables so that it can be easier to debug. */
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static int usart2_tx_ready;
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#define INTR_REQ_USART1 37
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#define INTR_REQ_USART2 38
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#define USART_DEVNO_START 1
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#define USART_DEVNO_END 2
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struct usart {
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struct USART *USART;
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struct chx_intr *intr;
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uint8_t irq_num;
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struct usart_stat *stat;
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struct rb *rb_a2h;
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struct rb *rb_h2a;
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uint8_t *buf_a2h;
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uint8_t *buf_h2a;
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chopstx_poll_cond_t *app_write_event;
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int *tx_ready;
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};
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static const struct usart usart_array[] =
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{
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{ USART1, &usart1_intr, INTR_REQ_USART1,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL,
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},
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{ USART2, &usart2_intr, INTR_REQ_USART2,
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&usart2_stat, &usart2_rb_a2h, &usart2_rb_h2a, buf_usart2_rb_a2h,
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buf_usart2_rb_h2a, &usart2_app_write_event, &usart2_tx_ready,
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},
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};
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#define NUM_USART ((int)(sizeof (usart_array) / sizeof (struct usart)))
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static int handle_intr (struct USART *USARTx, struct rb *rb2a, struct usart_stat *stat);
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static int handle_tx (struct USART *USARTx, struct rb *rb2h, struct usart_stat *stat);
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static void usart_config_recv_enable (struct USART *USARTx, int on);
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struct brr_setting {
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uint8_t baud_spec;
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uint32_t brr_value;
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};
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#define NUM_BAUD (int)(sizeof (brr_table) / sizeof (struct brr_setting))
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/* We assume 40MHz f_CK */
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static const struct brr_setting brr_table[] = {
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{ B600, 66667 },
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{ B1200, 33333 },
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{ B2400, 16667 },
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{ B9600, 4167 },
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{ B19200, 2083 },
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{ B57600, 694 },
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{ B115200, 347 },
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{ B230400, 174 },
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{ B460800, 87 },
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{ B921600, 43 },
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{ BSCARD1, 3720 },
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{ BSCARD2, 1860 },
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{ BSCARD4, 930 },
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{ BSCARD8, 465 },
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{ BSCARD12, 310 },
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{ BSCARD16, 233 },
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{ BSCARD20, 186 },
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};
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#include "usart-common.c"
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static void
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usart_config_recv_enable (struct USART *USARTx, int on)
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{
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if (on)
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{
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USARTx->CR1 |= USART_CR1_RE;
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/* Wait for REACK bit. */
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while ((USARTx->ISR & (1 << 22)) == 0)
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;
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}
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else
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USARTx->CR1 &= ~USART_CR1_RE;
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}
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int
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usart_config (uint8_t dev_no, uint32_t config_bits)
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{
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struct USART *USARTx = get_usart_dev (dev_no);
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uint8_t baud_spec = (config_bits & MASK_BAUD);
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int i;
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uint32_t cr1_config = (USART_CR1_UE | USART_CR1_RXNEIE | USART_CR1_TE);
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/* TXEIE/TCIE will be enabled when
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putting char */
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/* No CTSIE, PEIE, IDLEIE, LBDIE */
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if (USARTx == NULL)
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return -1;
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/* Disable USART before configure. */
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USARTx->CR1 &= ~USART_CR1_UE;
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if ((config_bits & MASK_CS) == CS7 && !(config_bits & PARENB))
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cr1_config |= USART_CR1_M1;
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else if (((config_bits & MASK_CS) == CS7 && (config_bits & PARENB))
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|| ((config_bits & MASK_CS) == CS8 && (config_bits & PARENB) == 0))
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;
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else if ((config_bits & MASK_CS) == CS8)
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cr1_config |= USART_CR1_M0;
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else
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return -1;
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if ((config_bits & PARENB))
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cr1_config |= (USART_CR1_PCE | USART_CR1_PEIE);
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if ((config_bits & PARODD))
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cr1_config |= USART_CR1_PS;
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if ((config_bits & MASK_STOP) == STOP0B5)
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USARTx->CR2 = (0x1 << 12);
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else if ((config_bits & MASK_STOP) == STOP1B)
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USARTx->CR2 = (0x0 << 12);
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else if ((config_bits & MASK_STOP) == STOP1B5)
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USARTx->CR2 = (0x3 << 12);
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else /* if ((config_bits & MASK_STOP) == STOP2B) */
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USARTx->CR2 = (0x2 << 12);
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for (i = 0; i < NUM_BAUD; i++)
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if (brr_table[i].baud_spec == baud_spec)
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break;
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if (i >= NUM_BAUD)
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return -1;
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USARTx->BRR = brr_table[i].brr_value;
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if ((config_bits & MASK_FLOW))
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USARTx->CR3 = USART_CR3_CTSE | USART_CR3_RTSE;
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else
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USARTx->CR3 = 0;
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if ((config_bits & MASK_MODE))
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{
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if ((config_bits & MASK_MODE) == MODE_SMARTCARD)
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{
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USARTx->GTPR = (1 << 8) | 5;
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USARTx->CR3 |= (USART_CR3_SCEN | USART_CR3_NACK);
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}
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else if ((config_bits & MASK_MODE) == MODE_IRDA)
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USARTx->CR3 |= (1 << 1);
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else if ((config_bits & MASK_MODE) == MODE_IRDA_LP)
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USARTx->CR3 |= (1 << 2) | (1 << 1);
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}
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else
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cr1_config |= USART_CR1_RE;
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USARTx->CR1 = cr1_config;
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/* Wait for TEACK bit. */
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while ((USARTx->ISR & (1 << 21)) == 0)
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;
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return 0;
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}
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void
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usart_init0 (int (*cb) (uint8_t dev_no, uint16_t notify_bits))
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{
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int i;
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ss_notify_callback = cb;
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for (i = 0; i < NUM_USART; i++)
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{
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if (usart_array[i].stat)
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usart_array[i].stat->dev_no = i + USART_DEVNO_START;
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chopstx_claim_irq (usart_array[i].intr, usart_array[i].irq_num);
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}
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/* Enable USART1 clock, and strobe reset. */
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RCC->APB2ENR |= RCC_APB2_USART1;
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RCC->APB2RSTR = RCC_APB2_USART1;
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RCC->APB2RSTR = 0;
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/* Enable USART2 clock, and strobe reset. */
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RCC->APB1ENR1 |= RCC_APB1_1_USART2;
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RCC->APB1RSTR1 = RCC_APB1_1_USART2;
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RCC->APB1RSTR1 = 0;
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}
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#define UART_STATE_BITMAP_RX_CARRIER (1 << 0)
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#define UART_STATE_BITMAP_TX_CARRIER (1 << 1)
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#define UART_STATE_BITMAP_BREAK (1 << 2)
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#define UART_STATE_BITMAP_RINGSIGNAL (1 << 3)
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#define UART_STATE_BITMAP_FRAMING (1 << 4)
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#define UART_STATE_BITMAP_PARITY (1 << 5)
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#define UART_STATE_BITMAP_OVERRUN (1 << 6)
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static int
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handle_intr (struct USART *USARTx, struct rb *rb2a, struct usart_stat *stat)
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{
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int tx_ready = 0;
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uint32_t r = USARTx->ISR;
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int notify_bits = 0;
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int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
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if (smartcard_mode)
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{
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if ((r & USART_ISR_TC))
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{
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tx_ready = 1;
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USARTx->CR1 &= ~USART_CR1_TCIE;
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}
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}
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else
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{
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if ((r & USART_ISR_TXE))
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{
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tx_ready = 1;
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USARTx->CR1 &= ~USART_CR1_TXEIE;
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}
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}
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if ((r & USART_ISR_RXNE))
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{
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uint32_t data = USARTx->RDR;
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/* RDR register should be accessed even if data is not used. */
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asm volatile ("" : : "r" (data) : "memory");
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if ((r & USART_ISR_NE))
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{
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USARTx->ICR |= (1 << 2);
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stat->err_rx_noise++;
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}
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else if ((r & USART_ISR_FE))
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{
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/* NOTE: Noway to distinguish framing error and break */
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USARTx->ICR |= (1 << 1);
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stat->rx_break++;
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notify_bits |= UART_STATE_BITMAP_BREAK;
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}
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else if ((r & USART_ISR_PE))
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{
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USARTx->ICR |= (1 << 0);
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stat->err_rx_parity++;
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notify_bits |= UART_STATE_BITMAP_PARITY;
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}
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else
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{
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if ((r & USART_ISR_ORE))
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{
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USARTx->ICR |= (1 << 3);
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stat->err_rx_overrun++;
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notify_bits |= UART_STATE_BITMAP_OVERRUN;
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}
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/* XXX: if CS is 7-bit, mask it, or else parity bit in upper layer */
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if (rb_ll_put (rb2a, (data & 0xff)) < 0)
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stat->err_rx_overflow++;
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else
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stat->rx++;
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}
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}
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else if ((r & USART_ISR_ORE))
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{ /* Clear ORE */
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USARTx->ICR |= (1 << 3);
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stat->err_rx_overrun++;
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notify_bits |= UART_STATE_BITMAP_OVERRUN;
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}
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if (notify_bits)
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{
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if (ss_notify_callback
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&& (*ss_notify_callback) (stat->dev_no, notify_bits))
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stat->err_notify_overflow++;
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}
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return tx_ready;
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}
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static int
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handle_tx (struct USART *USARTx, struct rb *rb2h, struct usart_stat *stat)
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{
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int tx_ready = 1;
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int c = rb_ll_get (rb2h);
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if (c >= 0)
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{
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uint32_t r;
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int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
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USARTx->TDR = (c & 0xff);
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stat->tx++;
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r = USARTx->ISR;
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if (smartcard_mode)
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{
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if ((r & USART_ISR_TC) == 0)
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{
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tx_ready = 0;
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USARTx->CR1 |= USART_CR1_TCIE;
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}
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}
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else
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{
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if ((r & USART_ISR_TXE) == 0)
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{
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tx_ready = 0;
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USARTx->CR1 |= USART_CR1_TXEIE;
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}
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}
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}
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return tx_ready;
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}
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int
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usart_send_break (uint8_t dev_no)
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{
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struct USART *USARTx = get_usart_dev (dev_no);
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if (USARTx == NULL)
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return -1;
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if ((USARTx->ISR & (1 << 18)))
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return 1; /* Busy sending break, which was requested before. */
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/* ??? Should we check TX is empty? */
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USARTx->RQR |= 0x02;
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return 0;
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}
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int
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usart_block_sendrecv (uint8_t dev_no, const char *s_buf, uint16_t s_buflen,
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char *r_buf, uint16_t r_buflen,
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uint32_t *timeout_block_p, uint32_t timeout_char)
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{
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uint32_t timeout;
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uint8_t *p;
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int len;
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uint32_t r;
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uint32_t data;
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struct USART *USARTx = get_usart_dev (dev_no);
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int smartcard_mode = ((USARTx->CR3 & USART_CR3_SCEN) != 0);
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struct chx_intr *usartx_intr = get_usart_intr (dev_no);
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struct chx_poll_head *ph[1];
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if (usartx_intr == NULL)
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return -1;
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ph[0] = (struct chx_poll_head *)usartx_intr;
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p = (uint8_t *)s_buf;
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if (p)
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{
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if (smartcard_mode)
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usart_config_recv_enable (USARTx, 0);
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USARTx->CR1 |= USART_CR1_TXEIE;
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/* Sending part */
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while (1)
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{
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chopstx_poll (NULL, 1, ph);
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r = USARTx->ISR;
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/* Here, ignore recv error(s). */
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if ((r & USART_ISR_RXNE))
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{
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data = USARTx->RDR;
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asm volatile ("" : : "r" (data) : "memory");
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USARTx->ICR |= ((1 << 2) | (1 << 1) | (1 << 0));
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}
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else if ((r & USART_ISR_ORE))
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{
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USARTx->ICR |= (1 << 3);
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}
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if ((r & USART_ISR_TXE))
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{
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if (s_buflen == 0)
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break;
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else
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{
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/* Keep TXEIE bit */
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USARTx->TDR = *p++;
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s_buflen--;
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}
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}
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chopstx_intr_done (usartx_intr);
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}
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USARTx->CR1 &= ~USART_CR1_TXEIE;
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if (smartcard_mode)
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{
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if (timeout_block_p && (*timeout_block_p))
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do
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r = USARTx->ISR;
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while (((r & USART_ISR_TC) == 0));
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usart_config_recv_enable (USARTx, 1);
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if (timeout_block_p && *timeout_block_p == 0)
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{
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/* Ignoring the echo back. */
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do
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r = USARTx->ISR;
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while (((r & USART_ISR_TC) == 0));
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if ((r & USART_ISR_RXNE))
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{
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data = USARTx->RDR;
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asm volatile ("" : : "r" (data) : "memory");
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}
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*timeout_block_p = timeout_char;
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}
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}
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chopstx_intr_done (usartx_intr);
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}
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if (r_buf == NULL)
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return 0;
|
||
|
||
if (!p)
|
||
if (smartcard_mode)
|
||
usart_config_recv_enable (USARTx, 1);
|
||
|
||
/* Receiving part */
|
||
r = chopstx_poll (timeout_block_p, 1, ph);
|
||
if (r == 0)
|
||
return 0;
|
||
|
||
p = (uint8_t *)r_buf;
|
||
len = 0;
|
||
|
||
while (1)
|
||
{
|
||
r = USARTx->ISR;
|
||
|
||
data = USARTx->RDR;
|
||
asm volatile ("" : : "r" (data) : "memory");
|
||
|
||
if ((r & USART_ISR_RXNE))
|
||
{
|
||
if ((r & USART_ISR_NE) || (r & USART_ISR_FE) || (r & USART_ISR_PE))
|
||
{
|
||
/* ignore error, for now. XXX: ss_notify */
|
||
/* Clear the error flag(s) */
|
||
USARTx->ICR |= ((1 << 2) | (1 << 1) | (1 << 0));
|
||
}
|
||
else
|
||
{
|
||
*p++ = (data & 0xff);
|
||
len++;
|
||
r_buflen--;
|
||
if (r_buflen == 0)
|
||
{
|
||
chopstx_intr_done (usartx_intr);
|
||
break;
|
||
}
|
||
}
|
||
}
|
||
else if ((r & USART_ISR_ORE))
|
||
{
|
||
/* ignore error, for now. XXX: ss_notify */
|
||
/* Clear the error flag */
|
||
USARTx->ICR |= (1 << 3);
|
||
}
|
||
|
||
chopstx_intr_done (usartx_intr);
|
||
timeout = timeout_char;
|
||
r = chopstx_poll (&timeout, 1, ph);
|
||
if (r == 0)
|
||
break;
|
||
}
|
||
|
||
return len;
|
||
}
|