66 lines
2.3 KiB
Plaintext
66 lines
2.3 KiB
Plaintext
NEWS - Noteworthy changes
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* Major changes in Chopstx 0.03
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Released 2013-11-08, by NIIBE Yutaka
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** Bug fix of preemption
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In the implementation of preemption, there was a bug which might cause
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not to schedule proper thread. This is because the routine preepmt
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itself might be interrupted. This is now fixed in 0.03.
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* Major changes in Chopstx 0.02
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Released 2013-11-08, by NIIBE Yutaka
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** Bug fix of priority
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There was a severe bug about the configuraion of priority setting of
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exceptions. As we don't use any inter-lock between interrupts hander
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and timer expiration handler, these priorities should be equal. If
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not, timer expiration handler might interrupt the execution of
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interrupts handers.
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* Major changes in Chopstx 0.01
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Released 2013-11-03, by NIIBE Yutaka
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** Interrupt handling change
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There was a bug in 0.00, which caused spurious interrupts. Every
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interrupt event caused two events. Specifically, after valid
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interrupt event (for the caller of chopstx_intr_wait), another
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spurious event was always occurred. This was fixed.
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In the design of Chopstx, interrupt handling is done by a thread.
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Lower level interrupt handler just accepts interrupt, disabling the
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interrupt, and switchs the control to the thread. It is the thread to
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check the cause of interrupt, to process it, and to clear the cause.
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Next call to chopstx_intr_wait will enable the interrupt again.
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The bug was related to pending interrupt flag. Pending interrupt flag
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for a specific interrupt is set, on return from handler mode if the
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cause is still active. With traditional interrupt handling, lower
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level interrupt handler processes it and clears the cause. Thus,
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pending interrupt flag is not set on return.
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In Chopstx, pending interrupt flag was always set, because the control
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goes from lower level interrupt handler (in handler mode) to a
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interrupt handling thread which processes the interrupt. In 0.01, new
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internal routine chx_clr_intr is introduced, and pending interrupt
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flag is cleared within chopstx_intr_wait after waked up.
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For detail of interrupt operation, see the section B.3.4, Nested
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Vectored Interrupt Controller (NVIC), in the ARM v7-M Architecture
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Reference Manual. The subsection, B3.4.1, Theory of operation,
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explains how it works.
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** gpio_init change
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Now, gpi_init support AFIO mapping and another GPIO (GPIO_OTHER)
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settings.
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Local Variables:
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mode: outline
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End:
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