111 lines
3.2 KiB
C
111 lines
3.2 KiB
C
/*
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* clk_gpio_init-stm32l.c - Clock and GPIO initialization for STM32L.
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*
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* Copyright (C) 2019 Flying Stone Technology
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* Author: NIIBE Yutaka <gniibe@fsij.org>
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*
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* This file is a part of Chopstx, a thread library for embedded.
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*
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* Chopstx is free software: you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* (at your option) any later version.
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*
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* Chopstx is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*
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* As additional permission under GNU GPL version 3 section 7, you may
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* distribute non-source form of the Program without the copy of the
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* GNU GPL normally required by section 4, provided you inform the
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* recipients of GNU GPL by a written offer.
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*
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*/
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#include <mcu/stm32l.h>
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#define STM32_FLASHBITS 0x00000704
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void
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clock_init (void)
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{
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/* MSI: 4MHz (keep the default value) */
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/* PLL input: MSI at 4MHz, VCO: 160 MHz, output 80MHz */
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RCC->PLLCFGR = ((1 << 24) | (40 << 8)) | 0x01;
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/* Enable PLL */
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RCC->CR |= (1 << 24);
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while (!(RCC->CR & (1 << 25)))
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;
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/* Flash setup: four wait states at 80MHz */
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FLASH->ACR = STM32_FLASHBITS;
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while ((FLASH->ACR & 0x07) != (STM32_FLASHBITS & 0x07))
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;
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/* Configure bus clocks: AHB: 80MHz, APB1: 40MHz, APB2: 80MHz */
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RCC->CFGR = (0x04 << 8);
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/* Switch SYSCLOCK using PLL */
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RCC->CFGR |= 0x03;
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while ((RCC->CFGR & 0x0C) != 0x0C)
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;
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/* Peripheral clock selection */
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RCC->CCIPR = ( (0x00 << 26) | /* HSI48 for USB */
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(0x00 << 2) | /* PCLK for USART2 */
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(0x00 << 0) ); /* PCLK for USART1 */
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/* Enable HSI48 clock */
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RCC->CRRCR |= 1;
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while ((RCC->CRRCR & 0x02) == 0)
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;
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}
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static struct GPIO *const GPIO_LED = (struct GPIO *)GPIO_LED_BASE;
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#ifdef GPIO_USB_BASE
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static struct GPIO *const GPIO_USB = (struct GPIO *)GPIO_USB_BASE;
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#endif
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#ifdef GPIO_OTHER_BASE
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static struct GPIO *const GPIO_OTHER = (struct GPIO *)GPIO_OTHER_BASE;
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#endif
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void
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gpio_init (void)
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{
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/* Enable GPIO clock. */
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RCC->AHB2ENR |= RCC_AHB2_GPIO;
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/* Delay (more than two clocks) is needed. */
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while ((RCC->AHB2ENR & RCC_AHB2_GPIO) == 0)
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;
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RCC->AHB2RSTR = RCC_AHB2_GPIO;
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RCC->AHB2RSTR = 0;
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/* Delay (more than two clocks) is needed. */
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while (RCC->AHB2RSTR != 0)
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;
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/* LED is mandatory. We configure it always. */
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GPIO_LED->OSPEEDR = VAL_GPIO_LED_OSPEEDR;
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GPIO_LED->OTYPER = VAL_GPIO_LED_OTYPER;
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GPIO_LED->MODER = VAL_GPIO_LED_MODER;
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GPIO_LED->PUPDR = VAL_GPIO_LED_PUPDR;
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GPIO_LED->AFRL = VAL_GPIO_LED_AFRL;
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GPIO_LED->AFRH = VAL_GPIO_LED_AFRH;
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#ifdef GPIO_OTHER_BASE
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GPIO_OTHER->OSPEEDR = VAL_GPIO_OTHER_OSPEEDR;
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GPIO_OTHER->OTYPER = VAL_GPIO_OTHER_OTYPER;
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GPIO_OTHER->MODER = VAL_GPIO_OTHER_MODER;
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GPIO_OTHER->PUPDR = VAL_GPIO_OTHER_PUPDR;
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GPIO_OTHER->AFRL = VAL_GPIO_OTHER_AFRL;
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GPIO_OTHER->AFRH = VAL_GPIO_OTHER_AFRH;
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#endif
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}
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