Version 1.2

ChangeLog

@@ -1,3 +1,49 @@
+2016-10-13  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.2.
+	* doc/chopstx.texi (VERSION): 1.2.
+
+2016-10-12  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.c (chopstx_join, chopstx_cancel): chopstx_join is
+	cancellation point.
+
+2016-07-11  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* mcu/stm32f103.h: Add more from Gnuk 1.1.9.
+	* example-cdc, example-fs-bb48, example-fsm-55, example-led:
+	Update for stack addr/size.
+
+2016-07-01  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* VERSION: 1.1.
+	* doc/chopstx.texi (VERSION): 1.1.
+
+	* chopstx.c (chopstx_setpriority): Change the API.
+
+2016-06-30  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-cdc/usb-cdc.c (tty_recv, tty_main): Follow the change of
+	chopstx_poll.
+
+2016-06-29  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* example-fs-bb48: Update.
+	* example-fs-bb48/touch.c: New.
+
+	* chopstx.c (chopstx_setpriority): Fix sched_lock/unlock.
+
+2016-06-28  NIIBE Yutaka  <gniibe@fsij.org>
+
+	* chopstx.h (struct chx_poll_head): Declare here.
+
+	* chopstx.c (chopstx_poll): Don't use varargs, but use
+	an array of pointer.
+	(chopstx_intr_wait): Follow the change of chopstx_poll.
+	* eventflag.c (eventflag_wait_timeout): Likewise.
+	* contrib/adc-stm32f103.c (adc_wait_completion): Likewise.
+	* contrib/adc-mkl27z.c (adc_wait_completion): Likewise.
+
 2016-06-16  Niibe Yutaka  <gniibe@fsij.org>
 
 	* VERSION: 1.0.

NEWS

@@ -1,6 +1,30 @@
 NEWS - Noteworthy changes
 
 
+* Major changes in Chopstx 1.2
+
+  Released 2016-10-13
+
+** Fix: chopstx_join
+chopstx_join is now cancellation point.
+
+
+* Major changes in Chopstx 1.1
+
+  Released 2016-07-01
+
+** API change: chopstx_poll
+In version 1.0, chopstx_poll has variable arguments.  It found that
+it's challenging for ffi or lower level C implementation, if C
+compiler is new for the specific MCU target.  Another example is that
+a program touches FPU registers for varargs, even if no argument is
+float.  So, we decided to avoid use of varargs in Chopstx.
+
+** API change: chopstx_setpriority
+In version 1.0, chopstx_setpriority does not return value.  It is
+changed to return old value of the priority.
+
+
 * Major changes in Chopstx 1.0
 
   Released 2016-06-16

README

@@ -1,6 +1,6 @@
 Chopstx - Threads and only Threads
-							 Version 1.0
-							  2016-06-16
+							 Version 1.2
+							  2016-10-13
 							Niibe Yutaka
 					     Flying Stone Technology
 
@@ -45,8 +45,9 @@ For STM32 Primer2, see the directory: example-primer2.
 Future Works
 ============
 
-Convenience function to determine the bottom of thread stack, thread
-local storage would be next things to be done.
+Convenience function to determine the bottom of thread stack,
+configuration of thread size by comiler's output would be next things
+to be done.
 
 Experimental SMP port for Cortex-A7 is under development.  For SMP,
 more careful considerations for shared access to objects of struct

VERSION

@@ -1 +1 @@
-release/1.0
+release/1.2

chopstx.c

@@ -104,9 +104,9 @@
  * System tick
  */
 /* SysTick registers.  */
-static volatile uint32_t *const SYST_CSR = (uint32_t *const)0xE000E010;
-static volatile uint32_t *const SYST_RVR = (uint32_t *const)0xE000E014;
-static volatile uint32_t *const SYST_CVR = (uint32_t *const)0xE000E018;
+static volatile uint32_t *const SYST_CSR = (uint32_t *)0xE000E010;
+static volatile uint32_t *const SYST_RVR = (uint32_t *)0xE000E014;
+static volatile uint32_t *const SYST_CVR = (uint32_t *)0xE000E018;
 
 static void
 chx_systick_reset (void)
@@ -158,7 +158,7 @@ struct NVIC {
   volatile uint32_t IPR[60];
 };
 
-static struct NVIC *const NVIC = (struct NVIC *const)0xE000E100;
+static struct NVIC *const NVIC = (struct NVIC *)0xE000E100;
 #define NVIC_ISER(n)	(NVIC->ISER[n >> 5])
 #define NVIC_ICER(n)	(NVIC->ICER[n >> 5])
 #define NVIC_ICPR(n)	(NVIC->ICPR[n >> 5])
@@ -192,12 +192,12 @@ chx_set_intr_prio (uint8_t n)
     | (CPU_EXCEPTION_PRIORITY_INTERRUPT << sh);
 }
 
-static volatile uint32_t *const ICSR = (uint32_t *const)0xE000ED04;
+static volatile uint32_t *const ICSR = (uint32_t *)0xE000ED04;
 
 /* Priority control.  */
-static uint32_t *const AIRCR = (uint32_t *const)0xE000ED0C;
-static uint32_t *const SHPR2 = (uint32_t *const)0xE000ED1C;
-static uint32_t *const SHPR3 = (uint32_t *const)0xE000ED20;
+static uint32_t *const AIRCR = (uint32_t *)0xE000ED0C;
+static uint32_t *const SHPR2 = (uint32_t *)0xE000ED1C;
+static uint32_t *const SHPR3 = (uint32_t *)0xE000ED20;
 
 static void
 chx_prio_init (void)
@@ -335,11 +335,6 @@ struct chx_thread {		/* inherits PQ */
   struct chx_cleanup *clp;
 };
 
-struct chx_poll_head {
-  uint16_t type;
-  uint16_t ready;
-};
-
 
 static void
 chx_cpu_sched_lock (void)
@@ -1464,7 +1459,7 @@ chx_intr_hook (struct chx_px *px, struct chx_poll_head *pd)
 void
 chopstx_intr_wait (chopstx_intr_t *intr)
 {
-  chopstx_poll (NULL, 1, intr);
+  chopstx_poll (NULL, 1, (struct chx_poll_head **)&intr);
 }
 
 
@@ -1564,6 +1559,8 @@ chopstx_join (chopstx_t thd, void **ret)
    * We don't offer deadlock detection.  It's users' responsibility.
    */
 
+  chopstx_testcancel ();
+
   chx_cpu_sched_lock ();
   if (tp->flag_detached)
     {
@@ -1666,7 +1663,7 @@ chopstx_cancel (chopstx_t thd)
       return;
     }
 
-  /* Cancellation points: cond_wait, usec_wait, and poll.  */
+  /* Cancellation points: cond_wait, usec_wait, join, and poll.  */
   if (tp->state == THREAD_WAIT_CND)
     {
       struct chx_cond *cond = (struct chx_cond *)tp->parent;
@@ -1677,6 +1674,12 @@ chopstx_cancel (chopstx_t thd)
     }
   else if (tp->state == THREAD_WAIT_TIME)
     chx_timer_dequeue (tp);
+  else if (tp->state == THREAD_WAIT_EXIT)
+    {
+      chx_spin_lock (&q_join.lock);
+      ll_dequeue ((struct chx_pq *)tp);
+      chx_spin_unlock (&q_join.lock);
+    }
   else if (tp->state == THREAD_WAIT_POLL)
     {
       if (tp->parent == &q_timer.q)
@@ -1749,17 +1752,17 @@ chx_proxy_init (struct chx_px *px, uint32_t *cp)
  * chopstx_poll - wait for condition variable, thread's exit, or IRQ
  * @usec_p: Pointer to usec for timeout.  Forever if NULL.
  * @n: Number of poll descriptors
- * @VARARGS: Pointers to an object which should be one of:
+ * @pd_array: Pointer to an array of poll descriptor pointer which
+ * should be one of:
  *           chopstx_poll_cond_t, chopstx_poll_join_t, or chopstx_intr_t.
  *
  * Returns number of active descriptors.
  */
 int
-chopstx_poll (uint32_t *usec_p, int n, ...)
+chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *pd_array[])
 {
   uint32_t counter = 0;
   int i;
-  va_list ap;
   struct chx_px px[n];
   struct chx_poll_head *pd;
   int r = 0;
@@ -1769,10 +1772,9 @@ chopstx_poll (uint32_t *usec_p, int n, ...)
   for (i = 0; i < n; i++)
     chx_proxy_init (&px[i], &counter);
 
-  va_start (ap, n);
   for (i = 0; i < n; i++)
     {
-      pd = va_arg (ap, struct chx_poll_head *);
+      pd = pd_array[i];
       pd->ready = 0;
       px[i].ready_p = &pd->ready;
       if (pd->type == CHOPSTX_POLL_COND)
@@ -1782,7 +1784,6 @@ chopstx_poll (uint32_t *usec_p, int n, ...)
       else
 	chx_join_hook (&px[i], pd);
     }
-  va_end (ap);
 
   chx_cpu_sched_lock ();
   chx_spin_lock (&px->lock);
@@ -1818,11 +1819,9 @@ chopstx_poll (uint32_t *usec_p, int n, ...)
       while (r == 0);
     }
 
-  va_start (ap, n);
   for (i = 0; i < n; i++)
     {
-      pd = va_arg (ap, struct chx_poll_head *);
-
+      pd = pd_array[i];
       chx_cpu_sched_lock ();
       chx_spin_lock (&px[i].lock);
       if (pd->type == CHOPSTX_POLL_COND)
@@ -1864,7 +1863,6 @@ chopstx_poll (uint32_t *usec_p, int n, ...)
       chx_spin_unlock (&px[i].lock);
       chx_cpu_sched_unlock ();
     }
-  va_end (ap);
 
   if (r < 0)
     chopstx_exit (CHOPSTX_CANCELED);
@@ -1878,6 +1876,7 @@ chopstx_poll (uint32_t *usec_p, int n, ...)
  * @prio: priority
  *
  * Change the schedule priority with @prio.
+ * Returns the old priority.
  *
  * In general, it is not recommended to use this function because
  * dynamically changing schedule priorities complicates the system.
@@ -1885,15 +1884,33 @@ chopstx_poll (uint32_t *usec_p, int n, ...)
  * which starts its execution with priority of CHX_PRIO_MAIN_INIT, and
  * let it change its priority after initialization of other threads.
  */
-void
-chopstx_setpriority (chopstx_prio_t prio)
+chopstx_prio_t
+chopstx_setpriority (chopstx_prio_t prio_new)
 {
   struct chx_thread *tp = running;
+  chopstx_prio_t prio_orig, prio_cur;
 
-  tp->prio_orig = prio;
-  if (prio >= CHOPSTX_PRIO_INHIBIT_PREEMPTION)
-    chx_cpu_sched_lock ();
-  tp->prio = prio;
+  chx_cpu_sched_lock ();
+  prio_orig = tp->prio_orig;
+  prio_cur = tp->prio;
+
+  tp->prio_orig = prio_new;
+  if (prio_cur == prio_orig)
+    /* No priority inheritance is active.  */
+    tp->prio = prio_new;
+  else
+    /* Priority inheritance is active.  */
+    /* In this case, only when new priority is greater, change the
+       priority of this thread.  */
+    if (prio_new > prio_cur)
+      tp->prio = prio_new;
+
+  if (tp->prio < prio_cur)
+    chx_sched (CHX_YIELD);
+  else if (tp->prio < CHOPSTX_PRIO_INHIBIT_PREEMPTION)
+    chx_cpu_sched_unlock ();
+
+  return prio_orig;
 }
 
 /*

chopstx.h

@@ -113,7 +113,7 @@ typedef struct chx_cleanup {
 void chopstx_cleanup_push (chopstx_cleanup_t *clp);
 void chopstx_cleanup_pop (int execute);
 
-void chopstx_setpriority (chopstx_prio_t);
+chopstx_prio_t chopstx_setpriority (chopstx_prio_t);
 
 enum {
   CHOPSTX_POLL_COND = 0,
@@ -121,6 +121,11 @@ enum {
   CHOPSTX_POLL_JOIN,
 };
 
+struct chx_poll_head {
+  uint16_t type;
+  uint16_t ready;
+};
+
 struct chx_poll_cond {
   uint16_t type;
   uint16_t ready;
@@ -153,6 +158,6 @@ void chopstx_claim_irq (chopstx_intr_t *intr, uint8_t irq_num);
 void chopstx_intr_wait (chopstx_intr_t *intr); /* DEPRECATED */
 
 
-int chopstx_poll (uint32_t *usec_p, int n, ...);
+int chopstx_poll (uint32_t *usec_p, int n, struct chx_poll_head *pd_array[]);
 
 #define CHOPSTX_THREAD_SIZE 64

contrib/adc-mkl27z.c

@@ -40,7 +40,7 @@ struct DMAMUX {
   volatile uint32_t CHCFG2;
   volatile uint32_t CHCFG3;
 };
-static struct DMAMUX *const DMAMUX = (struct DMAMUX *const)0x40021000;
+static struct DMAMUX *const DMAMUX = (struct DMAMUX *)0x40021000;
 
 #define INTR_REQ_DMA0 0
 
@@ -50,8 +50,8 @@ struct DMA {
   volatile uint32_t DSR_BCR;
   volatile uint32_t DCR;
 };
-static struct DMA *const DMA0 = (struct DMA *const)0x40008100;
-static struct DMA *const DMA1 = (struct DMA *const)0x40008110;
+static struct DMA *const DMA0 = (struct DMA *)0x40008100;
+static struct DMA *const DMA1 = (struct DMA *)0x40008110;
 
 
 /* We don't use ADC interrupt.  Just for reference.  */
@@ -92,7 +92,7 @@ struct ADC {
   volatile uint32_t CLM1;
   volatile uint32_t CLM0;
 };
-static struct ADC *const ADC0 = (struct ADC *const)0x4003B000;
+static struct ADC *const ADC0 = (struct ADC *)0x4003B000;
 
 /* SC1 */
 #define ADC_SC1_DIFF            (1 << 5)
@@ -295,12 +295,13 @@ adc_stop (void)
 int
 adc_wait_completion (void)
 {
+  struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr };
+  int i;
+
   while (1)
     {
-      int i;
-
       /* Wait DMA completion */
-      chopstx_poll (NULL, 1, &adc_intr);
+      chopstx_poll (NULL, 1, pd_array);
 
       DMA0->DSR_BCR = (1 << 24);
       DMA1->DSR_BCR = (1 << 24);

contrib/adc-stm32f103.c

@@ -298,10 +298,11 @@ int
 adc_wait_completion (void)
 {
   uint32_t flags;
+  struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&adc_intr };
 
   while (1)
     {
-      chopstx_poll (NULL, 1, &adc_intr);
+      chopstx_poll (NULL, 1, pd_array);
       flags = DMA1->ISR & STM32_DMA_ISR_MASK; /* Channel 1 interrupt cause.  */
       /*
        * Clear interrupt cause of channel 1.

doc/chopstx-api.texi

@@ -176,20 +176,23 @@ Returns old state which is 0 when it was enabled.
 
 @subheading chopstx_poll
 @anchor{chopstx_poll}
-@deftypefun {int} {chopstx_poll} (uint32_t * @var{usec_p}, int @var{n},  @var{...})
+@deftypefun {int} {chopstx_poll} (uint32_t * @var{usec_p}, int @var{n}, struct chx_poll_head * [] @var{pd_array})
 @var{usec_p}: Pointer to usec for timeout.  Forever if NULL.
 
 @var{n}: Number of poll descriptors
 
+@var{pd_array}: Pointer to an array of poll descriptor pointer which
+should be one of:
+chopstx_poll_cond_t, chopstx_poll_join_t, or chopstx_intr_t.
+
 Returns number of active descriptors.
 @end deftypefun
 
 @subheading chopstx_setpriority
 @anchor{chopstx_setpriority}
-@deftypefun {void} {chopstx_setpriority} (chopstx_prio_t @var{prio})
-@var{prio}: priority
-
+@deftypefun {chopstx_prio_t} {chopstx_setpriority} (chopstx_prio_t @var{prio_new})
 Change the schedule priority with @var{prio}.
+Returns the old priority.
 
 In general, it is not recommended to use this function because
 dynamically changing schedule priorities complicates the system.

doc/chopstx.texi

@@ -1,7 +1,7 @@
 \input texinfo                      @c -*-texinfo-*-
 @c %**start of header
 @setfilename chopstx.info
-@set VERSION 1.0
+@set VERSION 1.2
 @settitle Chopstx Reference Manual
 @c Unify some of the indices.
 @syncodeindex tp fn

eventflag.c

@@ -111,9 +111,10 @@ eventmask_t
 eventflag_wait_timeout (struct eventflag *ev, uint32_t usec)
 {
   chopstx_poll_cond_t poll_desc;
+  struct chx_poll_head *pd_array[1] = { (struct chx_poll_head *)&poll_desc };
 
   eventflag_prepare_poll (ev, &poll_desc);
-  chopstx_poll (&usec, 1, &poll_desc);
+  chopstx_poll (&usec, 1, pd_array);
   return eventflag_get (ev);
 }
 

example-cdc/sample.c

@@ -61,14 +61,14 @@ blk (void *arg)
 #define PRIO_PWM 3
 #define PRIO_BLK 2
 
-extern uint8_t __process1_stack_base__, __process1_stack_size__;
-extern uint8_t __process2_stack_base__, __process2_stack_size__;
+extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
+extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
 
-const uint32_t __stackaddr_pwm = (uint32_t)&__process1_stack_base__;
-const size_t __stacksize_pwm = (size_t)&__process1_stack_size__;
+#define STACK_ADDR_PWM ((uint32_t)__process1_stack_base__)
+#define STACK_SIZE_PWM ((uint32_t)__process1_stack_size__)
 
-const uint32_t __stackaddr_blk = (uint32_t)&__process2_stack_base__;
-const size_t __stacksize_blk = (size_t)&__process2_stack_size__;
+#define STACK_ADDR_BLK ((uint32_t)__process2_stack_base__)
+#define STACK_SIZE_BLK ((uint32_t)__process2_stack_size__)
 
 
 static char hexchar (uint8_t x)
@@ -98,8 +98,8 @@ main (int argc, const char *argv[])
 
   m = 10;
 
-  chopstx_create (PRIO_PWM, __stackaddr_pwm, __stacksize_pwm, pwm, NULL);
-  chopstx_create (PRIO_BLK, __stackaddr_blk, __stacksize_blk, blk, NULL);
+  chopstx_create (PRIO_PWM, STACK_ADDR_PWM, STACK_SIZE_PWM, pwm, NULL);
+  chopstx_create (PRIO_BLK, STACK_ADDR_BLK, STACK_SIZE_BLK, blk, NULL);
 
   chopstx_usec_wait (200*1000);
 

example-cdc/usb-cdc.c

@@ -642,9 +642,9 @@ static void *tty_main (void *arg);
 #define INTR_REQ_USB 20
 #define PRIO_TTY      4
 
-extern uint8_t __process3_stack_base__, __process3_stack_size__;
-const uint32_t __stackaddr_tty = (uint32_t)&__process3_stack_base__;
-const size_t __stacksize_tty = (size_t)&__process3_stack_size__;
+extern uint8_t __process3_stack_base__[], __process3_stack_size__[];
+#define STACK_ADDR_TTY ((uint32_t)__process3_stack_base__)
+#define STACK_SIZE_TTY ((uint32_t)__process3_stack_size__)
 
 struct tty *
 tty_open (void)
@@ -659,7 +659,7 @@ tty_open (void)
   tty0.device_state = UNCONNECTED;
   memcpy (&tty0.line_coding, &line_coding0, sizeof (struct line_coding));
 
-  chopstx_create (PRIO_TTY, __stackaddr_tty, __stacksize_tty, tty_main, &tty0);
+  chopstx_create (PRIO_TTY, STACK_ADDR_TTY, STACK_SIZE_TTY, tty_main, &tty0);
   return &tty0;
 }
 
@@ -699,7 +699,7 @@ tty_main (void *arg)
 
   while (1)
     {
-      chopstx_poll (NULL, 1, &usb_intr);
+      chopstx_intr_wait (&usb_intr);
       if (usb_intr.ready)
 	{
 	  uint8_t ep_num;
@@ -928,7 +928,10 @@ tty_recv (struct tty *t, char *buf, uint32_t *timeout)
 
   while (1)
     {
-      chopstx_poll (timeout, 1, &poll_desc);
+      struct chx_poll_head *pd_array[1] = {
+	(struct chx_poll_head *)&poll_desc
+      };
+      chopstx_poll (timeout, 1, pd_array);
       chopstx_mutex_lock (&t->mtx);
       r = check_rx (t);
       chopstx_mutex_unlock (&t->mtx);

example-fs-bb48/Makefile

@@ -6,7 +6,7 @@ PROJECT = sample
 
 CHOPSTX = ..
 LDSCRIPT= sample.ld
-CSRC = sample.c usb-cdc.c command.c
+CSRC = sample.c usb-cdc.c command.c touch.c
 CHIP=mkl27z
 
 USE_SYS = yes

example-fs-bb48/command.c

@@ -51,7 +51,6 @@ static char hexchar (uint8_t x)
     return '?';
 }
 
-#ifdef ENABLE_DECIMAL_OUTPUT
 static char *
 compose_decimal (char *s, int value)
 {
@@ -87,7 +86,7 @@ compose_decimal (char *s, int value)
 
   return s;
 }
-#endif
+
 
 static char *
 compose_hex (char *s, uint32_t v)
@@ -143,6 +142,68 @@ get_hex (struct tty *tty, const char *s, uint32_t *v_p)
 }
 
 
+#define TOUCH_VALUE_HIGH 100
+#define TOUCH_VALUE_LOW  50
+static void
+cmd_button (struct tty *tty, const char *line)
+{
+  int i = 0;
+  extern uint16_t touch_get (void);
+  uint16_t v0 = 0;
+  int touched = 0;
+
+  (void)line;
+  put_line (tty, "Please touch the bear.\r\n");
+
+  while (i < 16)
+    {
+      uint16_t v = touch_get ();
+      v0 = (v0 * 2 + v)/3;
+
+      if (touched == 0 && v0 > TOUCH_VALUE_HIGH)
+	{
+	  tty_send (tty, "!", 1);
+	  touched = 1;
+	}
+      else if (touched == 1 && v0 < TOUCH_VALUE_LOW)
+	{
+	  tty_send (tty, ".", 1);
+	  touched = 0;
+	  i++;
+	}
+
+      chopstx_usec_wait (10*1000);
+    }
+
+  tty_send (tty, "\r\n", 2);
+}
+
+
+static void
+cmd_touch (struct tty *tty, const char *line)
+{
+  int i;
+  extern uint16_t touch_get (void);
+
+  (void)line;
+  put_line (tty, "Please touch the bear.\r\n");
+
+  for (i = 0; i < 20; i++)
+    {
+      uint16_t v;
+      char output[8];
+      char *s;
+
+      chopstx_usec_wait (1000*1000);
+      v = touch_get ();
+      s = compose_decimal (output, v);
+      *s++ = '\r';
+      *s++ = '\n';
+      tty_send (tty, output, s - output);
+    }
+}
+
+
 static void
 cmd_mdw (struct tty *tty, const char *line)
 {
@@ -425,6 +486,8 @@ cmd_help (struct tty *tty, const char *line)
 
 
 struct command_table command_table[] = {
+  { "button", cmd_button },
+  { "touch", cmd_touch },
   { "mdw", cmd_mdw },
   { "mww", cmd_mww },
   { "fes", cmd_fes },

example-fs-bb48/crc32.c

@@ -1,4 +1,4 @@
-const unsigned int *const crc32_table= (const unsigned int *const)0x00000480;
+const unsigned int *const crc32_table= (const unsigned int *)0x00000480;
 
 void
 crc32_init (unsigned int *p)

example-fs-bb48/sample.c

@@ -7,27 +7,7 @@
 #include "tty.h"
 #include "board.h"
 #include "command.h"
-
-struct GPIO {
-  volatile uint32_t PDOR; /* Port Data Output Register    */
-  volatile uint32_t PSOR; /* Port Set Output Register     */
-  volatile uint32_t PCOR; /* Port Clear Output Register   */
-  volatile uint32_t PTOR; /* Port Toggle Output Register  */
-  volatile uint32_t PDIR; /* Port Data Input Register     */
-  volatile uint32_t PDDR; /* Port Data Direction Register */
-};
-static struct GPIO *const GPIOB = (struct GPIO *const)0x400FF040;
-static struct GPIO *const GPIOD = (struct GPIO *const)0x400FF0C0;
-static struct GPIO *const GPIOE = (struct GPIO *const)0x400FF100;
-
-static void
-set_led (int on)
-{
-  if (on)
-    GPIOB->PCOR = (1 << 0); /* PTB0: Clear: Light on  */
-  else
-    GPIOB->PSOR = (1 << 0); /* PTB0: Set  : Light off */
-}
+#include <sys.h>
 
 static chopstx_mutex_t mtx;
 static chopstx_cond_t cnd0;
@@ -95,14 +75,14 @@ blk (void *arg)
 #define PRIO_PWM 3
 #define PRIO_BLK 2
 
-extern uint8_t __process1_stack_base__, __process1_stack_size__;
-extern uint8_t __process2_stack_base__, __process2_stack_size__;
+extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
+extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
 
-const uint32_t __stackaddr_pwm = (uint32_t)&__process1_stack_base__;
-const size_t __stacksize_pwm = (size_t)&__process1_stack_size__;
+#define STACK_ADDR_PWM ((uint32_t)__process1_stack_base__)
+#define STACK_SIZE_PWM ((uint32_t)__process1_stack_size__)
 
-const uint32_t __stackaddr_blk = (uint32_t)&__process2_stack_base__;
-const size_t __stacksize_blk = (size_t)&__process2_stack_size__;
+#define STACK_ADDR_BLK ((uint32_t)__process2_stack_base__)
+#define STACK_SIZE_BLK ((uint32_t)__process2_stack_size__)
 
 
 static char hexchar (uint8_t x)
@@ -117,6 +97,8 @@ static char hexchar (uint8_t x)
 }
 
 
+extern void touch_init (void);
+
 int
 main (int argc, const char *argv[])
 {
@@ -132,8 +114,8 @@ main (int argc, const char *argv[])
 
   m = 10;
 
-  chopstx_create (PRIO_PWM, __stackaddr_pwm, __stacksize_pwm, pwm, NULL);
-  chopstx_create (PRIO_BLK, __stackaddr_blk, __stacksize_blk, blk, NULL);
+  chopstx_create (PRIO_PWM, STACK_ADDR_PWM, STACK_SIZE_PWM, pwm, NULL);
+  chopstx_create (PRIO_BLK, STACK_ADDR_BLK, STACK_SIZE_BLK, blk, NULL);
 
   chopstx_usec_wait (200*1000);
 
@@ -144,6 +126,8 @@ main (int argc, const char *argv[])
 
   u = 1;
 
+  touch_init ();
+
   tty = tty_open ();
   tty_wait_configured (tty);
 

example-fs-bb48/touch.c

@@ -0,0 +1,98 @@
+#include <stdint.h>
+#include <stdlib.h>
+#include <chopstx.h>
+#include <mcu/mkl27z.h>
+
+struct TPM {
+  volatile uint32_t SC;
+  volatile uint32_t CNT;
+  volatile uint32_t MOD;
+  volatile uint32_t C0SC;
+  volatile uint32_t C0V;
+  volatile uint32_t C1SC;
+  volatile uint32_t C1V;
+  uint32_t rsvd0[13];
+  volatile uint32_t STATUS;
+  uint32_t rsvd1[7];
+  volatile uint32_t POL;
+  uint32_t rsvd2[4];
+  volatile uint32_t CONF;
+};
+
+static struct TPM *const TPM1 = (struct TPM *)0x40039000;
+
+static chopstx_intr_t tpm1_intr;
+#define INTR_REQ_TPM1 18
+
+static void
+gpio_assert_low (void)
+{
+  /* Assert LOW.  */ 
+  PORTB->PCR1 = (1<<8) /* GPIO                  */
+              | (0<<6) /* DriveStrengthEnable=0 */
+              | (0<<4) /* PassiveFilterEnable=0 */
+              | (1<<2) /* SlewRateEnable = slow */
+              | (0<<1) /* pull enable = 0       */ 
+              | (0<<0) /* pull up select= 0         */
+              ;
+
+  GPIOB->PCOR = (1 << 1);            /* PTB1: Clear: Output 0  */
+}
+
+uint16_t
+touch_get (void)
+{
+  chopstx_prio_t prio_old;
+  uint16_t v;
+
+  prio_old = chopstx_setpriority (CHOPSTX_PRIO_INHIBIT_PREEMPTION);
+  /* 
+   * Start the timer's counter. 
+   * TOF clear, TOIE=1, CPWMS=0, CMOD=1, PS=011.
+   */
+  TPM1->SC = 0xcb;
+
+  /* Let the register to pull it up.  */
+  PORTB->PCR1 = (3<<8) /* TPM1_CH1              */
+              | (0<<6) /* DriveStrengthEnable=0 */
+              | (0<<4) /* PassiveFilterEnable=0 */
+              | (1<<2) /* SlewRateEnable = slow */
+              | (0<<1) /* pull enable = 0       */ 
+              | (0<<0) /* pullup select= 0      */
+              ;
+
+  chopstx_setpriority (prio_old);
+
+  chopstx_intr_wait (&tpm1_intr);
+  gpio_assert_low ();
+
+  v = TPM1->C1V;
+
+  /* Clear overflow and CH1 capture.  */
+  TPM1->STATUS = 0x102;
+  /* Stop the timer.  */
+  TPM1->SC = 0;
+  TPM1->CNT = 0xffff;	   /* Writing causes reset of the counter.  */
+
+  return v;
+}
+
+
+void
+touch_init (void)
+{
+  chopstx_claim_irq (&tpm1_intr, INTR_REQ_TPM1);
+
+  /* Input capture mode: MSB = 0, MSA = 0 */
+  /*   Rising edge: ELSB=0 ELSA=1 */
+  TPM1->C1SC = 0x84;
+  TPM1->POL=0;
+
+  /* No trigger.   */
+  /* Stop on overflow: CSOO=1 */ 
+  /* Run the timer in the debug mode */
+  TPM1->CONF = 0x000200c0;
+
+  TPM1->CNT = 0xffff;	   /* Writing causes reset of the counter.  */
+  gpio_assert_low ();
+}

example-fs-bb48/usb-cdc.c

@@ -629,9 +629,9 @@ static void *tty_main (void *arg);
 #define INTR_REQ_USB 24
 #define PRIO_TTY      4
 
-extern uint8_t __process3_stack_base__, __process3_stack_size__;
-const uint32_t __stackaddr_tty = (uint32_t)&__process3_stack_base__;
-const size_t __stacksize_tty = (size_t)&__process3_stack_size__;
+extern uint8_t __process3_stack_base__[], __process3_stack_size__[];
+#define STACK_ADDR_TTY ((uint32_t)__process3_stack_base__)
+#define STACK_SIZE_TTY ((uint32_t)__process3_stack_size__)
 
 struct tty *
 tty_open (void)
@@ -646,7 +646,7 @@ tty_open (void)
   tty0.device_state = UNCONNECTED;
   memcpy (&tty0.line_coding, &line_coding0, sizeof (struct line_coding));
 
-  chopstx_create (PRIO_TTY, __stackaddr_tty, __stacksize_tty, tty_main, &tty0);
+  chopstx_create (PRIO_TTY, STACK_ADDR_TTY, STACK_SIZE_TTY, tty_main, &tty0);
   return &tty0;
 }
 
@@ -686,7 +686,10 @@ tty_main (void *arg)
 
   while (1)
     {
-      chopstx_poll (NULL, 1, &usb_intr);
+      struct chx_poll_head *pd_array[1] = {
+	(struct chx_poll_head *)&usb_intr
+      };
+      chopstx_poll (NULL, 1, pd_array);
       if (usb_intr.ready)
 	{
 	  uint8_t ep_num;
@@ -919,7 +922,10 @@ tty_recv (struct tty *t, char *buf, uint32_t *timeout)
 
   while (1)
     {
-      chopstx_poll (timeout, 1, &poll_desc);
+      struct chx_poll_head *pd_array[1] = {
+	(struct chx_poll_head *)&poll_desc
+      };
+      chopstx_poll (timeout, 1, pd_array);
       chopstx_mutex_lock (&t->mtx);
       r = check_rx (t);
       chopstx_mutex_unlock (&t->mtx);

example-fsm-55/debian-logo.c

@@ -34,8 +34,8 @@ struct GPIO {
 #define GPIOF_BASE	(AHB2PERIPH_BASE + 0x1400)
 #define GPIOF		((struct GPIO *) GPIOF_BASE)
 
-static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
-static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
+static struct GPIO *const GPIO_LED = ((struct GPIO *)GPIO_LED_BASE);
+static struct GPIO *const GPIO_OTHER = ((struct GPIO *)GPIO_OTHER_BASE);
 
 static chopstx_mutex_t mtx;
 static chopstx_cond_t cnd0, cnd1;
@@ -166,14 +166,14 @@ button (void *arg)
 #define PRIO_LED 3
 #define PRIO_BUTTON 2
 
-extern uint8_t __process1_stack_base__, __process1_stack_size__;
-extern uint8_t __process2_stack_base__, __process2_stack_size__;
+extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
+extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
 
-const uint32_t __stackaddr_led = (uint32_t)&__process1_stack_base__;
-const size_t __stacksize_led = (size_t)&__process1_stack_size__;
+#define STACK_ADDR_LED ((uint32_t)__process1_stack_base__)
+#define STACK_SIZE_LED ((uint32_t)__process1_stack_size__)
 
-const uint32_t __stackaddr_button = (uint32_t)&__process2_stack_base__;
-const size_t __stacksize_button = (size_t)&__process2_stack_size__;
+#define STACK_ADDR_BUTTON ((uint32_t)__process2_stack_base__)
+#define STACK_SIZE_BUTTON ((uint32_t)__process2_stack_size__)
 
 #define DATA55(x0,x1,x2,x3,x4) (x0<<20)|(x1<<15)|(x2<<10)|(x3<< 5)|(x4<< 0)
 #define SIZE55(img) (sizeof (img) / sizeof (uint32_t))
@@ -382,10 +382,10 @@ main (int argc, const char *argv[])
   chopstx_cond_init (&cnd0);
   chopstx_cond_init (&cnd1);
 
-  led_thd = chopstx_create (PRIO_LED, __stackaddr_led,
-			    __stacksize_led, led, NULL);
-  button_thd = chopstx_create (PRIO_BUTTON, __stackaddr_button,
-			       __stacksize_button, button, NULL);
+  led_thd = chopstx_create (PRIO_LED, STACK_ADDR_LED,
+			    STACK_SIZE_LED, led, NULL);
+  button_thd = chopstx_create (PRIO_BUTTON, STACK_ADDR_BUTTON,
+			       STACK_SIZE_BUTTON, button, NULL);
 
   chopstx_usec_wait (200*1000);
 
@@ -450,7 +450,7 @@ struct SCB
 
 #define SCS_BASE	(0xE000E000)
 #define SCB_BASE	(SCS_BASE +  0x0D00)
-static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
+static struct SCB *const SCB = ((struct SCB *)SCB_BASE);
 
 #define SCB_SCR_SLEEPDEEP (1 << 2)
 

example-fsm-55/hh.c

@@ -34,8 +34,8 @@ struct GPIO {
 #define GPIOF_BASE	(AHB2PERIPH_BASE + 0x1400)
 #define GPIOF		((struct GPIO *) GPIOF_BASE)
 
-static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
-static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
+static struct GPIO *const GPIO_LED = ((struct GPIO *)GPIO_LED_BASE);
+static struct GPIO *const GPIO_OTHER = ((struct GPIO *)GPIO_OTHER_BASE);
 
 static chopstx_mutex_t mtx;
 static chopstx_cond_t cnd0, cnd1;
@@ -166,14 +166,14 @@ button (void *arg)
 #define PRIO_LED 3
 #define PRIO_BUTTON 2
 
-extern uint8_t __process1_stack_base__, __process1_stack_size__;
-extern uint8_t __process2_stack_base__, __process2_stack_size__;
+extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
+extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
 
-const uint32_t __stackaddr_led = (uint32_t)&__process1_stack_base__;
-const size_t __stacksize_led = (size_t)&__process1_stack_size__;
+#define STACK_ADDR_LED ((uint32_t)__process1_stack_base__)
+#define STACK_SIZE_LED ((uint32_t)__process1_stack_size__)
 
-const uint32_t __stackaddr_button = (uint32_t)&__process2_stack_base__;
-const size_t __stacksize_button = (size_t)&__process2_stack_size__;
+#define STACK_ADDR_BUTTON ((uint32_t)__process2_stack_base__)
+#define STACK_SIZE_BUTTON ((uint32_t)__process2_stack_size__)
 
 #define DATA55(x0,x1,x2,x3,x4) (x0<<20)|(x1<<15)|(x2<<10)|(x3<< 5)|(x4<< 0)
 #define SIZE55(img) (sizeof (img) / sizeof (uint32_t))
@@ -370,10 +370,10 @@ main (int argc, const char *argv[])
   chopstx_cond_init (&cnd0);
   chopstx_cond_init (&cnd1);
 
-  led_thd = chopstx_create (PRIO_LED, __stackaddr_led,
-			    __stacksize_led, led, NULL);
-  button_thd = chopstx_create (PRIO_BUTTON, __stackaddr_button,
-			       __stacksize_button, button, NULL);
+  led_thd = chopstx_create (PRIO_LED, STACK_ADDR_LED,
+			    STACK_SIZE_LED, led, NULL);
+  button_thd = chopstx_create (PRIO_BUTTON, STACK_ADDR_BUTTON,
+			       STACK_SIZE_BUTTON, button, NULL);
 
   chopstx_usec_wait (200*1000);
 
@@ -438,7 +438,7 @@ struct SCB
 
 #define SCS_BASE	(0xE000E000)
 #define SCB_BASE	(SCS_BASE +  0x0D00)
-static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
+static struct SCB *const SCB = ((struct SCB *)SCB_BASE);
 
 #define SCB_SCR_SLEEPDEEP (1 << 2)
 

example-fsm-55/hiroshi-ayumi.c

@@ -35,8 +35,8 @@ struct GPIO {
 
 #define GPIO_SPEAKER_PIN    1
 
-static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
-static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
+static struct GPIO *const GPIO_LED = ((struct GPIO *)GPIO_LED_BASE);
+static struct GPIO *const GPIO_OTHER = ((struct GPIO *)GPIO_OTHER_BASE);
 
 static chopstx_mutex_t mtx;
 static chopstx_cond_t cnd;
@@ -88,10 +88,10 @@ led_enable_column (uint8_t col)
 
 #define PRIO_LED 3
 
-extern uint8_t __process1_stack_base__, __process1_stack_size__;
+extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
 
-const uint32_t stackaddr_led = (uint32_t)&__process1_stack_base__;
-const size_t stacksize_led = (size_t)&__process1_stack_size__;
+#define STACK_ADDR_LED ((uint32_t)__process1_stack_base__)
+#define STACK_SIZE_LED ((uint32_t)__process1_stack_size__)
 
 static void *
 led (void *arg)
@@ -119,10 +119,10 @@ led (void *arg)
 
 
 #define PRIO_SPK 4
-extern uint8_t __process2_stack_base__, __process2_stack_size__;
+extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
 
-const uint32_t stackaddr_spk = (uint32_t)&__process2_stack_base__;
-const size_t stacksize_spk = (size_t)&__process2_stack_size__;
+#define STACK_ADDR_SPK ((uint32_t)__process2_stack_base__)
+#define STACK_SIZE_SPK ((uint32_t)__process2_stack_size__)
 
 static chopstx_mutex_t spk_mtx;
 static chopstx_cond_t spk_cnd;
@@ -193,10 +193,10 @@ spk (void *arg)
 
 
 #define PRIO_MUSIC 2
-extern uint8_t __process3_stack_base__, __process3_stack_size__;
+extern uint8_t __process3_stack_base__[], __process3_stack_size__[];
 
-const uint32_t stackaddr_music = (uint32_t)&__process3_stack_base__;
-const size_t stacksize_music = (size_t)&__process3_stack_size__;
+#define STACK_ADDR_MUSIC ((uint32_t)__process3_stack_base__)
+#define STACK_SIZE_MUSIC ((uint32_t)__process3_stack_size__)
 
 #define C 0
 #define D 1
@@ -254,7 +254,7 @@ music (void *arg)
   chopstx_cond_init (&spk_cnd);
   chopstx_cond_init (&spk_cnd_no_tone);
 
-  chopstx_create (PRIO_SPK, stackaddr_spk, stacksize_spk, spk, NULL);
+  chopstx_create (PRIO_SPK, STACK_ADDR_SPK, STACK_SIZE_SPK, spk, NULL);
 
   while (1)
     {
@@ -350,8 +350,8 @@ main (int argc, const char *argv[])
   chopstx_mutex_init (&mtx);
   chopstx_cond_init (&cnd);
 
-  chopstx_create (PRIO_LED, stackaddr_led, stacksize_led, led, NULL);
-  chopstx_create (PRIO_MUSIC, stackaddr_music, stacksize_music, music, NULL);
+  chopstx_create (PRIO_LED, STACK_ADDR_LED, STACK_SIZE_LED, led, NULL);
+  chopstx_create (PRIO_MUSIC, STACK_ADDR_MUSIC, STACK_SIZE_MUSIC, music, NULL);
 
   chopstx_usec_wait (200*1000);
 

example-led/sample.c

@@ -72,14 +72,14 @@ blk (void *arg)
 #define PRIO_BLK 2
 #endif
 
-extern uint8_t __process1_stack_base__, __process1_stack_size__;
-extern uint8_t __process2_stack_base__, __process2_stack_size__;
+extern uint8_t __process1_stack_base__[], __process1_stack_size__[];
+extern uint8_t __process2_stack_base__[], __process2_stack_size__[];
 
-const uint32_t __stackaddr_pwm = (uint32_t)&__process1_stack_base__;
-const size_t __stacksize_pwm = (size_t)&__process1_stack_size__;
+#define STACK_ADDR_PWM ((uint32_t)__process1_stack_base__)
+#define STACK_SIZE_PWM ((uint32_t)__process1_stack_size__)
 
-const uint32_t __stackaddr_blk = (uint32_t)&__process2_stack_base__;
-const size_t __stacksize_blk = (size_t)&__process2_stack_size__;
+#define STACK_ADDR_BLK ((uint32_t)__process2_stack_base__)
+#define STACK_SIZE_BLK ((uint32_t)__process2_stack_size__)
 
 
 int
@@ -94,8 +94,8 @@ main (int argc, const char *argv[])
 
   m = 10;
 
-  chopstx_create (PRIO_PWM, __stackaddr_pwm, __stacksize_pwm, pwm, NULL);
-  chopstx_create (PRIO_BLK, __stackaddr_blk, __stacksize_blk, blk, NULL);
+  chopstx_create (PRIO_PWM, STACK_ADDR_PWM, STACK_SIZE_PWM, pwm, NULL);
+  chopstx_create (PRIO_BLK, STACK_ADDR_BLK, STACK_SIZE_BLK, blk, NULL);
 
   chopstx_usec_wait (200*1000);
 

mcu/clk_gpio_init-mkl27z.c

@@ -38,7 +38,7 @@ struct MCG {
   uint8_t reserved2[15]; /*                                    */
   volatile uint8_t MC;   /* MCG Miscellaneous Control Register */
 };
-static struct MCG *const MCG = (struct MCG *const)0x40064000;
+static struct MCG *const MCG = (struct MCG *)0x40064000;
 
 struct USB_CLK_RECOVER {
   volatile uint8_t CTRL;           /* USB Clock             */
@@ -51,7 +51,7 @@ struct USB_CLK_RECOVER {
                                    /*     interrupt status  */
 };
 static struct USB_CLK_RECOVER *const USB_CLK_RECOVER =
-  (struct USB_CLK_RECOVER *const)0x40072140;
+  (struct USB_CLK_RECOVER *)0x40072140;
 
 static void __attribute__((used))
 clock_init (void)
@@ -66,10 +66,12 @@ clock_init (void)
   while ((MCG->S & 0x0c) != 0)
     ;
 
-  SIM->SOPT2 = 0x00040060;	/* USBSRC=IRC48, CLOKOUTSEL=LPO, RTC-clock */
+  /* TPMSRC=IRC48M, USBSRC=IRC48M, CLOKOUTSEL=LPO, RTC-clock */
+  SIM->SOPT2 = 0x01040060;
 
-  SIM->SCGC4 = (1 << 18);	/* Enable USB FS clock         */
+  SIM->SCGC4 = (1 << 18);	/* Enable USB FS clock        */
   SIM->SCGC5 = (1 << 10);	/* Enable Port B clock        */
+  SIM->SCGC6 = (1 << 25)|1;	/* Enable TPM1 clock          */
   SIM->COPC = 0;		/* COP disabled               */
 
   /* Crystal-less USB setup.  */
@@ -78,44 +80,6 @@ clock_init (void)
 }
 
 
-struct PORT {
-  volatile uint32_t PCR0;  volatile uint32_t PCR1;
-  volatile uint32_t PCR2;  volatile uint32_t PCR3;
-  volatile uint32_t PCR4;  volatile uint32_t PCR5;
-  volatile uint32_t PCR6;  volatile uint32_t PCR7;
-  volatile uint32_t PCR8;  volatile uint32_t PCR9;
-  volatile uint32_t PCR10; volatile uint32_t PCR11;
-  volatile uint32_t PCR12; volatile uint32_t PCR13;
-  volatile uint32_t PCR14; volatile uint32_t PCR15;
-  volatile uint32_t PCR16; volatile uint32_t PCR17;
-  volatile uint32_t PCR18; volatile uint32_t PCR19;
-  volatile uint32_t PCR20; volatile uint32_t PCR21;
-  volatile uint32_t PCR22; volatile uint32_t PCR23;
-  volatile uint32_t PCR24; volatile uint32_t PCR25;
-  volatile uint32_t PCR26; volatile uint32_t PCR27;
-  volatile uint32_t PCR28; volatile uint32_t PCR29;
-  volatile uint32_t PCR30; volatile uint32_t PCR31;
-  volatile uint32_t GPCLR; volatile uint32_t GPCHR;
-  uint32_t reserved[6];
-  volatile uint32_t ISFR;
-};
-static struct PORT *const PORTB = (struct PORT *const)0x4004A000;
-static struct PORT *const PORTD = (struct PORT *const)0x4004C000;
-static struct PORT *const PORTE = (struct PORT *const)0x4004D000;
-
-struct GPIO {
-  volatile uint32_t PDOR; /* Port Data Output Register    */
-  volatile uint32_t PSOR; /* Port Set Output Register     */
-  volatile uint32_t PCOR; /* Port Clear Output Register   */
-  volatile uint32_t PTOR; /* Port Toggle Output Register  */
-  volatile uint32_t PDIR; /* Port Data Input Register     */
-  volatile uint32_t PDDR; /* Port Data Direction Register */
-};
-static struct GPIO *const GPIOB = (struct GPIO *const)0x400FF040;
-static struct GPIO *const GPIOD = (struct GPIO *const)0x400FF0C0;
-static struct GPIO *const GPIOE = (struct GPIO *const)0x400FF100;
-
-
 static void __attribute__((used))
 gpio_init (void)
 {
@@ -124,14 +88,14 @@ gpio_init (void)
               | (0<<4) /* PassiveFilterEnable=0 */
               | (1<<2) /* SlewRateEnable = slow */
               | (0<<1) /* pull enable = 0       */ 
-              | (0<<0) /* puddselect= 0         */
+              | (0<<0) /* pull up select= 0     */
               ;
   PORTB->PCR1 = (1<<8) /* GPIO                  */
               | (0<<6) /* DriveStrengthEnable=0 */
               | (0<<4) /* PassiveFilterEnable=0 */
               | (1<<2) /* SlewRateEnable = slow */
               | (0<<1) /* pull enable = 0       */ 
-              | (0<<0) /* puddselect= 0         */
+              | (0<<0) /* pull up select= 0     */
               ;
 
   GPIOB->PDDR = (1 << 1) | (1 << 0); /* PTB0, PTB1 : Output    */

mcu/clk_gpio_init-stm32.c

@@ -100,7 +100,7 @@ struct RCC {
 };
 
 #define RCC_BASE		(AHBPERIPH_BASE + 0x1000)
-static struct RCC *const RCC = ((struct RCC *const)RCC_BASE);
+static struct RCC *const RCC = (struct RCC *)RCC_BASE;
 
 #define RCC_APB1ENR_USBEN	0x00800000
 #define RCC_APB1RSTR_USBRST	0x00800000
@@ -163,7 +163,7 @@ struct SYSCFG {
 #define SYSCFG_CFGR1_MEM_MODE 0x03
 
 #define SYSCFG_BASE	(APBPERIPH_BASE + 0x00010000)
-static struct SYSCFG *const SYSCFG = ((struct SYSCFG *const) SYSCFG_BASE);
+static struct SYSCFG *const SYSCFG = (struct SYSCFG *)SYSCFG_BASE;
 #endif
 
 struct FLASH {
@@ -179,7 +179,7 @@ struct FLASH {
 };
 
 #define FLASH_R_BASE	(AHBPERIPH_BASE + 0x2000)
-static struct FLASH *const FLASH = ((struct FLASH *const) FLASH_R_BASE);
+static struct FLASH *const FLASH = (struct FLASH *)FLASH_R_BASE;
 
 static void __attribute__((used))
 clock_init (void)
@@ -279,7 +279,7 @@ struct AFIO
 };
 
 #define AFIO_BASE 0x40010000
-static struct AFIO *const AFIO = (struct AFIO *const)AFIO_BASE;
+static struct AFIO *const AFIO = (struct AFIO *)AFIO_BASE;
 
 #define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
 #define AFIO_MAPR_SWJ_CFG_DISABLE         0x04000000
@@ -308,12 +308,12 @@ struct GPIO {
 #define GPIOE		((struct GPIO *) GPIOE_BASE)
 #endif
 
-static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
+static struct GPIO *const GPIO_LED = (struct GPIO *)GPIO_LED_BASE;
 #ifdef GPIO_USB_BASE
-static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
+static struct GPIO *const GPIO_USB = (struct GPIO *)GPIO_USB_BASE;
 #endif
 #ifdef GPIO_OTHER_BASE
-static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
+static struct GPIO *const GPIO_OTHER = (struct GPIO *)GPIO_OTHER_BASE;
 #endif
 
 static void __attribute__((used))

mcu/mkl27z.h

@@ -28,4 +28,43 @@ struct SIM {
   volatile uint32_t COPC;     /* COP Control Register                    */
   volatile uint32_t SRVCOP;   /* Service COP                             */
 };
-static struct SIM *const SIM = (struct SIM *const)0x40047000;
+
+/* Port control. */
+struct PORT {
+  volatile uint32_t PCR0;  volatile uint32_t PCR1;
+  volatile uint32_t PCR2;  volatile uint32_t PCR3;
+  volatile uint32_t PCR4;  volatile uint32_t PCR5;
+  volatile uint32_t PCR6;  volatile uint32_t PCR7;
+  volatile uint32_t PCR8;  volatile uint32_t PCR9;
+  volatile uint32_t PCR10; volatile uint32_t PCR11;
+  volatile uint32_t PCR12; volatile uint32_t PCR13;
+  volatile uint32_t PCR14; volatile uint32_t PCR15;
+  volatile uint32_t PCR16; volatile uint32_t PCR17;
+  volatile uint32_t PCR18; volatile uint32_t PCR19;
+  volatile uint32_t PCR20; volatile uint32_t PCR21;
+  volatile uint32_t PCR22; volatile uint32_t PCR23;
+  volatile uint32_t PCR24; volatile uint32_t PCR25;
+  volatile uint32_t PCR26; volatile uint32_t PCR27;
+  volatile uint32_t PCR28; volatile uint32_t PCR29;
+  volatile uint32_t PCR30; volatile uint32_t PCR31;
+  volatile uint32_t GPCLR; volatile uint32_t GPCHR;
+  uint32_t reserved[6];
+  volatile uint32_t ISFR;
+};
+
+struct GPIO {
+  volatile uint32_t PDOR; /* Port Data Output Register    */
+  volatile uint32_t PSOR; /* Port Set Output Register     */
+  volatile uint32_t PCOR; /* Port Clear Output Register   */
+  volatile uint32_t PTOR; /* Port Toggle Output Register  */
+  volatile uint32_t PDIR; /* Port Data Input Register     */
+  volatile uint32_t PDDR; /* Port Data Direction Register */
+};
+
+static struct SIM *const SIM = (struct SIM *)0x40047000;
+static struct PORT *const PORTB = (struct PORT *)0x4004A000;
+static struct PORT *const PORTD = (struct PORT *)0x4004C000;
+static struct PORT *const PORTE = (struct PORT *)0x4004D000;
+static struct GPIO *const GPIOB = (struct GPIO *)0x400FF040;
+static struct GPIO *const GPIOD = (struct GPIO *)0x400FF0C0;
+static struct GPIO *const GPIOE = (struct GPIO *)0x400FF100;

mcu/stm32f103.h

@@ -1,10 +1,8 @@
 #define PERIPH_BASE	0x40000000
+#define APB1PERIPH_BASE PERIPH_BASE
 #define APB2PERIPH_BASE	(PERIPH_BASE + 0x10000)
 #define AHBPERIPH_BASE	(PERIPH_BASE + 0x20000)
 
-#define RCC_APB2RSTR_ADC1RST 0x00000200
-#define RCC_APB2RSTR_ADC2RST 0x00000400
-
 struct RCC {
   volatile uint32_t CR;
   volatile uint32_t CFGR;
@@ -19,13 +17,24 @@ struct RCC {
 };
 
 #define RCC_BASE		(AHBPERIPH_BASE + 0x1000)
-static struct RCC *const RCC = ((struct RCC *const)RCC_BASE);
+static struct RCC *const RCC = (struct RCC *)RCC_BASE;
 
 #define RCC_AHBENR_DMA1EN       0x00000001
 #define RCC_AHBENR_CRCEN        0x00000040
 
 #define RCC_APB2ENR_ADC1EN      0x00000200
 #define RCC_APB2ENR_ADC2EN      0x00000400
+#define RCC_APB2ENR_TIM1EN      0x00000800
+#define RCC_APB1ENR_TIM2EN      0x00000001
+#define RCC_APB1ENR_TIM3EN      0x00000002
+#define RCC_APB1ENR_TIM4EN      0x00000004
+
+#define RCC_APB2RSTR_ADC1RST    0x00000200
+#define RCC_APB2RSTR_ADC2RST    0x00000400
+#define RCC_APB2RSTR_TIM1RST    0x00000800
+#define RCC_APB1RSTR_TIM2RST    0x00000001
+#define RCC_APB1RSTR_TIM3RST    0x00000002
+#define RCC_APB1RSTR_TIM4RST    0x00000004
 
 #define  CRC_CR_RESET                        0x00000001
 
@@ -38,7 +47,7 @@ struct CRC {
 };
 
 #define CRC_BASE              (AHBPERIPH_BASE + 0x3000)
-static struct CRC *const CRC = ((struct CRC *const)CRC_BASE);
+static struct CRC *const CRC = (struct CRC *)CRC_BASE;
 
 
 struct ADC {
@@ -67,8 +76,8 @@ struct ADC {
 #define ADC1_BASE             (APB2PERIPH_BASE + 0x2400)
 #define ADC2_BASE             (APB2PERIPH_BASE + 0x2800)
 
-static struct ADC *const ADC1 = (struct ADC *const)ADC1_BASE;
-static struct ADC *const ADC2 = (struct ADC *const)ADC2_BASE;
+static struct ADC *const ADC1 = (struct ADC *)ADC1_BASE;
+static struct ADC *const ADC2 = (struct ADC *)ADC2_BASE;
 
 #define  ADC_CR1_DUALMOD_0       0x00010000
 #define  ADC_CR1_DUALMOD_1       0x00020000
@@ -167,11 +176,11 @@ struct DMA {
 #define  DMA_ISR_TEIF7                       0x08000000
 
 #define DMA1_BASE             (AHBPERIPH_BASE + 0x0000)
-static struct DMA *const DMA1 = (struct DMA *const)DMA1_BASE;
+static struct DMA *const DMA1 = (struct DMA *)DMA1_BASE;
 
 #define DMA1_Channel1_BASE    (AHBPERIPH_BASE + 0x0008)
 static struct DMA_Channel *const DMA1_Channel1 =
-  (struct DMA_Channel *const)DMA1_Channel1_BASE;
+  (struct DMA_Channel *)DMA1_Channel1_BASE;
 
 /* System Control Block */
 struct SCB
@@ -201,4 +210,491 @@ struct SCB
 
 #define SCS_BASE 0xE000E000
 #define SCB_BASE (SCS_BASE + 0x0D00)
-static struct SCB *const SCB = (struct SCB *const)SCB_BASE;
+static struct SCB *const SCB = (struct SCB *)SCB_BASE;
+
+/* Timer */
+struct TIM
+{
+  volatile uint16_t CR1;   uint16_t  RESERVED0;
+  volatile uint16_t CR2;   uint16_t  RESERVED1;
+  volatile uint16_t SMCR;  uint16_t  RESERVED2;
+  volatile uint16_t DIER;  uint16_t  RESERVED3;
+  volatile uint16_t SR;    uint16_t  RESERVED4;
+  volatile uint16_t EGR;   uint16_t  RESERVED5;
+  volatile uint16_t CCMR1; uint16_t  RESERVED6;
+  volatile uint16_t CCMR2; uint16_t  RESERVED7;
+  volatile uint16_t CCER;  uint16_t  RESERVED8;
+  volatile uint16_t CNT;   uint16_t  RESERVED9;
+  volatile uint16_t PSC;   uint16_t  RESERVED10;
+  volatile uint16_t ARR;   uint16_t  RESERVED11;
+  volatile uint16_t RCR;   uint16_t  RESERVED12;
+  volatile uint16_t CCR1;  uint16_t  RESERVED13;
+  volatile uint16_t CCR2;  uint16_t  RESERVED14;
+  volatile uint16_t CCR3;  uint16_t  RESERVED15;
+  volatile uint16_t CCR4;  uint16_t  RESERVED16;
+  volatile uint16_t BDTR;  uint16_t  RESERVED17;
+  volatile uint16_t DCR;   uint16_t  RESERVED18;
+  volatile uint16_t DMAR;  uint16_t  RESERVED19;
+};
+
+#define TIM2_BASE 0x40000000
+#define TIM3_BASE 0x40000400
+#define TIM4_BASE 0x40000800
+static struct TIM *const TIM2 = (struct TIM *)TIM2_BASE;
+static struct TIM *const TIM3 = (struct TIM *)TIM3_BASE;
+static struct TIM *const TIM4 = (struct TIM *)TIM4_BASE;
+
+#define  TIM_CR1_CEN   	0x0001
+#define  TIM_CR1_UDIS  	0x0002
+#define  TIM_CR1_URS   	0x0004
+#define  TIM_CR1_OPM   	0x0008
+#define  TIM_CR1_DIR   	0x0010
+#define  TIM_CR1_CMS   	0x0060
+#define  TIM_CR1_CMS_0 	0x0020
+#define  TIM_CR1_CMS_1 	0x0040
+#define  TIM_CR1_ARPE  	0x0080
+#define  TIM_CR1_CKD   	0x0300
+#define  TIM_CR1_CKD_0 	0x0100
+#define  TIM_CR1_CKD_1 	0x0200
+
+#define  TIM_CR2_CCPC  	0x0001
+#define  TIM_CR2_CCUS  	0x0004
+#define  TIM_CR2_CCDS  	0x0008
+#define  TIM_CR2_MMS   	0x0070
+#define  TIM_CR2_MMS_0 	0x0010
+#define  TIM_CR2_MMS_1 	0x0020
+#define  TIM_CR2_MMS_2 	0x0040
+#define  TIM_CR2_TI1S  	0x0080
+#define  TIM_CR2_OIS1  	0x0100
+#define  TIM_CR2_OIS1N 	0x0200
+#define  TIM_CR2_OIS2  	0x0400
+#define  TIM_CR2_OIS2N 	0x0800
+#define  TIM_CR2_OIS3  	0x1000
+#define  TIM_CR2_OIS3N 	0x2000
+#define  TIM_CR2_OIS4  	0x4000
+
+#define  TIM_SMCR_SMS   0x0007
+#define  TIM_SMCR_SMS_0 0x0001
+#define  TIM_SMCR_SMS_1 0x0002
+#define  TIM_SMCR_SMS_2 0x0004
+#define  TIM_SMCR_TS    0x0070
+#define  TIM_SMCR_TS_0  0x0010
+#define  TIM_SMCR_TS_1  0x0020
+#define  TIM_SMCR_TS_2  0x0040
+#define  TIM_SMCR_MSM   0x0080
+
+#define  TIM_SMCR_ETF   0x0F00
+#define  TIM_SMCR_ETF_0 0x0100
+#define  TIM_SMCR_ETF_1 0x0200
+#define  TIM_SMCR_ETF_2 0x0400
+#define  TIM_SMCR_ETF_3 0x0800
+
+#define  TIM_SMCR_ETPS   0x3000
+#define  TIM_SMCR_ETPS_0 0x1000
+#define  TIM_SMCR_ETPS_1 0x2000
+
+#define  TIM_SMCR_ECE    0x4000
+#define  TIM_SMCR_ETP    0x8000
+
+#define  TIM_DIER_UIE    0x0001
+#define  TIM_DIER_CC1IE  0x0002
+#define  TIM_DIER_CC2IE  0x0004
+#define  TIM_DIER_CC3IE  0x0008
+#define  TIM_DIER_CC4IE  0x0010
+#define  TIM_DIER_COMIE  0x0020
+#define  TIM_DIER_TIE    0x0040
+#define  TIM_DIER_BIE    0x0080
+#define  TIM_DIER_UDE    0x0100
+#define  TIM_DIER_CC1DE  0x0200
+#define  TIM_DIER_CC2DE  0x0400
+#define  TIM_DIER_CC3DE  0x0800
+#define  TIM_DIER_CC4DE  0x1000
+#define  TIM_DIER_COMDE  0x2000
+#define  TIM_DIER_TDE    0x4000
+
+#define  TIM_SR_UIF      0x0001
+#define  TIM_SR_CC1IF    0x0002
+#define  TIM_SR_CC2IF    0x0004
+#define  TIM_SR_CC3IF    0x0008
+#define  TIM_SR_CC4IF    0x0010
+#define  TIM_SR_COMIF    0x0020
+#define  TIM_SR_TIF      0x0040
+#define  TIM_SR_BIF      0x0080
+#define  TIM_SR_CC1OF    0x0200
+#define  TIM_SR_CC2OF    0x0400
+#define  TIM_SR_CC3OF    0x0800
+#define  TIM_SR_CC4OF    0x1000
+
+#define  TIM_EGR_UG      0x01
+#define  TIM_EGR_CC1G    0x02
+#define  TIM_EGR_CC2G    0x04
+#define  TIM_EGR_CC3G    0x08
+#define  TIM_EGR_CC4G    0x10
+#define  TIM_EGR_COMG    0x20
+#define  TIM_EGR_TG      0x40
+#define  TIM_EGR_BG      0x80
+
+#define  TIM_CCMR1_CC1S   0x0003
+#define  TIM_CCMR1_CC1S_0 0x0001
+#define  TIM_CCMR1_CC1S_1 0x0002
+
+#define  TIM_CCMR1_OC1FE  0x0004
+#define  TIM_CCMR1_OC1PE  0x0008
+
+#define  TIM_CCMR1_OC1M   0x0070
+#define  TIM_CCMR1_OC1M_0 0x0010
+#define  TIM_CCMR1_OC1M_1 0x0020
+#define  TIM_CCMR1_OC1M_2 0x0040
+
+#define  TIM_CCMR1_OC1CE  0x0080
+
+#define  TIM_CCMR1_CC2S   0x0300
+#define  TIM_CCMR1_CC2S_0 0x0100
+#define  TIM_CCMR1_CC2S_1 0x0200
+
+#define  TIM_CCMR1_OC2FE  0x0400
+#define  TIM_CCMR1_OC2PE  0x0800
+
+#define  TIM_CCMR1_OC2M   0x7000
+#define  TIM_CCMR1_OC2M_0 0x1000
+#define  TIM_CCMR1_OC2M_1 0x2000
+#define  TIM_CCMR1_OC2M_2 0x4000
+
+#define  TIM_CCMR1_OC2CE  0x8000
+
+
+#define  TIM_CCMR1_IC1PSC   0x000C
+#define  TIM_CCMR1_IC1PSC_0 0x0004
+#define  TIM_CCMR1_IC1PSC_1 0x0008
+
+#define  TIM_CCMR1_IC1F     0x00F0
+#define  TIM_CCMR1_IC1F_0   0x0010
+#define  TIM_CCMR1_IC1F_1   0x0020
+#define  TIM_CCMR1_IC1F_2   0x0040
+#define  TIM_CCMR1_IC1F_3   0x0080
+
+#define  TIM_CCMR1_IC2PSC   0x0C00
+#define  TIM_CCMR1_IC2PSC_0 0x0400
+#define  TIM_CCMR1_IC2PSC_1 0x0800
+
+#define  TIM_CCMR1_IC2F     0xF000
+#define  TIM_CCMR1_IC2F_0   0x1000
+#define  TIM_CCMR1_IC2F_1   0x2000
+#define  TIM_CCMR1_IC2F_2   0x4000
+#define  TIM_CCMR1_IC2F_3   0x8000
+
+#define  TIM_CCMR2_CC3S     0x0003
+#define  TIM_CCMR2_CC3S_0   0x0001
+#define  TIM_CCMR2_CC3S_1   0x0002
+
+#define  TIM_CCMR2_OC3FE    0x0004
+#define  TIM_CCMR2_OC3PE    0x0008
+
+#define  TIM_CCMR2_OC3M     0x0070
+#define  TIM_CCMR2_OC3M_0   0x0010
+#define  TIM_CCMR2_OC3M_1   0x0020
+#define  TIM_CCMR2_OC3M_2   0x0040
+
+#define  TIM_CCMR2_OC3CE    0x0080
+
+#define  TIM_CCMR2_CC4S     0x0300
+#define  TIM_CCMR2_CC4S_0   0x0100
+#define  TIM_CCMR2_CC4S_1   0x0200
+
+#define  TIM_CCMR2_OC4FE    0x0400
+#define  TIM_CCMR2_OC4PE    0x0800
+
+#define  TIM_CCMR2_OC4M     0x7000
+#define  TIM_CCMR2_OC4M_0   0x1000
+#define  TIM_CCMR2_OC4M_1   0x2000
+#define  TIM_CCMR2_OC4M_2   0x4000
+
+#define  TIM_CCMR2_OC4CE    0x8000
+
+
+#define  TIM_CCMR2_IC3PSC   0x000C
+#define  TIM_CCMR2_IC3PSC_0 0x0004
+#define  TIM_CCMR2_IC3PSC_1 0x0008
+
+#define  TIM_CCMR2_IC3F     0x00F0
+#define  TIM_CCMR2_IC3F_0   0x0010
+#define  TIM_CCMR2_IC3F_1   0x0020
+#define  TIM_CCMR2_IC3F_2   0x0040
+#define  TIM_CCMR2_IC3F_3   0x0080
+
+#define  TIM_CCMR2_IC4PSC   0x0C00
+#define  TIM_CCMR2_IC4PSC_0 0x0400
+#define  TIM_CCMR2_IC4PSC_1 0x0800
+
+#define  TIM_CCMR2_IC4F     0xF000
+#define  TIM_CCMR2_IC4F_0   0x1000
+#define  TIM_CCMR2_IC4F_1   0x2000
+#define  TIM_CCMR2_IC4F_2   0x4000
+#define  TIM_CCMR2_IC4F_3   0x8000
+
+#define  TIM_CCER_CC1E      0x0001
+#define  TIM_CCER_CC1P      0x0002
+#define  TIM_CCER_CC1NE     0x0004
+#define  TIM_CCER_CC1NP     0x0008
+#define  TIM_CCER_CC2E      0x0010
+#define  TIM_CCER_CC2P      0x0020
+#define  TIM_CCER_CC2NE     0x0040
+#define  TIM_CCER_CC2NP     0x0080
+#define  TIM_CCER_CC3E      0x0100
+#define  TIM_CCER_CC3P      0x0200
+#define  TIM_CCER_CC3NE     0x0400
+#define  TIM_CCER_CC3NP     0x0800
+#define  TIM_CCER_CC4E      0x1000
+#define  TIM_CCER_CC4P      0x2000
+
+#define  TIM_CNT_CNT        0xFFFF
+
+#define  TIM_PSC_PSC        0xFFFF
+
+#define  TIM_ARR_ARR        0xFFFF
+
+#define  TIM_RCR_REP        0xFF
+
+#define  TIM_CCR1_CCR1      0xFFFF
+#define  TIM_CCR2_CCR2      0xFFFF
+#define  TIM_CCR3_CCR3      0xFFFF
+#define  TIM_CCR4_CCR4      0xFFFF
+
+#define  TIM_BDTR_DTG       0x00FF
+#define  TIM_BDTR_DTG_0     0x0001
+#define  TIM_BDTR_DTG_1     0x0002
+#define  TIM_BDTR_DTG_2     0x0004
+#define  TIM_BDTR_DTG_3     0x0008
+#define  TIM_BDTR_DTG_4     0x0010
+#define  TIM_BDTR_DTG_5     0x0020
+#define  TIM_BDTR_DTG_6     0x0040
+#define  TIM_BDTR_DTG_7     0x0080
+
+#define  TIM_BDTR_LOCK      0x0300
+#define  TIM_BDTR_LOCK_0    0x0100
+#define  TIM_BDTR_LOCK_1    0x0200
+
+#define  TIM_BDTR_OSSI      0x0400
+#define  TIM_BDTR_OSSR      0x0800
+#define  TIM_BDTR_BKE       0x1000
+#define  TIM_BDTR_BKP       0x2000
+#define  TIM_BDTR_AOE       0x4000
+#define  TIM_BDTR_MOE       0x8000
+
+#define  TIM_DCR_DBA        0x001F
+#define  TIM_DCR_DBA_0      0x0001
+#define  TIM_DCR_DBA_1      0x0002
+#define  TIM_DCR_DBA_2      0x0004
+#define  TIM_DCR_DBA_3      0x0008
+#define  TIM_DCR_DBA_4      0x0010
+
+#define  TIM_DCR_DBL        0x1F00
+#define  TIM_DCR_DBL_0      0x0100
+#define  TIM_DCR_DBL_1      0x0200
+#define  TIM_DCR_DBL_2      0x0400
+#define  TIM_DCR_DBL_3      0x0800
+#define  TIM_DCR_DBL_4      0x1000
+
+#define  TIM_DMAR_DMAB      0xFFFF
+
+struct EXTI
+{
+  volatile uint32_t IMR;
+  volatile uint32_t EMR;
+  volatile uint32_t RTSR;
+  volatile uint32_t FTSR;
+  volatile uint32_t SWIER;
+  volatile uint32_t PR;
+};
+
+#define EXTI_BASE 0x40010400
+static struct EXTI *const EXTI = (struct EXTI *)EXTI_BASE;
+
+#define  EXTI_IMR_MR0       0x00000001
+#define  EXTI_IMR_MR1       0x00000002
+#define  EXTI_IMR_MR2       0x00000004
+#define  EXTI_IMR_MR3       0x00000008
+#define  EXTI_IMR_MR4       0x00000010
+#define  EXTI_IMR_MR5       0x00000020
+#define  EXTI_IMR_MR6       0x00000040
+#define  EXTI_IMR_MR7       0x00000080
+#define  EXTI_IMR_MR8       0x00000100
+#define  EXTI_IMR_MR9       0x00000200
+#define  EXTI_IMR_MR10      0x00000400
+#define  EXTI_IMR_MR11      0x00000800
+#define  EXTI_IMR_MR12      0x00001000
+#define  EXTI_IMR_MR13      0x00002000
+#define  EXTI_IMR_MR14      0x00004000
+#define  EXTI_IMR_MR15      0x00008000
+#define  EXTI_IMR_MR16      0x00010000
+#define  EXTI_IMR_MR17      0x00020000
+#define  EXTI_IMR_MR18      0x00040000
+#define  EXTI_IMR_MR19      0x00080000
+
+#define  EXTI_EMR_MR0       0x00000001
+#define  EXTI_EMR_MR1       0x00000002
+#define  EXTI_EMR_MR2       0x00000004
+#define  EXTI_EMR_MR3       0x00000008
+#define  EXTI_EMR_MR4       0x00000010
+#define  EXTI_EMR_MR5       0x00000020
+#define  EXTI_EMR_MR6       0x00000040
+#define  EXTI_EMR_MR7       0x00000080
+#define  EXTI_EMR_MR8       0x00000100
+#define  EXTI_EMR_MR9       0x00000200
+#define  EXTI_EMR_MR10      0x00000400
+#define  EXTI_EMR_MR11      0x00000800
+#define  EXTI_EMR_MR12      0x00001000
+#define  EXTI_EMR_MR13      0x00002000
+#define  EXTI_EMR_MR14      0x00004000
+#define  EXTI_EMR_MR15      0x00008000
+#define  EXTI_EMR_MR16      0x00010000
+#define  EXTI_EMR_MR17      0x00020000
+#define  EXTI_EMR_MR18      0x00040000
+#define  EXTI_EMR_MR19      0x00080000
+
+#define  EXTI_RTSR_TR0      0x00000001
+#define  EXTI_RTSR_TR1      0x00000002
+#define  EXTI_RTSR_TR2      0x00000004
+#define  EXTI_RTSR_TR3      0x00000008
+#define  EXTI_RTSR_TR4      0x00000010
+#define  EXTI_RTSR_TR5      0x00000020
+#define  EXTI_RTSR_TR6      0x00000040
+#define  EXTI_RTSR_TR7      0x00000080
+#define  EXTI_RTSR_TR8      0x00000100
+#define  EXTI_RTSR_TR9      0x00000200
+#define  EXTI_RTSR_TR10     0x00000400
+#define  EXTI_RTSR_TR11     0x00000800
+#define  EXTI_RTSR_TR12     0x00001000
+#define  EXTI_RTSR_TR13     0x00002000
+#define  EXTI_RTSR_TR14     0x00004000
+#define  EXTI_RTSR_TR15     0x00008000
+#define  EXTI_RTSR_TR16     0x00010000
+#define  EXTI_RTSR_TR17     0x00020000
+#define  EXTI_RTSR_TR18     0x00040000
+#define  EXTI_RTSR_TR19     0x00080000
+
+#define  EXTI_FTSR_TR0      0x00000001
+#define  EXTI_FTSR_TR1      0x00000002
+#define  EXTI_FTSR_TR2      0x00000004
+#define  EXTI_FTSR_TR3      0x00000008
+#define  EXTI_FTSR_TR4      0x00000010
+#define  EXTI_FTSR_TR5      0x00000020
+#define  EXTI_FTSR_TR6      0x00000040
+#define  EXTI_FTSR_TR7      0x00000080
+#define  EXTI_FTSR_TR8      0x00000100
+#define  EXTI_FTSR_TR9      0x00000200
+#define  EXTI_FTSR_TR10     0x00000400
+#define  EXTI_FTSR_TR11     0x00000800
+#define  EXTI_FTSR_TR12     0x00001000
+#define  EXTI_FTSR_TR13     0x00002000
+#define  EXTI_FTSR_TR14     0x00004000
+#define  EXTI_FTSR_TR15     0x00008000
+#define  EXTI_FTSR_TR16     0x00010000
+#define  EXTI_FTSR_TR17     0x00020000
+#define  EXTI_FTSR_TR18     0x00040000
+#define  EXTI_FTSR_TR19     0x00080000
+
+#define  EXTI_SWIER_SWIER0  0x00000001
+#define  EXTI_SWIER_SWIER1  0x00000002
+#define  EXTI_SWIER_SWIER2  0x00000004
+#define  EXTI_SWIER_SWIER3  0x00000008
+#define  EXTI_SWIER_SWIER4  0x00000010
+#define  EXTI_SWIER_SWIER5  0x00000020
+#define  EXTI_SWIER_SWIER6  0x00000040
+#define  EXTI_SWIER_SWIER7  0x00000080
+#define  EXTI_SWIER_SWIER8  0x00000100
+#define  EXTI_SWIER_SWIER9  0x00000200
+#define  EXTI_SWIER_SWIER10 0x00000400
+#define  EXTI_SWIER_SWIER11 0x00000800
+#define  EXTI_SWIER_SWIER12 0x00001000
+#define  EXTI_SWIER_SWIER13 0x00002000
+#define  EXTI_SWIER_SWIER14 0x00004000
+#define  EXTI_SWIER_SWIER15 0x00008000
+#define  EXTI_SWIER_SWIER16 0x00010000
+#define  EXTI_SWIER_SWIER17 0x00020000
+#define  EXTI_SWIER_SWIER18 0x00040000
+#define  EXTI_SWIER_SWIER19 0x00080000
+
+#define  EXTI_PR_PR0        0x00000001
+#define  EXTI_PR_PR1        0x00000002
+#define  EXTI_PR_PR2        0x00000004
+#define  EXTI_PR_PR3        0x00000008
+#define  EXTI_PR_PR4        0x00000010
+#define  EXTI_PR_PR5        0x00000020
+#define  EXTI_PR_PR6        0x00000040
+#define  EXTI_PR_PR7        0x00000080
+#define  EXTI_PR_PR8        0x00000100
+#define  EXTI_PR_PR9        0x00000200
+#define  EXTI_PR_PR10       0x00000400
+#define  EXTI_PR_PR11       0x00000800
+#define  EXTI_PR_PR12       0x00001000
+#define  EXTI_PR_PR13       0x00002000
+#define  EXTI_PR_PR14       0x00004000
+#define  EXTI_PR_PR15       0x00008000
+#define  EXTI_PR_PR16       0x00010000
+#define  EXTI_PR_PR17       0x00020000
+#define  EXTI_PR_PR18       0x00040000
+#define  EXTI_PR_PR19       0x00080000
+
+#define EXTI0_IRQ    6
+#define EXTI1_IRQ    7
+#define EXTI2_IRQ    8
+#define EXTI9_5_IRQ 23
+#define TIM2_IRQ    28
+#define TIM3_IRQ    29
+#define TIM4_IRQ    30
+
+struct AFIO
+{
+  volatile uint32_t EVCR;
+  volatile uint32_t MAPR;
+  volatile uint32_t EXTICR[4];
+  uint32_t RESERVED0;
+  volatile uint32_t MAPR2;
+};
+
+#define AFIO_BASE 0x40010000
+static struct AFIO *const AFIO = (struct AFIO *)AFIO_BASE;
+
+#define AFIO_EXTICR1_EXTI0_PA 0x0000
+#define AFIO_EXTICR1_EXTI0_PB 0x0001
+#define AFIO_EXTICR1_EXTI0_PC 0x0002
+#define AFIO_EXTICR1_EXTI0_PD 0x0003
+
+#define AFIO_EXTICR1_EXTI1_PA 0x0000
+#define AFIO_EXTICR1_EXTI1_PB 0x0010
+#define AFIO_EXTICR1_EXTI1_PC 0x0020
+#define AFIO_EXTICR1_EXTI1_PD 0x0030
+
+#define AFIO_EXTICR1_EXTI2_PA 0x0000
+#define AFIO_EXTICR1_EXTI2_PB 0x0100
+#define AFIO_EXTICR1_EXTI2_PC 0x0200
+#define AFIO_EXTICR1_EXTI2_PD 0x0300
+
+#define AFIO_EXTICR1_EXTI3_PA 0x0000
+#define AFIO_EXTICR1_EXTI3_PB 0x1000
+#define AFIO_EXTICR1_EXTI3_PC 0x2000
+#define AFIO_EXTICR1_EXTI3_PD 0x3000
+
+#define AFIO_EXTICR2_EXTI4_PA 0x0000
+#define AFIO_EXTICR2_EXTI4_PB 0x0001
+#define AFIO_EXTICR2_EXTI4_PC 0x0002
+#define AFIO_EXTICR2_EXTI4_PD 0x0003
+
+#define AFIO_EXTICR2_EXTI5_PA 0x0000
+#define AFIO_EXTICR2_EXTI5_PB 0x0010
+#define AFIO_EXTICR2_EXTI5_PC 0x0020
+#define AFIO_EXTICR2_EXTI5_PD 0x0030
+
+#define AFIO_EXTICR2_EXTI6_PA 0x0000
+#define AFIO_EXTICR2_EXTI6_PB 0x0100
+#define AFIO_EXTICR2_EXTI6_PC 0x0200
+#define AFIO_EXTICR2_EXTI6_PD 0x0300
+
+#define AFIO_EXTICR2_EXTI7_PA 0x0000
+#define AFIO_EXTICR2_EXTI7_PB 0x1000
+#define AFIO_EXTICR2_EXTI7_PC 0x2000
+#define AFIO_EXTICR2_EXTI7_PD 0x3000
+
+#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
+#define AFIO_MAPR_SWJ_CFG_DISABLE         0x04000000

mcu/sys-mkl27z.c

@@ -118,7 +118,7 @@ struct FTFA {
   /* Note: addressing (3,2,1,0).  Use Bx macro.  */
   volatile uint8_t FPROT[4];
 };
-static struct FTFA *const FTFA = (struct FTFA *const)0x40020000;
+static struct FTFA *const FTFA = (struct FTFA *)0x40020000;
 
 #define FSTAT_CCIF 0x80
 #define B3 0
@@ -297,7 +297,7 @@ crc32_init  (unsigned int *p)
 }
 
 #ifdef ORIGINAL_IN_C
-const unsigned int *const crc32_table= (const unsigned int *const)0x00000500;
+const unsigned int *const crc32_table= (const unsigned int *)0x00000500;
 #endif
 
 void __attribute__ ((naked,section(".fixed_function.crc32_u8")))

mcu/sys-stm32f0.c

@@ -323,7 +323,7 @@ struct SCB
 
 #define SCS_BASE	(0xE000E000)
 #define SCB_BASE	(SCS_BASE +  0x0D00)
-static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
+static struct SCB *const SCB = (struct SCB *)SCB_BASE;
 
 #define SYSRESETREQ 0x04
 static void

mcu/sys-stm32f103.c

@@ -316,7 +316,7 @@ struct SCB
 
 #define SCS_BASE	(0xE000E000)
 #define SCB_BASE	(SCS_BASE +  0x0D00)
-static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
+static struct SCB *const SCB = (struct SCB *)SCB_BASE;
 
 #define SYSRESETREQ 0x04
 static void

mcu/usb-mkl27z.c

@@ -50,12 +50,12 @@ struct USB_CONF {
   uint8_t rsvd2[3];          /*                                     */
   volatile uint8_t ADDINFO;  /* Peripheral Additional Info register */
 };
-static struct USB_CONF *const USB_CONF = (struct USB_CONF *const) 0x40072000;
+static struct USB_CONF *const USB_CONF = (struct USB_CONF *)0x40072000;
 
 struct USB_CTRL0 {
   volatile uint8_t OTGCTL;   /* OTG Control register                */
 };
-static struct USB_CTRL0 *const USB_CTRL0 = (struct USB_CTRL0 *const)0x4007201c;
+static struct USB_CTRL0 *const USB_CTRL0 = (struct USB_CTRL0 *)0x4007201c;
 
 struct USB_CTRL1 {
   volatile uint8_t ISTAT;    /* Interrupt Status register           */
@@ -82,7 +82,7 @@ struct USB_CTRL1 {
   uint8_t rsvd15[3];         /*                                     */
   volatile uint8_t BDTPAGE3; /* BDT Page Register 3                 */
 };
-static struct USB_CTRL1 *const USB_CTRL1 = (struct USB_CTRL1 *const)0x40072080;
+static struct USB_CTRL1 *const USB_CTRL1 = (struct USB_CTRL1 *)0x40072080;
 
 /* Interrupt source bits */
 #define USB_IS_STALL  (1 << 7)
@@ -98,7 +98,7 @@ struct USB_ENDPT {
   volatile uint8_t EP;  /* Endpoint Control register */
   uint8_t rsvd17[3];
 };
-static struct USB_ENDPT *const USB_ENDPT = (struct USB_ENDPT *const)0x400720c0;
+static struct USB_ENDPT *const USB_ENDPT = (struct USB_ENDPT *)0x400720c0;
 
 struct USB_CTRL2 {
   volatile uint8_t USBCTRL;  /* USB Control register                */
@@ -111,7 +111,7 @@ struct USB_CTRL2 {
   uint8_t rsvd36[7];         /*                                     */
   volatile uint8_t USBFRMADJUST;           /* Frame Adjut Register  */
 };
-static struct USB_CTRL2 *const USB_CTRL2 = (struct USB_CTRL2 *const)0x40072100;
+static struct USB_CTRL2 *const USB_CTRL2 = (struct USB_CTRL2 *)0x40072100;
 
 /* Buffer Descriptor */
 struct BD {
@@ -136,7 +136,7 @@ struct BD {
 
 extern uint8_t __usb_bdt__;
 
-static struct BD *const BD_table = (struct BD *const)&__usb_bdt__;
+static struct BD *const BD_table = (struct BD *)&__usb_bdt__;
 
 static void
 kl27z_usb_init (void)