Compare commits
10 Commits
release/0.
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release/0.
| Author | SHA1 | Date | |
|---|---|---|---|
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9898639165 | ||
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27f71ff5c0 | ||
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3ba8234cec |
1
.gitignore
vendored
1
.gitignore
vendored
@@ -1,4 +1,3 @@
|
||||
*/board.h
|
||||
*/build
|
||||
*/.dep
|
||||
doc/chopstx.info
|
||||
|
||||
22
AUTHORS
Normal file
22
AUTHORS
Normal file
@@ -0,0 +1,22 @@
|
||||
Aidan Thornton:
|
||||
Added Maple Mini support.
|
||||
board/board-maple-mini.h
|
||||
|
||||
Kaz Kojima:
|
||||
Added STM32 Primer2 support.
|
||||
board/board-stm32-primer2.h
|
||||
|
||||
NIIBE Yutaka:
|
||||
Write the library:
|
||||
chopstx.c, eventflag.c, entry.c, clk_gpio_init.c
|
||||
chopstx.h, eventflag.h
|
||||
Draw the logo:
|
||||
chopstx.svg, chopstx.png
|
||||
Write examples:
|
||||
example-led, example-cdc, example-fsm-55
|
||||
Write board:
|
||||
board-fst-01.h, board-fst-01-00.h,
|
||||
board-olimex-stm32-h103.h, board-stm8s-discovery.h
|
||||
board-cq-starm.h, board-stbee-mini.h, board-stbee.h,
|
||||
|
||||
board-stm32f0-discovery.h, board-fsm-55.h
|
||||
28
ChangeLog
28
ChangeLog
@@ -1,3 +1,31 @@
|
||||
2015-07-15 Niibe Yutaka <gniibe@fsij.org>
|
||||
|
||||
* VERSION: 0.07.
|
||||
* doc/chopstx.texi (VERSION): 0.07.
|
||||
|
||||
2015-07-14 Niibe Yutaka <gniibe@fsij.org>
|
||||
|
||||
* board/board-*.h (BOARD_ID): New.
|
||||
* example-cdc/sys.c (sys_board_id): New.
|
||||
* example-cdc/sample.ld (.sys.board_id): New.
|
||||
(__flash_start__, __flash_end__): Remove.
|
||||
* entry.c [HAVE_SYS_H] (vector_table): By undefining STM32F10X_MD,
|
||||
prepare for high density device even compiled for MD device.
|
||||
|
||||
2015-07-13 Kaz Kojima <kkojima@rr.iij4u.or.jp>
|
||||
|
||||
* board/board-stm32-primer2.h: Update.
|
||||
* entry.c (vector_table): Less or more.
|
||||
|
||||
2015-07-13 Niibe Yutaka <gniibe@fsij.org>
|
||||
|
||||
* board/board-*.h (BOARD_NAME): New.
|
||||
(STM32F10X_MD): Define for medium-density devices.
|
||||
* example-led/sys.c, sample.ld: Update.
|
||||
* example-fsm-55/sys.c, hacker-emblem.ld: Update.
|
||||
* example-cdc/sys.c (sys_board_name): New.
|
||||
* example-cdc/sample.ld: Update.
|
||||
|
||||
2015-07-08 Niibe Yutaka <gniibe@fsij.org>
|
||||
|
||||
* VERSION: 0.06.
|
||||
|
||||
13
NEWS
13
NEWS
@@ -1,6 +1,19 @@
|
||||
NEWS - Noteworthy changes
|
||||
|
||||
|
||||
* Major changes in Chopstx 0.07
|
||||
|
||||
Released 2015-07-15
|
||||
|
||||
** New Board macro definitions
|
||||
Each board-*.h should have BOARD_ID and BOARD_NAME now.
|
||||
FLASH_PAGE_SIZE and NEUG_ADC_SETTING2_* are deprecated.
|
||||
|
||||
** New sys.c (2.1)
|
||||
Flash memory size is probed at runtime now. System
|
||||
service flash pages now include sys_board_id and sys_board_name.
|
||||
|
||||
|
||||
* Major changes in Chopstx 0.06
|
||||
|
||||
Released 2015-07-08
|
||||
|
||||
4
README
4
README
@@ -1,6 +1,6 @@
|
||||
Chopstx - Threads and only Threads
|
||||
Version 0.06
|
||||
2015-07-08
|
||||
Version 0.07
|
||||
2015-07-15
|
||||
Niibe Yutaka
|
||||
Flying Stone Technology
|
||||
|
||||
|
||||
@@ -1,4 +1,8 @@
|
||||
#define BOARD_NAME "CQ STARM"
|
||||
#define BOARD_ID 0xc5480875
|
||||
|
||||
#define FLASH_PAGE_SIZE 1024
|
||||
#define STM32F10X_MD /* Medium-density device */
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
#define STM32_PLLMUL_VALUE 9
|
||||
@@ -42,5 +46,3 @@
|
||||
|
||||
#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN|RCC_APB2ENR_IOPCEN)
|
||||
#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST|RCC_APB2RSTR_IOPCRST)
|
||||
|
||||
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
#define BOARD_NAME "FSM-55"
|
||||
#define BOARD_ID 0x83433c76
|
||||
|
||||
/*
|
||||
* Running at 48MHz with HSI as clock source.
|
||||
*
|
||||
|
||||
@@ -1,4 +1,8 @@
|
||||
#define BOARD_NAME "FST-01-00"
|
||||
#define BOARD_ID 0x613870a9
|
||||
|
||||
#define FLASH_PAGE_SIZE 1024
|
||||
#define STM32F10X_MD /* Medium-density device */
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
#define STM32_PLLMUL_VALUE 9
|
||||
@@ -27,5 +31,3 @@
|
||||
|
||||
#define RCC_ENR_IOP_EN RCC_APB2ENR_IOPAEN
|
||||
#define RCC_RSTR_IOP_RST RCC_APB2RSTR_IOPARST
|
||||
|
||||
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
|
||||
|
||||
@@ -1,4 +1,9 @@
|
||||
#define BOARD_NAME "FST-01"
|
||||
#define BOARD_ID 0x696886af
|
||||
/* echo -n "FST-01" | sha256sum | sed -e 's/^.*\(........\) -$/\1/' */
|
||||
|
||||
#define FLASH_PAGE_SIZE 1024
|
||||
#define STM32F10X_MD /* Medium-density device */
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
#define STM32_PLLMUL_VALUE 6
|
||||
@@ -60,11 +65,3 @@
|
||||
|
||||
#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
|
||||
#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
|
||||
|
||||
/* NeuG settings for ADC2. */
|
||||
#define NEUG_ADC_SETTING2_SMPR1 0
|
||||
#define NEUG_ADC_SETTING2_SMPR2 ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5) \
|
||||
| ADC_SMPR2_SMP_AN9(ADC_SAMPLE_1P5)
|
||||
#define NEUG_ADC_SETTING2_SQR3 ADC_SQR3_SQ1_N(ADC_CHANNEL_IN0) \
|
||||
| ADC_SQR3_SQ2_N(ADC_CHANNEL_IN9)
|
||||
#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
|
||||
|
||||
@@ -1,4 +1,8 @@
|
||||
#define BOARD_NAME "Maple Mini"
|
||||
#define BOARD_ID 0x7a445272
|
||||
|
||||
#define FLASH_PAGE_SIZE 1024
|
||||
#define STM32F10X_MD /* Medium-density device */
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
#define STM32_PLLMUL_VALUE 9
|
||||
@@ -36,5 +40,3 @@
|
||||
|
||||
#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
|
||||
#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
|
||||
|
||||
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
|
||||
|
||||
@@ -1,4 +1,8 @@
|
||||
#define BOARD_NAME "Olimex STM32-H103"
|
||||
#define BOARD_ID 0xf92bb594
|
||||
|
||||
#define FLASH_PAGE_SIZE 1024
|
||||
#define STM32F10X_MD /* Medium-density device */
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
#define STM32_PLLMUL_VALUE 9
|
||||
|
||||
@@ -1,4 +1,8 @@
|
||||
#define BOARD_NAME "STBee Mini"
|
||||
#define BOARD_ID 0x1f341961
|
||||
|
||||
#define FLASH_PAGE_SIZE 1024
|
||||
#define STM32F10X_MD /* Medium-density device */
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
#define STM32_PLLMUL_VALUE 6
|
||||
@@ -108,11 +112,3 @@
|
||||
|
||||
|
||||
#define AFIO_MAPR_SOMETHING AFIO_MAPR_SWJ_CFG_DISABLE
|
||||
|
||||
/* NeuG settings for ADC2. */
|
||||
#define NEUG_ADC_SETTING2_SMPR1 0
|
||||
#define NEUG_ADC_SETTING2_SMPR2 ADC_SMPR2_SMP_AN1(ADC_SAMPLE_1P5) \
|
||||
| ADC_SMPR2_SMP_AN2(ADC_SAMPLE_1P5)
|
||||
#define NEUG_ADC_SETTING2_SQR3 ADC_SQR3_SQ1_N(ADC_CHANNEL_IN1) \
|
||||
| ADC_SQR3_SQ2_N(ADC_CHANNEL_IN2)
|
||||
#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
#define BOARD_NAME "STBee"
|
||||
#define BOARD_ID 0x945c37e8
|
||||
|
||||
#define FLASH_PAGE_SIZE 2048
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
@@ -31,11 +34,3 @@
|
||||
#define VAL_GPIO_LED_ODR 0xFFFFFFFF
|
||||
#define VAL_GPIO_LED_CRL 0x88862888 /* PD7...PD0 */
|
||||
#define VAL_GPIO_LED_CRH 0x88888888 /* PD15...PD8 */
|
||||
|
||||
/* NeuG settings for ADC2. */
|
||||
#define NEUG_ADC_SETTING2_SMPR1 ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) \
|
||||
| ADC_SMPR1_SMP_AN11(ADC_SAMPLE_1P5)
|
||||
#define NEUG_ADC_SETTING2_SMPR2 0
|
||||
#define NEUG_ADC_SETTING2_SQR3 ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) \
|
||||
| ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11)
|
||||
#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
#define BOARD_NAME "STM32 Primer2"
|
||||
#define BOARD_ID 0x21e5798d
|
||||
|
||||
#define FLASH_PAGE_SIZE 2048
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
@@ -5,7 +8,7 @@
|
||||
#define STM32_HSECLK 12000000
|
||||
|
||||
#define GPIO_LED_BASE GPIOE_BASE
|
||||
#define GPIO_LED_CLEAR_TO_EMIT 0
|
||||
#define GPIO_LED_SET_TO_EMIT 0
|
||||
#define GPIO_USB_BASE GPIOD_BASE
|
||||
#define GPIO_USB_CLEAR_TO_ENABLE 3
|
||||
#define GPIO_OTHER_BASE GPIOA_BASE
|
||||
@@ -14,12 +17,13 @@
|
||||
* Port A setup.
|
||||
* PA0 - input with pull-up. AN0
|
||||
* PA1 - input with pull-up. AN1
|
||||
* PA8 - Input with pull-down (PBUTTON).
|
||||
* PA11 - Push Pull output 10MHz 0 default (until USB enabled) (USBDM)
|
||||
* PA12 - Push Pull output 10MHz 0 default (until USB enabled) (USBDP)
|
||||
* ------------------------ Default
|
||||
* PAx - input with pull-up
|
||||
*/
|
||||
#define VAL_GPIO_OTHER_ODR 0xFFFFE7FF
|
||||
#define VAL_GPIO_OTHER_ODR 0xFFFFE6FF
|
||||
#define VAL_GPIO_OTHER_CRL 0x88888888 /* PA7...PA0 */
|
||||
#define VAL_GPIO_OTHER_CRH 0x88811888 /* PA15...PA8 */
|
||||
|
||||
@@ -37,10 +41,14 @@
|
||||
* Port E setup.
|
||||
* PE0 - Push pull output (LED 1:ON 0:OFF)
|
||||
* PE1 - Push pull output (LED 1:ON 0:OFF)
|
||||
* PE3 - Input with pull-down (JOYSTICK L).
|
||||
* PE4 - Input with pull-down (JOYSTICK R).
|
||||
* PE5 - Input with pull-down (JOYSTICK U).
|
||||
* PE6 - Input with pull-down (JOYSTICK D).
|
||||
* ------------------------ Default
|
||||
* PEx - input with pull-up
|
||||
*/
|
||||
#define VAL_GPIO_LED_ODR 0xFFFFFFFF
|
||||
#define VAL_GPIO_LED_ODR 0xFFFFFF87
|
||||
#define VAL_GPIO_LED_CRL 0x88888833 /* PE7...PE0 */
|
||||
#define VAL_GPIO_LED_CRH 0x88888888 /* PE15...PE8 */
|
||||
|
||||
@@ -48,5 +56,3 @@
|
||||
(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_IOPEEN)
|
||||
#define RCC_RSTR_IOP_RST \
|
||||
(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPDRST | RCC_APB2RSTR_IOPERST)
|
||||
|
||||
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
|
||||
|
||||
@@ -1,3 +1,6 @@
|
||||
#define BOARD_NAME "STM32F0 Discovery"
|
||||
#define BOARD_ID 0xde4b4bc1
|
||||
|
||||
/*
|
||||
* Running at 48MHz with HSI as clock source.
|
||||
*
|
||||
|
||||
@@ -1,4 +1,8 @@
|
||||
#define BOARD_NAME "STM8S Discovery"
|
||||
#define BOARD_ID 0x2f0976bb
|
||||
|
||||
#define FLASH_PAGE_SIZE 1024
|
||||
#define STM32F10X_MD /* Medium-density device */
|
||||
|
||||
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
|
||||
#define STM32_PLLMUL_VALUE 9
|
||||
@@ -44,8 +48,6 @@
|
||||
#define RCC_RSTR_IOP_RST \
|
||||
(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | RCC_APB2RSTR_AFIORST)
|
||||
|
||||
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
|
||||
|
||||
/*
|
||||
* Port B setup.
|
||||
* PB4 - (TIM3_CH1) input with pull-up
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
\input texinfo @c -*-texinfo-*-
|
||||
@c %**start of header
|
||||
@setfilename chopstx.info
|
||||
@set VERSION 0.06
|
||||
@set VERSION 0.07
|
||||
@settitle Chopstx Reference Manual
|
||||
@c Unify some of the indices.
|
||||
@syncodeindex tp fn
|
||||
|
||||
22
entry.c
22
entry.c
@@ -34,6 +34,7 @@
|
||||
#define INLINE __attribute__ ((used))
|
||||
#include "sys.h"
|
||||
#include "board.h"
|
||||
#undef STM32F10X_MD /* Prepare for high density device, too. */
|
||||
#else
|
||||
#include "board.h"
|
||||
#include "clk_gpio_init.c"
|
||||
@@ -192,12 +193,25 @@ handler vector_table[] __attribute__ ((section(".startup.vectors"))) = {
|
||||
chx_handle_intr /* DMA1 CH6 */, chx_handle_intr /* DMA1 CH7 */,
|
||||
chx_handle_intr /* ADC1_2 */, chx_handle_intr /* USB HP */,
|
||||
/* 0x90 */
|
||||
chx_handle_intr, /* USB LP */
|
||||
/* ... and more. CAN, EXT9_5, TIMx, I2C, SPI, USART, EXT15_10 */
|
||||
chx_handle_intr /* USB LP */, chx_handle_intr /* CAN */,
|
||||
/* ... and more. EXT9_5, TIMx, I2C, SPI, USART, EXT15_10 */
|
||||
chx_handle_intr, chx_handle_intr,
|
||||
/* 0xA0 */
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
/* 0xc0 */
|
||||
#if !defined(__ARM_ARCH_6M__)
|
||||
/* STM32F0 doesn't have more. */
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
#endif
|
||||
#if !defined(STM32F10X_MD)
|
||||
/* High-density chips have more; RTCAlarm, USBWakeup, ... , DMA2_Channel4_5 */
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
#endif
|
||||
};
|
||||
|
||||
1
example-cdc/board.h
Symbolic link
1
example-cdc/board.h
Symbolic link
@@ -0,0 +1 @@
|
||||
../board/board-fst-01.h
|
||||
@@ -14,9 +14,6 @@ MEMORY
|
||||
ram : org = 0x20000000, len = 20k
|
||||
}
|
||||
|
||||
__flash_start__ = 0x08001000;
|
||||
__flash_end__ = 0x08020000;
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = 20k;
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
@@ -25,15 +22,17 @@ SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
.sys : ALIGN(16) SUBALIGN(16)
|
||||
.sys : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
_sys = .;
|
||||
KEEP(*(.vectors))
|
||||
_sys = .;
|
||||
KEEP(*(.vectors))
|
||||
. = ALIGN(16);
|
||||
*(.sys.version)
|
||||
KEEP(*(.sys.version))
|
||||
KEEP(*(.sys.board_id))
|
||||
KEEP(*(.sys.board_name))
|
||||
build/sys.o(.text)
|
||||
build/sys.o(.text.*)
|
||||
build/sys.o(.rodata)
|
||||
build/sys.o(.rodata)
|
||||
build/sys.o(.rodata.*)
|
||||
. = ALIGN(1024);
|
||||
*(.sys.0)
|
||||
@@ -59,6 +58,7 @@ SECTIONS
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
|
||||
|
||||
@@ -243,16 +243,19 @@ flash_check_blank (const uint8_t *p_start, size_t size)
|
||||
return 1;
|
||||
}
|
||||
|
||||
extern uint8_t __flash_start__, __flash_end__;
|
||||
#define FLASH_START_ADDR 0x08000000 /* Fixed for all STM32F1. */
|
||||
#define FLASH_OFFSET 0x1000 /* First pages are not-writable. */
|
||||
#define FLASH_START (FLASH_START_ADDR+FLASH_OFFSET)
|
||||
#define CHIP_ID_REG ((uint32_t *)0xe0042000)
|
||||
#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7e0)
|
||||
|
||||
static int
|
||||
flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
|
||||
{
|
||||
int status;
|
||||
uint32_t flash_start = (uint32_t)&__flash_start__;
|
||||
uint32_t flash_end = (uint32_t)&__flash_end__;
|
||||
uint32_t flash_end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
|
||||
|
||||
if (dst_addr < flash_start || dst_addr + len > flash_end)
|
||||
if (dst_addr < FLASH_START || dst_addr + len > flash_end)
|
||||
return 0;
|
||||
|
||||
while (len)
|
||||
@@ -305,17 +308,21 @@ flash_protect (void)
|
||||
static void __attribute__((naked))
|
||||
flash_erase_all_and_exec (void (*entry)(void))
|
||||
{
|
||||
uint32_t addr = (uint32_t)&__flash_start__;
|
||||
uint32_t end = (uint32_t)&__flash_end__;
|
||||
uint32_t addr = FLASH_START;
|
||||
uint32_t end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
|
||||
uint32_t page_size = 1024;
|
||||
int r;
|
||||
|
||||
if (((*CHIP_ID_REG) & 0xfff) == 0x0414)
|
||||
page_size = 2048;
|
||||
|
||||
while (addr < end)
|
||||
{
|
||||
r = flash_erase_page (addr);
|
||||
if (r != 0)
|
||||
break;
|
||||
|
||||
addr += FLASH_PAGE_SIZE;
|
||||
addr += page_size;
|
||||
}
|
||||
|
||||
if (addr >= end)
|
||||
@@ -415,7 +422,13 @@ handler vector[] __attribute__ ((section(".vectors"))) = {
|
||||
|
||||
const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
|
||||
3*2+2, /* bLength */
|
||||
0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE*/
|
||||
/* sys version: "2.0" */
|
||||
'2', 0, '.', 0, '0', 0,
|
||||
0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */
|
||||
/* sys version: "2.1" */
|
||||
'2', 0, '.', 0, '1', 0,
|
||||
};
|
||||
|
||||
const uint32_t __attribute__((section(".sys.board_id")))
|
||||
sys_board_id = BOARD_ID;
|
||||
|
||||
const uint8_t __attribute__((section(".sys.board_name")))
|
||||
sys_board_name[] = BOARD_NAME;
|
||||
|
||||
@@ -1,4 +1,16 @@
|
||||
#define BOARD_ID_CQ_STARM 0xc5480875
|
||||
#define BOARD_ID_FST_01_00 0x613870a9
|
||||
#define BOARD_ID_FST_01 0x696886af
|
||||
#define BOARD_ID_MAPLE_MINI 0x7a445272
|
||||
#define BOARD_ID_OLIMEX_STM32_H103 0xf92bb594
|
||||
#define BOARD_ID_STBEE_MINI 0x1f341961
|
||||
#define BOARD_ID_STBEE 0x945c37e8
|
||||
#define BOARD_ID_STM32_PRIMER2 0x21e5798d
|
||||
#define BOARD_ID_STM8S_DISCOVERY 0x2f0976bb
|
||||
|
||||
extern const uint8_t sys_version[8];
|
||||
extern const uint32_t sys_board_id;
|
||||
extern const uint8_t sys_board_name[];
|
||||
|
||||
typedef void (*handler)(void);
|
||||
extern handler vector[16];
|
||||
|
||||
1
example-fsm-55/board.h
Symbolic link
1
example-fsm-55/board.h
Symbolic link
@@ -0,0 +1 @@
|
||||
../board/board-fsm-55.h
|
||||
@@ -1,26 +1,19 @@
|
||||
/*
|
||||
* ST32F103 memory setup.
|
||||
* ST32F0 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0100; /* Exception handlers */
|
||||
__process0_stack_size__ = 0x0100; /* Main program */
|
||||
__process0_stack_size__ = 0x0100; /* Main program */
|
||||
__process1_stack_size__ = 0x0100; /* first thread program */
|
||||
__process2_stack_size__ = 0x0100; /* second thread program */
|
||||
__process3_stack_size__ = 0x0100; /* third thread program */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
flash0 : org = 0x08000000, len = 4k
|
||||
flash : org = 0x08000000+0x1000, len = 60k
|
||||
*/
|
||||
flash0 : org = 0x08000000, len = 1k
|
||||
flash : org = 0x08000000+0x0400, len = 60k
|
||||
ram : org = 0x20000000, len = 20k
|
||||
}
|
||||
|
||||
__flash_start__ = 0x08001000;
|
||||
__flash_end__ = 0x08020000;
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = 20k;
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
@@ -29,23 +22,20 @@ SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
.sys : ALIGN(16) SUBALIGN(16)
|
||||
.sys : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
_sys = .;
|
||||
KEEP(*(.vectors))
|
||||
_sys = .;
|
||||
KEEP(*(.vectors))
|
||||
. = ALIGN(16);
|
||||
*(.sys.version)
|
||||
KEEP(*(.sys.version))
|
||||
KEEP(*(.sys.board_id))
|
||||
KEEP(*(.sys.board_name))
|
||||
build/sys.o(.text)
|
||||
build/sys.o(.text.*)
|
||||
build/sys.o(.rodata)
|
||||
build/sys.o(.rodata)
|
||||
build/sys.o(.rodata.*)
|
||||
. = ALIGN(1024);
|
||||
/*
|
||||
*(.sys.0)
|
||||
*(.sys.1)
|
||||
*(.sys.2)
|
||||
*/
|
||||
} > flash0
|
||||
} > flash0 =0xffffffff
|
||||
|
||||
_text = .;
|
||||
|
||||
@@ -65,6 +55,7 @@ SECTIONS
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
|
||||
@@ -97,15 +88,15 @@ SECTIONS
|
||||
__process3_stack_base__ = .;
|
||||
. += __process3_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack3_end__ = .;
|
||||
__process3_stack_end__ = .;
|
||||
__process2_stack_base__ = .;
|
||||
. += __process2_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack2_end__ = .;
|
||||
__process2_stack_end__ = .;
|
||||
__process1_stack_base__ = .;
|
||||
. += __process1_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack1_end__ = .;
|
||||
__process1_stack_end__ = .;
|
||||
__process0_stack_base__ = .;
|
||||
. += __process0_stack_size__;
|
||||
. = ALIGN(8);
|
||||
|
||||
@@ -243,16 +243,25 @@ flash_check_blank (const uint8_t *p_start, size_t size)
|
||||
return 1;
|
||||
}
|
||||
|
||||
extern uint8_t __flash_start__, __flash_end__;
|
||||
#define FLASH_START_ADDR 0x08000000 /* Fixed for all STM32F0/F1. */
|
||||
#define FLASH_OFFSET 0x1000 /* First pages are not-writable
|
||||
when protected. */
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7cc)
|
||||
#define CHIP_ID_REG ((uint32_t *)0x40015800)
|
||||
#else
|
||||
#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7e0)
|
||||
#define CHIP_ID_REG ((uint32_t *)0xe0042000)
|
||||
#endif
|
||||
#define FLASH_START (FLASH_START_ADDR+FLASH_OFFSET)
|
||||
|
||||
static int
|
||||
flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
|
||||
{
|
||||
int status;
|
||||
uint32_t flash_start = (uint32_t)&__flash_start__;
|
||||
uint32_t flash_end = (uint32_t)&__flash_end__;
|
||||
uint32_t flash_end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
|
||||
|
||||
if (dst_addr < flash_start || dst_addr + len > flash_end)
|
||||
if (dst_addr < FLASH_START || dst_addr + len > flash_end)
|
||||
return 0;
|
||||
|
||||
while (len)
|
||||
@@ -305,17 +314,21 @@ flash_protect (void)
|
||||
static void __attribute__((naked))
|
||||
flash_erase_all_and_exec (void (*entry)(void))
|
||||
{
|
||||
uint32_t addr = (uint32_t)&__flash_start__;
|
||||
uint32_t end = (uint32_t)&__flash_end__;
|
||||
uint32_t addr = FLASH_START;
|
||||
uint32_t end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
|
||||
uint32_t page_size = 1024;
|
||||
int r;
|
||||
|
||||
if (((*CHIP_ID_REG) & 0xfff) == 0x0414)
|
||||
page_size = 2048;
|
||||
|
||||
while (addr < end)
|
||||
{
|
||||
r = flash_erase_page (addr);
|
||||
if (r != 0)
|
||||
break;
|
||||
|
||||
addr += FLASH_PAGE_SIZE;
|
||||
addr += page_size;
|
||||
}
|
||||
|
||||
if (addr >= end)
|
||||
@@ -364,14 +377,14 @@ static void __attribute__ ((naked))
|
||||
reset (void)
|
||||
{
|
||||
/*
|
||||
* This code may not be at start of flash ROM, because of DFU.
|
||||
* This code may not be at the start of flash ROM, because of DFU.
|
||||
* So, we take the address from PC.
|
||||
*/
|
||||
#if __ARM_ARCH_6M__
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
|
||||
"ldr r0, 1f\n\t" /* r0 = RAM start */
|
||||
"mov r1, pc\n\t" /* r1 = (PC + 0x0400) & ~0x03ff */
|
||||
"mov r2, #0x04\n\t"
|
||||
"mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
|
||||
"mov r2, #0x10\n\t"
|
||||
"lsl r2, #8\n\t"
|
||||
"add r1, r1, r2\n\t"
|
||||
"sub r2, r2, #1\n\t"
|
||||
@@ -436,7 +449,13 @@ handler vector[] __attribute__ ((section(".vectors"))) = {
|
||||
|
||||
const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
|
||||
3*2+2, /* bLength */
|
||||
0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE*/
|
||||
/* sys version: "2.0" */
|
||||
'2', 0, '.', 0, '0', 0,
|
||||
0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */
|
||||
/* sys version: "2.1" */
|
||||
'2', 0, '.', 0, '1', 0,
|
||||
};
|
||||
|
||||
const uint32_t __attribute__((section(".sys.board_id")))
|
||||
sys_board_id = BOARD_ID;
|
||||
|
||||
const uint8_t __attribute__((section(".sys.board_name")))
|
||||
sys_board_name[] = BOARD_NAME;
|
||||
|
||||
@@ -1,4 +1,21 @@
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
#define BOARD_ID_STM32F0_DISCOVERY 0xde4b4bc1
|
||||
#define BOARD_ID_FSM_55 0x83433c76
|
||||
#else
|
||||
#define BOARD_ID_CQ_STARM 0xc5480875
|
||||
#define BOARD_ID_FST_01_00 0x613870a9
|
||||
#define BOARD_ID_FST_01 0x696886af
|
||||
#define BOARD_ID_MAPLE_MINI 0x7a445272
|
||||
#define BOARD_ID_OLIMEX_STM32_H103 0xf92bb594
|
||||
#define BOARD_ID_STBEE_MINI 0x1f341961
|
||||
#define BOARD_ID_STBEE 0x945c37e8
|
||||
#define BOARD_ID_STM32_PRIMER2 0x21e5798d
|
||||
#define BOARD_ID_STM8S_DISCOVERY 0x2f0976bb
|
||||
#endif
|
||||
|
||||
extern const uint8_t sys_version[8];
|
||||
extern const uint32_t sys_board_id;
|
||||
extern const uint8_t sys_board_name[];
|
||||
|
||||
typedef void (*handler)(void);
|
||||
extern handler vector[16];
|
||||
|
||||
@@ -2,9 +2,14 @@
|
||||
|
||||
PROJECT = sample
|
||||
|
||||
### Currently, it's for STM32F0 Discovery.
|
||||
### Please change lines started with '###' for Cortex-M3 board.
|
||||
|
||||
CHOPSTX = ..
|
||||
LDSCRIPT= sample.ld
|
||||
CSRC = sys.c aes-constant-ft.c sample.c
|
||||
### LDSCRIPT= sample.ld.m3
|
||||
CSRC = sys.c sample.c
|
||||
### CSRC = sys.c aes-constant-ft.c sample.c
|
||||
|
||||
###################################
|
||||
CROSS = arm-none-eabi-
|
||||
@@ -12,11 +17,11 @@ CC = $(CROSS)gcc
|
||||
LD = $(CROSS)gcc
|
||||
OBJCOPY = $(CROSS)objcopy
|
||||
|
||||
# MCU = cortex-m3
|
||||
### MCU = cortex-m3
|
||||
MCU = cortex-m0
|
||||
CWARN = -Wall -Wextra -Wstrict-prototypes
|
||||
DEFS = -DHAVE_SYS_H -DFREE_STANDING -DMHZ=48
|
||||
# DEFS = -DFREE_STANDING -DHAVE_SYS_H -DBUSY_LOOP -DCHX_FLAGS_MAIN=CHOPSTX_SCHED_RR
|
||||
### DEFS = -DFREE_STANDING -DHAVE_SYS_H -DBUSY_LOOP -DCHX_FLAGS_MAIN=CHOPSTX_SCHED_RR
|
||||
OPT = -O3 -Os -g
|
||||
LIBS =
|
||||
|
||||
|
||||
1
example-led/board.h
Symbolic link
1
example-led/board.h
Symbolic link
@@ -0,0 +1 @@
|
||||
../board/board-stm32f0-discovery.h
|
||||
@@ -1,26 +1,19 @@
|
||||
/*
|
||||
* ST32F103 memory setup.
|
||||
* ST32F0 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0100; /* Exception handlers */
|
||||
__process0_stack_size__ = 0x0100; /* Main program */
|
||||
__process0_stack_size__ = 0x0100; /* Main program */
|
||||
__process1_stack_size__ = 0x0100; /* first thread program */
|
||||
__process2_stack_size__ = 0x0100; /* second thread program */
|
||||
__process3_stack_size__ = 0x0100; /* third thread program */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
/*
|
||||
flash0 : org = 0x08000000, len = 4k
|
||||
flash : org = 0x08000000+0x1000, len = 60k
|
||||
*/
|
||||
flash0 : org = 0x08000000, len = 1k
|
||||
flash : org = 0x08000000+0x0400, len = 60k
|
||||
ram : org = 0x20000000, len = 20k
|
||||
}
|
||||
|
||||
__flash_start__ = 0x08001000;
|
||||
__flash_end__ = 0x08020000;
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = 20k;
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
@@ -29,15 +22,17 @@ SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
.sys : ALIGN(16) SUBALIGN(16)
|
||||
.sys : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
_sys = .;
|
||||
KEEP(*(.vectors))
|
||||
_sys = .;
|
||||
KEEP(*(.vectors))
|
||||
. = ALIGN(16);
|
||||
*(.sys.version)
|
||||
KEEP(*(.sys.version))
|
||||
KEEP(*(.sys.board_id))
|
||||
KEEP(*(.sys.board_name))
|
||||
build/sys.o(.text)
|
||||
build/sys.o(.text.*)
|
||||
build/sys.o(.rodata)
|
||||
build/sys.o(.rodata)
|
||||
build/sys.o(.rodata.*)
|
||||
. = ALIGN(1024);
|
||||
/*
|
||||
@@ -45,7 +40,7 @@ SECTIONS
|
||||
*(.sys.1)
|
||||
*(.sys.2)
|
||||
*/
|
||||
} > flash0
|
||||
} > flash0 =0xffffffff
|
||||
|
||||
_text = .;
|
||||
|
||||
@@ -65,6 +60,7 @@ SECTIONS
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
|
||||
@@ -88,7 +84,7 @@ SECTIONS
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__vector_ram_addr__ = .;
|
||||
KEEP(*(.data.startup.*))
|
||||
KEEP(*(.bss.startup.*))
|
||||
} > ram
|
||||
|
||||
.process_stack :
|
||||
@@ -97,15 +93,15 @@ SECTIONS
|
||||
__process3_stack_base__ = .;
|
||||
. += __process3_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack3_end__ = .;
|
||||
__process3_stack_end__ = .;
|
||||
__process2_stack_base__ = .;
|
||||
. += __process2_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack2_end__ = .;
|
||||
__process2_stack_end__ = .;
|
||||
__process1_stack_base__ = .;
|
||||
. += __process1_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process_stack1_end__ = .;
|
||||
__process1_stack_end__ = .;
|
||||
__process0_stack_base__ = .;
|
||||
. += __process0_stack_size__;
|
||||
. = ALIGN(8);
|
||||
|
||||
142
example-led/sample.ld.m3
Normal file
142
example-led/sample.ld.m3
Normal file
@@ -0,0 +1,142 @@
|
||||
/*
|
||||
* ST32F103 memory setup.
|
||||
*/
|
||||
__main_stack_size__ = 0x0100; /* Exception handlers */
|
||||
__process0_stack_size__ = 0x0100; /* Main program */
|
||||
__process1_stack_size__ = 0x0100; /* first thread program */
|
||||
__process2_stack_size__ = 0x0100; /* second thread program */
|
||||
__process3_stack_size__ = 0x0100; /* third thread program */
|
||||
|
||||
MEMORY
|
||||
{
|
||||
flash0 : org = 0x08000000, len = 4k
|
||||
flash : org = 0x08000000+0x1000, len = 60k
|
||||
ram : org = 0x20000000, len = 20k
|
||||
}
|
||||
|
||||
__ram_start__ = ORIGIN(ram);
|
||||
__ram_size__ = 20k;
|
||||
__ram_end__ = __ram_start__ + __ram_size__;
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
. = 0;
|
||||
|
||||
.sys : ALIGN(4) SUBALIGN(4)
|
||||
{
|
||||
_sys = .;
|
||||
KEEP(*(.vectors))
|
||||
. = ALIGN(16);
|
||||
KEEP(*(.sys.version))
|
||||
KEEP(*(.sys.board_id))
|
||||
KEEP(*(.sys.board_name))
|
||||
build/sys.o(.text)
|
||||
build/sys.o(.text.*)
|
||||
build/sys.o(.rodata)
|
||||
build/sys.o(.rodata.*)
|
||||
. = ALIGN(1024);
|
||||
*(.sys.0)
|
||||
*(.sys.1)
|
||||
*(.sys.2)
|
||||
} > flash0
|
||||
|
||||
_text = .;
|
||||
|
||||
.startup : ALIGN(128) SUBALIGN(128)
|
||||
{
|
||||
KEEP(*(.startup.vectors))
|
||||
. = ALIGN (16);
|
||||
} > flash =0xffffffff
|
||||
|
||||
.text : ALIGN(16) SUBALIGN(16)
|
||||
{
|
||||
*(.text.startup.*)
|
||||
*(.text)
|
||||
*(.text.*)
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.glue_7t)
|
||||
*(.glue_7)
|
||||
*(.gcc*)
|
||||
. = ALIGN(8);
|
||||
} > flash
|
||||
|
||||
.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
|
||||
|
||||
.ARM.exidx : {
|
||||
PROVIDE(__exidx_start = .);
|
||||
*(.ARM.exidx* .gnu.linkonce.armexidx.*)
|
||||
PROVIDE(__exidx_end = .);
|
||||
} > flash
|
||||
|
||||
.eh_frame_hdr : {*(.eh_frame_hdr)} > flash
|
||||
|
||||
.eh_frame : ONLY_IF_RO {*(.eh_frame)} > flash
|
||||
|
||||
.textalign : ONLY_IF_RO { . = ALIGN(8); } > flash
|
||||
|
||||
_etext = .;
|
||||
_textdata = _etext;
|
||||
|
||||
.process_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__process3_stack_base__ = .;
|
||||
. += __process3_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process3_stack_end__ = .;
|
||||
__process2_stack_base__ = .;
|
||||
. += __process2_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process2_stack_end__ = .;
|
||||
__process1_stack_base__ = .;
|
||||
. += __process1_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process1_stack_end__ = .;
|
||||
__process0_stack_base__ = .;
|
||||
. += __process0_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__process0_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.main_stack :
|
||||
{
|
||||
. = ALIGN(8);
|
||||
__main_stack_base__ = .;
|
||||
. += __main_stack_size__;
|
||||
. = ALIGN(8);
|
||||
__main_stack_end__ = .;
|
||||
} > ram
|
||||
|
||||
.data :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_data = .);
|
||||
*(.data)
|
||||
. = ALIGN(4);
|
||||
*(.data.*)
|
||||
. = ALIGN(4);
|
||||
*(.ramtext)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_edata = .);
|
||||
} > ram AT > flash
|
||||
|
||||
.bss :
|
||||
{
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_start = .);
|
||||
*(.bss)
|
||||
. = ALIGN(4);
|
||||
*(.bss.*)
|
||||
. = ALIGN(4);
|
||||
*(COMMON)
|
||||
. = ALIGN(4);
|
||||
PROVIDE(_bss_end = .);
|
||||
} > ram
|
||||
|
||||
PROVIDE(end = .);
|
||||
_end = .;
|
||||
}
|
||||
|
||||
__heap_base__ = _end;
|
||||
__heap_end__ = __ram_end__;
|
||||
@@ -1,444 +0,0 @@
|
||||
/*
|
||||
* sys.c - system routines for the initial page for STM32F030 / STM32F103.
|
||||
*
|
||||
* Copyright (C) 2013, 2014, 2015 Flying Stone Technology
|
||||
* Author: NIIBE Yutaka <gniibe@fsij.org>
|
||||
*
|
||||
* Copying and distribution of this file, with or without modification,
|
||||
* are permitted in any medium without royalty provided the copyright
|
||||
* notice and this notice are preserved. This file is offered as-is,
|
||||
* without any warranty.
|
||||
*
|
||||
* When the flash ROM is protected, we cannot modify the initial page.
|
||||
* We put some system routines (which is useful for any program) here.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include "board.h"
|
||||
|
||||
#include "clk_gpio_init.c"
|
||||
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
|
||||
#define USB_LP_CAN1_RX0_IRQn 20
|
||||
#define STM32_USB_IRQ_PRIORITY 11
|
||||
|
||||
struct NVIC {
|
||||
uint32_t ISER[8];
|
||||
uint32_t unused1[24];
|
||||
uint32_t ICER[8];
|
||||
uint32_t unused2[24];
|
||||
uint32_t ISPR[8];
|
||||
uint32_t unused3[24];
|
||||
uint32_t ICPR[8];
|
||||
uint32_t unused4[24];
|
||||
uint32_t IABR[8];
|
||||
uint32_t unused5[56];
|
||||
uint32_t IPR[60];
|
||||
};
|
||||
|
||||
static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
|
||||
#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
|
||||
#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
|
||||
#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
|
||||
|
||||
static void
|
||||
nvic_enable_vector (uint32_t n, uint32_t prio)
|
||||
{
|
||||
unsigned int sh = (n & 3) << 3;
|
||||
|
||||
NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
|
||||
NVIC_ICPR (n) = 1 << (n & 0x1F);
|
||||
NVIC_ISER (n) = 1 << (n & 0x1F);
|
||||
}
|
||||
|
||||
static void
|
||||
usb_cable_config (int enable)
|
||||
{
|
||||
#if defined(GPIO_USB_SET_TO_ENABLE)
|
||||
if (enable)
|
||||
GPIO_USB->BSRR = (1 << GPIO_USB_SET_TO_ENABLE);
|
||||
else
|
||||
GPIO_USB->BRR = (1 << GPIO_USB_SET_TO_ENABLE);
|
||||
#elif defined(GPIO_USB_CLEAR_TO_ENABLE)
|
||||
if (enable)
|
||||
GPIO_USB->BRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
|
||||
else
|
||||
GPIO_USB->BSRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
|
||||
#else
|
||||
(void)enable;
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
set_led (int on)
|
||||
{
|
||||
#if defined(GPIO_LED_CLEAR_TO_EMIT)
|
||||
if (on)
|
||||
GPIO_LED->BRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
|
||||
else
|
||||
GPIO_LED->BSRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
|
||||
#else
|
||||
if (on)
|
||||
GPIO_LED->BSRR = (1 << GPIO_LED_SET_TO_EMIT);
|
||||
else
|
||||
GPIO_LED->BRR = (1 << GPIO_LED_SET_TO_EMIT);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void wait (int count)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++)
|
||||
asm volatile ("" : : "r" (i) : "memory");
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
usb_lld_sys_shutdown (void)
|
||||
{
|
||||
RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
|
||||
RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
|
||||
usb_cable_config (0);
|
||||
}
|
||||
|
||||
static void
|
||||
usb_lld_sys_init (void)
|
||||
{
|
||||
if ((RCC->APB1ENR & RCC_APB1ENR_USBEN)
|
||||
&& (RCC->APB1RSTR & RCC_APB1RSTR_USBRST) == 0)
|
||||
/* Make sure the device is disconnected, even after core reset. */
|
||||
{
|
||||
usb_lld_sys_shutdown ();
|
||||
/* Disconnect requires SE0 (>= 2.5uS). */
|
||||
wait (300);
|
||||
}
|
||||
|
||||
usb_cable_config (1);
|
||||
RCC->APB1ENR |= RCC_APB1ENR_USBEN;
|
||||
nvic_enable_vector (USB_LP_CAN1_RX0_IRQn,
|
||||
CORTEX_PRIORITY_MASK (STM32_USB_IRQ_PRIORITY));
|
||||
/*
|
||||
* Note that we also have other IRQ(s):
|
||||
* USB_HP_CAN1_TX_IRQn (for double-buffered or isochronous)
|
||||
* USBWakeUp_IRQn (suspend/resume)
|
||||
*/
|
||||
RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
|
||||
RCC->APB1RSTR = 0;
|
||||
}
|
||||
|
||||
#define FLASH_KEY1 0x45670123UL
|
||||
#define FLASH_KEY2 0xCDEF89ABUL
|
||||
|
||||
enum flash_status
|
||||
{
|
||||
FLASH_BUSY = 1,
|
||||
FLASH_ERROR_PG,
|
||||
FLASH_ERROR_WRP,
|
||||
FLASH_COMPLETE,
|
||||
FLASH_TIMEOUT
|
||||
};
|
||||
|
||||
static void __attribute__ ((used))
|
||||
flash_unlock (void)
|
||||
{
|
||||
FLASH->KEYR = FLASH_KEY1;
|
||||
FLASH->KEYR = FLASH_KEY2;
|
||||
}
|
||||
|
||||
|
||||
#define intr_disable() asm volatile ("cpsid i" : : : "memory")
|
||||
#define intr_enable() asm volatile ("cpsie i" : : : "memory")
|
||||
|
||||
#define FLASH_SR_BSY 0x01
|
||||
#define FLASH_SR_PGERR 0x04
|
||||
#define FLASH_SR_WRPRTERR 0x10
|
||||
#define FLASH_SR_EOP 0x20
|
||||
|
||||
#define FLASH_CR_PG 0x0001
|
||||
#define FLASH_CR_PER 0x0002
|
||||
#define FLASH_CR_MER 0x0004
|
||||
#define FLASH_CR_OPTPG 0x0010
|
||||
#define FLASH_CR_OPTER 0x0020
|
||||
#define FLASH_CR_STRT 0x0040
|
||||
#define FLASH_CR_LOCK 0x0080
|
||||
#define FLASH_CR_OPTWRE 0x0200
|
||||
#define FLASH_CR_ERRIE 0x0400
|
||||
#define FLASH_CR_EOPIE 0x1000
|
||||
|
||||
static int
|
||||
flash_wait_for_last_operation (uint32_t timeout)
|
||||
{
|
||||
int status;
|
||||
|
||||
do
|
||||
{
|
||||
status = FLASH->SR;
|
||||
if (--timeout == 0)
|
||||
break;
|
||||
}
|
||||
while ((status & FLASH_SR_BSY) != 0);
|
||||
|
||||
return status & (FLASH_SR_BSY|FLASH_SR_PGERR|FLASH_SR_WRPRTERR);
|
||||
}
|
||||
|
||||
#define FLASH_PROGRAM_TIMEOUT 0x00010000
|
||||
#define FLASH_ERASE_TIMEOUT 0x01000000
|
||||
|
||||
static int
|
||||
flash_program_halfword (uint32_t addr, uint16_t data)
|
||||
{
|
||||
int status;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
|
||||
|
||||
intr_disable ();
|
||||
if (status == 0)
|
||||
{
|
||||
FLASH->CR |= FLASH_CR_PG;
|
||||
|
||||
*(volatile uint16_t *)addr = data;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
|
||||
FLASH->CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
intr_enable ();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static int
|
||||
flash_erase_page (uint32_t addr)
|
||||
{
|
||||
int status;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
|
||||
intr_disable ();
|
||||
if (status == 0)
|
||||
{
|
||||
FLASH->CR |= FLASH_CR_PER;
|
||||
FLASH->AR = addr;
|
||||
FLASH->CR |= FLASH_CR_STRT;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
FLASH->CR &= ~FLASH_CR_PER;
|
||||
}
|
||||
intr_enable ();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static int
|
||||
flash_check_blank (const uint8_t *p_start, size_t size)
|
||||
{
|
||||
const uint8_t *p;
|
||||
|
||||
for (p = p_start; p < p_start + size; p++)
|
||||
if (*p != 0xff)
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
extern uint8_t __flash_start__, __flash_end__;
|
||||
|
||||
static int
|
||||
flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
|
||||
{
|
||||
int status;
|
||||
uint32_t flash_start = (uint32_t)&__flash_start__;
|
||||
uint32_t flash_end = (uint32_t)&__flash_end__;
|
||||
|
||||
if (dst_addr < flash_start || dst_addr + len > flash_end)
|
||||
return 0;
|
||||
|
||||
while (len)
|
||||
{
|
||||
uint16_t hw = *src++;
|
||||
|
||||
hw |= (*src++ << 8);
|
||||
status = flash_program_halfword (dst_addr, hw);
|
||||
if (status != 0)
|
||||
return 0; /* error return */
|
||||
|
||||
dst_addr += 2;
|
||||
len -= 2;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#define OPTION_BYTES_ADDR 0x1ffff800
|
||||
|
||||
static int
|
||||
flash_protect (void)
|
||||
{
|
||||
int status;
|
||||
uint32_t option_bytes_value;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
|
||||
intr_disable ();
|
||||
if (status == 0)
|
||||
{
|
||||
FLASH->OPTKEYR = FLASH_KEY1;
|
||||
FLASH->OPTKEYR = FLASH_KEY2;
|
||||
|
||||
FLASH->CR |= FLASH_CR_OPTER;
|
||||
FLASH->CR |= FLASH_CR_STRT;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
FLASH->CR &= ~FLASH_CR_OPTER;
|
||||
}
|
||||
intr_enable ();
|
||||
|
||||
if (status != 0)
|
||||
return 0;
|
||||
|
||||
option_bytes_value = *(uint32_t *)OPTION_BYTES_ADDR;
|
||||
return (option_bytes_value & 0xff) == 0xff ? 1 : 0;
|
||||
}
|
||||
|
||||
static void __attribute__((naked))
|
||||
flash_erase_all_and_exec (void (*entry)(void))
|
||||
{
|
||||
uint32_t addr = (uint32_t)&__flash_start__;
|
||||
uint32_t end = (uint32_t)&__flash_end__;
|
||||
int r;
|
||||
|
||||
while (addr < end)
|
||||
{
|
||||
r = flash_erase_page (addr);
|
||||
if (r != 0)
|
||||
break;
|
||||
|
||||
addr += FLASH_PAGE_SIZE;
|
||||
}
|
||||
|
||||
if (addr >= end)
|
||||
(*entry) ();
|
||||
|
||||
for (;;);
|
||||
}
|
||||
|
||||
struct SCB
|
||||
{
|
||||
volatile uint32_t CPUID;
|
||||
volatile uint32_t ICSR;
|
||||
volatile uint32_t VTOR;
|
||||
volatile uint32_t AIRCR;
|
||||
volatile uint32_t SCR;
|
||||
volatile uint32_t CCR;
|
||||
volatile uint8_t SHP[12];
|
||||
volatile uint32_t SHCSR;
|
||||
volatile uint32_t CFSR;
|
||||
volatile uint32_t HFSR;
|
||||
volatile uint32_t DFSR;
|
||||
volatile uint32_t MMFAR;
|
||||
volatile uint32_t BFAR;
|
||||
volatile uint32_t AFSR;
|
||||
volatile uint32_t PFR[2];
|
||||
volatile uint32_t DFR;
|
||||
volatile uint32_t ADR;
|
||||
volatile uint32_t MMFR[4];
|
||||
volatile uint32_t ISAR[5];
|
||||
};
|
||||
|
||||
#define SCS_BASE (0xE000E000)
|
||||
#define SCB_BASE (SCS_BASE + 0x0D00)
|
||||
static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
|
||||
|
||||
#define SYSRESETREQ 0x04
|
||||
static void
|
||||
nvic_system_reset (void)
|
||||
{
|
||||
SCB->AIRCR = (0x05FA0000 | (SCB->AIRCR & 0x70) | SYSRESETREQ);
|
||||
asm volatile ("dsb");
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static void __attribute__ ((naked))
|
||||
reset (void)
|
||||
{
|
||||
extern const unsigned long *FT0, *FT1, *FT2;
|
||||
|
||||
/*
|
||||
* This code may not be at the start of flash ROM, because of DFU.
|
||||
* So, we take the address from PC.
|
||||
*/
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
|
||||
"ldr r0, 1f\n\t" /* r0 = RAM start */
|
||||
"mov r1, pc\n\t" /* r1 = (PC + 0x0400) & ~0x03ff */
|
||||
"mov r2, #0x04\n\t"
|
||||
"lsl r2, #8\n\t"
|
||||
"add r1, r1, r2\n\t"
|
||||
"sub r2, r2, #1\n\t"
|
||||
"bic r1, r1, r2\n\t"
|
||||
"mov r2, #188\n"
|
||||
"2:\n\t" /* Copy vectors. It will be enabled later by clock_init. */
|
||||
"ldr r3, [r1, r2]\n\t"
|
||||
"str r3, [r0, r2]\n\t"
|
||||
"sub r2, #4\n\t"
|
||||
"bcs 2b\n\t"
|
||||
"msr MSP, r3\n\t" /* Main (exception handler) stack. */
|
||||
"ldr r0, [r1, #4]\n\t" /* Reset handler. */
|
||||
"bx r0\n\t"
|
||||
".align 2\n"
|
||||
"1: .word 0x20000000"
|
||||
: /* no output */ : /* no input */ : "memory");
|
||||
#else
|
||||
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
|
||||
"ldr r0, 1f\n\t" /* r0 = SCR */
|
||||
"mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
|
||||
"mov r2, #0x1000\n\t"
|
||||
"add r1, r1, r2\n\t"
|
||||
"sub r2, r2, #1\n\t"
|
||||
"bic r1, r1, r2\n\t"
|
||||
"str r1, [r0, #8]\n\t" /* Set SCR->VCR */
|
||||
"ldr r0, [r1], #4\n\t"
|
||||
"msr MSP, r0\n\t" /* Main (exception handler) stack. */
|
||||
"ldr r0, [r1]\n\t" /* Reset handler. */
|
||||
"bx r0\n\t"
|
||||
".align 2\n"
|
||||
"1: .word 0xe000ed00"
|
||||
: /* no output */ : /* no input */ : "memory");
|
||||
#endif
|
||||
|
||||
/* Never reach here. */
|
||||
/* Artificial entry to refer FT0, FT1, and FT2. */
|
||||
asm volatile (""
|
||||
: : "r" (FT0), "r" (FT1), "r" (FT2));
|
||||
}
|
||||
|
||||
typedef void (*handler)(void);
|
||||
extern uint8_t __ram_end__;
|
||||
|
||||
handler vector[] __attribute__ ((section(".vectors"))) = {
|
||||
(handler)&__ram_end__,
|
||||
reset,
|
||||
(handler)set_led,
|
||||
flash_unlock,
|
||||
(handler)flash_program_halfword,
|
||||
(handler)flash_erase_page,
|
||||
(handler)flash_check_blank,
|
||||
(handler)flash_write,
|
||||
(handler)flash_protect,
|
||||
(handler)flash_erase_all_and_exec,
|
||||
usb_lld_sys_init,
|
||||
usb_lld_sys_shutdown,
|
||||
nvic_system_reset,
|
||||
clock_init,
|
||||
gpio_init,
|
||||
NULL,
|
||||
};
|
||||
|
||||
const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
|
||||
3*2+2, /* bLength */
|
||||
0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE*/
|
||||
/* sys version: "2.0" */
|
||||
'2', 0, '.', 0, '0', 0,
|
||||
};
|
||||
1
example-led/sys.c
Symbolic link
1
example-led/sys.c
Symbolic link
@@ -0,0 +1 @@
|
||||
../example-fsm-55/sys.c
|
||||
@@ -1,115 +0,0 @@
|
||||
extern const uint8_t sys_version[8];
|
||||
|
||||
typedef void (*handler)(void);
|
||||
extern handler vector[16];
|
||||
|
||||
static inline const uint8_t *
|
||||
unique_device_id (void)
|
||||
{
|
||||
/* STM32F103 has 96-bit unique device identifier */
|
||||
const uint8_t *addr = (const uint8_t *)0x1ffff7e8;
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
static inline void
|
||||
set_led (int on)
|
||||
{
|
||||
void (*func) (int) = (void (*)(int))vector[2];
|
||||
|
||||
return (*func) (on);
|
||||
}
|
||||
|
||||
static inline void
|
||||
flash_unlock (void)
|
||||
{
|
||||
(*vector[3]) ();
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_program_halfword (uint32_t addr, uint16_t data)
|
||||
{
|
||||
int (*func) (uint32_t, uint16_t) = (int (*)(uint32_t, uint16_t))vector[4];
|
||||
|
||||
return (*func) (addr, data);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_erase_page (uint32_t addr)
|
||||
{
|
||||
int (*func) (uint32_t) = (int (*)(uint32_t))vector[5];
|
||||
|
||||
return (*func) (addr);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_check_blank (const uint8_t *p_start, size_t size)
|
||||
{
|
||||
int (*func) (const uint8_t *, int) = (int (*)(const uint8_t *, int))vector[6];
|
||||
|
||||
return (*func) (p_start, size);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
|
||||
{
|
||||
int (*func) (uint32_t, const uint8_t *, size_t)
|
||||
= (int (*)(uint32_t, const uint8_t *, size_t))vector[7];
|
||||
|
||||
return (*func) (dst_addr, src, len);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_protect (void)
|
||||
{
|
||||
int (*func) (void) = (int (*)(void))vector[8];
|
||||
|
||||
return (*func) ();
|
||||
}
|
||||
|
||||
static inline void __attribute__((noreturn))
|
||||
flash_erase_all_and_exec (void (*entry)(void))
|
||||
{
|
||||
void (*func) (void (*)(void)) = (void (*)(void (*)(void)))vector[9];
|
||||
|
||||
(*func) (entry);
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static inline void
|
||||
usb_lld_sys_init (void)
|
||||
{
|
||||
(*vector[10]) ();
|
||||
}
|
||||
|
||||
static inline void
|
||||
usb_lld_sys_shutdown (void)
|
||||
{
|
||||
(*vector[11]) ();
|
||||
}
|
||||
|
||||
static inline void
|
||||
nvic_system_reset (void)
|
||||
{
|
||||
(*vector[12]) ();
|
||||
}
|
||||
|
||||
/*
|
||||
* Users can override INLINE by 'attribute((used))' to have an
|
||||
* implementation defined.
|
||||
*/
|
||||
#if !defined(INLINE)
|
||||
#define INLINE __inline__
|
||||
#endif
|
||||
|
||||
static INLINE void
|
||||
clock_init (void)
|
||||
{
|
||||
(*vector[13]) ();
|
||||
}
|
||||
|
||||
static INLINE void
|
||||
gpio_init (void)
|
||||
{
|
||||
(*vector[14]) ();
|
||||
}
|
||||
1
example-led/sys.h
Symbolic link
1
example-led/sys.h
Symbolic link
@@ -0,0 +1 @@
|
||||
../example-fsm-55/sys.h
|
||||
Reference in New Issue
Block a user