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release/0.
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21c3f461c5 |
10
ChangeLog
10
ChangeLog
@@ -1,3 +1,13 @@
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2013-11-08 Niibe Yutaka <gniibe@fsij.org>
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* Version 0.02.
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* doc/chopstx.texi (VERSION): 0.02.
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* example-cdc/usb_stm32f103.c: Updated from NeuG.
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* chopstx.c (CPU_EXCEPTION_PRIORITY_SYSTICK): Equals to
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CPU_EXCEPTION_PRIORITY_INTERRUPT.
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2013-11-03 Niibe Yutaka <gniibe@fsij.org>
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2013-11-03 Niibe Yutaka <gniibe@fsij.org>
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* Version 0.01.
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* Version 0.01.
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12
NEWS
12
NEWS
@@ -1,5 +1,17 @@
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NEWS - Noteworthy changes
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NEWS - Noteworthy changes
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* Major changes in Chopstx 0.02
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Released 2013-11-08, by NIIBE Yutaka
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** Bug fix of priority
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There was a severe bug about the configuraion of priority setting of
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exceptions. As we don't use any inter-lock between interrupts hander
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and timer expiration handler, these priorities should be equal. If
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not, timer expiration handler might interrupt the execution of
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interrupts handers.
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* Major changes in Chopstx 0.01
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* Major changes in Chopstx 0.01
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Released 2013-11-03, by NIIBE Yutaka
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Released 2013-11-03, by NIIBE Yutaka
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4
README
4
README
@@ -1,6 +1,6 @@
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Chopstx - Threads and only Threads
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Chopstx - Threads and only Threads
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Version 0.01
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Version 0.02
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2013-11-03
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2013-11-08
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Niibe Yutaka
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Niibe Yutaka
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Flying Stone Technology
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Flying Stone Technology
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@@ -54,9 +54,8 @@
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* Prio 0x30: svc
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* Prio 0x30: svc
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* ---------------------
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* ---------------------
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* Prio 0x40: thread temporarily inhibiting schedule for critical region
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* Prio 0x40: thread temporarily inhibiting schedule for critical region
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* Prio 0x50: systick
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* ...
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* ...
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* Prio 0xb0: external interrupt
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* Prio 0xb0: systick, external interrupt
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* Prio 0xc0: pendsv
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* Prio 0xc0: pendsv
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*/
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*/
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@@ -65,8 +64,8 @@
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#define CPU_EXCEPTION_PRIORITY_SVC 0x30
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#define CPU_EXCEPTION_PRIORITY_SVC 0x30
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#define CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED 0x40
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#define CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED 0x40
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#define CPU_EXCEPTION_PRIORITY_SYSTICK 0x50
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/* ... */
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/* ... */
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#define CPU_EXCEPTION_PRIORITY_SYSTICK CPU_EXCEPTION_PRIORITY_INTERRUPT
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#define CPU_EXCEPTION_PRIORITY_INTERRUPT 0xb0
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#define CPU_EXCEPTION_PRIORITY_INTERRUPT 0xb0
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#define CPU_EXCEPTION_PRIORITY_PENDSV 0xc0
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#define CPU_EXCEPTION_PRIORITY_PENDSV 0xc0
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@@ -1,7 +1,7 @@
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\input texinfo @c -*-texinfo-*-
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\input texinfo @c -*-texinfo-*-
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@c %**start of header
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@c %**start of header
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@setfilename chopstx.info
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@setfilename chopstx.info
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@set VERSION 0.01
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@set VERSION 0.02
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@settitle Chopstx Reference Manual
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@settitle Chopstx Reference Manual
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@c Unify some of the indices.
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@c Unify some of the indices.
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@syncodeindex tp fn
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@syncodeindex tp fn
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@@ -93,8 +93,8 @@ static struct DATA_INFO *const data_p = &data_info;
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/* Buffer Table address register */
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/* Buffer Table address register */
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#define BTABLE ((volatile uint16_t *)(REG_BASE + 0x50))
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#define BTABLE ((volatile uint16_t *)(REG_BASE + 0x50))
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#define ISTR_CTR (0x8000) /* Correct TRansfer (clear-only bit) */
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#define ISTR_CTR (0x8000) /* Correct TRansfer (read-only bit) */
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#define ISTR_DOVR (0x4000) /* DMA OVeR/underrun (clear-only bit) */
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#define ISTR_OVR (0x4000) /* OVeR/underrun (clear-only bit) */
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#define ISTR_ERR (0x2000) /* ERRor (clear-only bit) */
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#define ISTR_ERR (0x2000) /* ERRor (clear-only bit) */
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#define ISTR_WKUP (0x1000) /* WaKe UP (clear-only bit) */
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#define ISTR_WKUP (0x1000) /* WaKe UP (clear-only bit) */
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#define ISTR_SUSP (0x0800) /* SUSPend (clear-only bit) */
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#define ISTR_SUSP (0x0800) /* SUSPend (clear-only bit) */
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@@ -105,8 +105,7 @@ static struct DATA_INFO *const data_p = &data_info;
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#define ISTR_DIR (0x0010) /* DIRection of transaction (read-only bit) */
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#define ISTR_DIR (0x0010) /* DIRection of transaction (read-only bit) */
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#define ISTR_EP_ID (0x000F) /* EndPoint IDentifier (read-only bit) */
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#define ISTR_EP_ID (0x000F) /* EndPoint IDentifier (read-only bit) */
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#define CLR_CTR (~ISTR_CTR) /* clear Correct TRansfer bit */
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#define CLR_OVR (~ISTR_OVR) /* clear OVeR/underrun bit*/
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#define CLR_DOVR (~ISTR_DOVR) /* clear DMA OVeR/underrun bit*/
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#define CLR_ERR (~ISTR_ERR) /* clear ERRor bit */
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#define CLR_ERR (~ISTR_ERR) /* clear ERRor bit */
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#define CLR_WKUP (~ISTR_WKUP) /* clear WaKe UP bit */
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#define CLR_WKUP (~ISTR_WKUP) /* clear WaKe UP bit */
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#define CLR_SUSP (~ISTR_SUSP) /* clear SUSPend bit */
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#define CLR_SUSP (~ISTR_SUSP) /* clear SUSPend bit */
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@@ -115,7 +114,7 @@ static struct DATA_INFO *const data_p = &data_info;
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#define CLR_ESOF (~ISTR_ESOF) /* clear Expected Start Of Frame bit */
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#define CLR_ESOF (~ISTR_ESOF) /* clear Expected Start Of Frame bit */
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#define CNTR_CTRM (0x8000) /* Correct TRansfer Mask */
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#define CNTR_CTRM (0x8000) /* Correct TRansfer Mask */
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#define CNTR_DOVRM (0x4000) /* DMA OVeR/underrun Mask */
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#define CNTR_OVRM (0x4000) /* OVeR/underrun Mask */
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#define CNTR_ERRM (0x2000) /* ERRor Mask */
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#define CNTR_ERRM (0x2000) /* ERRor Mask */
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#define CNTR_WKUPM (0x1000) /* WaKe UP Mask */
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#define CNTR_WKUPM (0x1000) /* WaKe UP Mask */
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#define CNTR_SUSPM (0x0800) /* SUSPend Mask */
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#define CNTR_SUSPM (0x0800) /* SUSPend Mask */
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@@ -391,19 +390,19 @@ usb_interrupt_handler (void)
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{
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{
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uint16_t istr_value = st103_get_istr ();
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uint16_t istr_value = st103_get_istr ();
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if (istr_value & ISTR_CTR)
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if ((istr_value & ISTR_CTR))
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usb_handle_transfer ();
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usb_handle_transfer ();
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if (istr_value & ISTR_RESET)
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if ((istr_value & ISTR_RESET))
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{
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{
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st103_set_istr (CLR_RESET);
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st103_set_istr (CLR_RESET);
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usb_cb_device_reset ();
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usb_cb_device_reset ();
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}
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}
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if (istr_value & ISTR_DOVR)
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if ((istr_value & ISTR_OVR))
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st103_set_istr (CLR_DOVR);
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st103_set_istr (CLR_OVR);
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if (istr_value & ISTR_ERR)
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if ((istr_value & ISTR_ERR))
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st103_set_istr (CLR_ERR);
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st103_set_istr (CLR_ERR);
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}
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}
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@@ -539,7 +538,7 @@ static int std_get_status (uint8_t req,
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uint8_t endpoint = (index & 0x0f);
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uint8_t endpoint = (index & 0x0f);
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uint16_t status;
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uint16_t status;
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if ((index & 0x70) != 0 || endpoint == ENDP0)
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if ((index & 0x70) || endpoint == ENDP0)
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return USB_UNSUPPORT;
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return USB_UNSUPPORT;
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if ((index & 0x80))
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if ((index & 0x80))
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@@ -938,35 +937,29 @@ usb_handle_transfer (void)
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uint16_t istr_value;
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uint16_t istr_value;
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uint8_t ep_index;
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uint8_t ep_index;
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while (((istr_value = st103_get_istr ()) & ISTR_CTR) != 0)
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while (((istr_value = st103_get_istr ()) & ISTR_CTR))
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{
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{
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ep_index = (istr_value & ISTR_EP_ID);
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ep_index = (istr_value & ISTR_EP_ID);
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/* Decode and service non control endpoints interrupt */
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/* process related endpoint register */
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ep_value = st103_get_epreg (ep_index);
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if (ep_index == 0)
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if (ep_index == 0)
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{
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{
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if ((istr_value & ISTR_DIR) == 0)
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if ((ep_value & EP_CTR_TX))
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{ /* DIR = 0 */
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{
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/* DIR = 0 => IN int */
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st103_ep_clear_ctr_tx (ep_index);
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/* DIR = 0 implies that (EP_CTR_TX = 1) always */
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st103_ep_clear_ctr_tx (ENDP0);
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handle_in0 ();
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handle_in0 ();
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}
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}
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else
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{ /* DIR = 1 */
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/* DIR = 1 & CTR_RX => SETUP or OUT int */
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/* DIR = 1 & (CTR_TX | CTR_RX) => 2 int pending */
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ep_value = st103_get_epreg (ENDP0);
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if ((ep_value & EP_CTR_RX))
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if ((ep_value & EP_SETUP) != 0)
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{
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{
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st103_ep_clear_ctr_rx (ep_index);
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st103_ep_clear_ctr_rx (ENDP0);
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handle_setup0 ();
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if ((ep_value & EP_SETUP))
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}
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handle_setup0 ();
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else if ((ep_value & EP_CTR_RX) != 0)
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else
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{
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handle_out0 ();
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st103_ep_clear_ctr_rx (ENDP0);
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handle_out0 ();
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}
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}
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}
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if (dev_p->state == STALLED)
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if (dev_p->state == STALLED)
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@@ -974,11 +967,7 @@ usb_handle_transfer (void)
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}
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}
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else
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else
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{
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{
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/* Decode and service non control endpoints interrupt */
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if ((ep_value & EP_CTR_RX))
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/* process related endpoint register */
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ep_value = st103_get_epreg (ep_index);
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if ((ep_value & EP_CTR_RX) != 0)
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{
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{
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st103_ep_clear_ctr_rx (ep_index);
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st103_ep_clear_ctr_rx (ep_index);
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switch ((ep_index - 1))
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switch ((ep_index - 1))
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@@ -993,7 +982,7 @@ usb_handle_transfer (void)
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}
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}
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}
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}
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if ((ep_value & EP_CTR_TX) != 0)
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if ((ep_value & EP_CTR_TX))
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{
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{
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st103_ep_clear_ctr_tx (ep_index);
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st103_ep_clear_ctr_tx (ep_index);
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switch ((ep_index - 1))
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switch ((ep_index - 1))
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Reference in New Issue
Block a user