Kaz Kojima add STM32 Primer2 support

ChangeLog

@@ -1,3 +1,7 @@
+2015-06-22  Niibe Yutaka  <gniibe@fsij.org>
+
+	* board/board-stm32-primer2.h: New from Kaz Kojima.
+
 2015-04-20  Niibe Yutaka  <gniibe@fsij.org>
 
 	Merge cortex-m0-support branch.

NEWS

@@ -1,5 +1,14 @@
 NEWS - Noteworthy changes
 
+
+* Major changes in Chopstx 0.06
+
+  Released 2015-??-??
+
+** New board support: STM32 Primer2
+It is contributed by Kaz Kojima.
+
+
 * Major changes in Chopstx 0.05
 
   Released 2015-04-20, by NIIBE Yutaka

board/board-stm32-primer2.h

@@ -0,0 +1,39 @@
+#define FLASH_PAGE_SIZE 2048
+
+#define STM32_PLLXTPRE                  STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE              6
+#define STM32_HSECLK                    12000000
+
+#define GPIO_USB_CLEAR_TO_ENABLE        3
+#define GPIO_LED_CLEAR_TO_EMIT          0
+
+/*
+ * Port D setup.
+ * PD3  - Push pull output 50MHz (USB 1:ON 0:OFF)
+ * ------------------------ Default
+ * PDx  - input with pull-up
+ */
+#define VAL_GPIO_ODR            0xFFFFFFFF
+#define VAL_GPIO_CRL            0x88883888      /*  PD7...PD0 */
+#define VAL_GPIO_CRH            0x88888888      /* PD15...PD8 */
+
+/*
+ * Port E setup.
+ * PE0  - Push pull output   (LED 1:ON 0:OFF)
+ * PE1  - Push pull output   (LED 1:ON 0:OFF)
+ * ------------------------ Default
+ * PCx  - input with pull-up
+ */
+#define VAL_GPIO_LED_ODR            0xFFFFFFFF
+#define VAL_GPIO_LED_CRL            0x88888833      /*  PE7...PE0 */
+#define VAL_GPIO_LED_CRH            0x88888888      /* PE15...PE8 */
+
+#define GPIO_USB_BASE   GPIOD_BASE
+#define GPIO_LED_BASE   GPIOE_BASE
+
+#define RCC_ENR_IOP_EN \
+	(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_IOPEEN)
+#define RCC_RSTR_IOP_RST \
+	(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPDRST | RCC_APB2RSTR_IOPERST)
+
+/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1).  */