diff --git a/ChangeLog b/ChangeLog
index 4b28bcb..af1c551 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,7 +1,21 @@
 2021-02-25  NIIBE Yutaka  <gniibe@fsij.org>
 
-	* chopstx-cortex-m.c [__ARM_ARCH_6M__] (chx_handle_intr): More
-	fix, it's actually different syntax in assembler.
+	* rules.mk (MCFLAGS): Add -masm-syntax-unified.
+
+	* entry-cortex-m.c (entry): Use Thumb-16 instruction in unified
+	asm syntax.  This means that no output change for Cortex-M0,
+	but change for Cortex-M3/M4 (shorter, different semantics).
+
+	* example-fsm-55/reset.c (reset): Likewise.
+
+	* chopstx-cortex-m.c
+	[__ARM_ARCH_6M__] (involuntary_context_switch): Use unified syntax.
+	[__ARM_ARCH_7M__] (involuntary_context_switch): Use Thumb-16
+	instruction.
+	[__ARM_ARCH_6M__] (chx_handle_intr): Use unified syntax.
+	[__ARM_ARCH_7M__] (chx_handle_intr): Use Thumb-16 instruction.
+	[__ARM_ARCH_6M__] (voluntary_context_switch): Use unified syntax.
+	[__ARM_ARCH_7M__] (svc): Use Thumb-16 instruction.
 
 2021-02-19  NIIBE Yutaka  <gniibe@fsij.org>
 
diff --git a/chopstx-cortex-m.c b/chopstx-cortex-m.c
index 36b904d..82a91a9 100644
--- a/chopstx-cortex-m.c
+++ b/chopstx-cortex-m.c
@@ -272,7 +272,7 @@ involuntary_context_switch (struct chx_thread *tp_next)
     {
       /* Save registers onto CHX_THREAD struct.  */
       asm volatile (
-	"add	%0, #20\n\t"
+	"adds	%0, #20\n\t"
 	"stm	%0!, {r4, r5, r6, r7}\n\t"
 	"mov	r2, r8\n\t"
 	"mov	r3, r9\n\t"
@@ -287,7 +287,7 @@ involuntary_context_switch (struct chx_thread *tp_next)
 	   * works.  R7 keeps its value, but having "r7" here prevents
 	   * use of R7 before this asm statement.
 	   */
-	: "r2", "r3", "r4", "r5", "r6", "r7", "memory");
+	: "cc", "r2", "r3", "r4", "r5", "r6", "r7", "memory");
 
       tp_next = chx_running_preempted (tp_next);
     }
@@ -301,7 +301,7 @@ involuntary_context_switch (struct chx_thread *tp_next)
 	/* Update running: chx_set_running */
 	"str	r0, [r1]\n\t"
 	/**/
-	"add	r0, #20\n\t"
+	"adds	r0, #20\n\t"
 	"ldm	r0!, {r4, r5, r6, r7}\n\t"
 #if defined(__ARM_ARCH_6M__)
 	"ldm	r0!, {r1, r2, r3}\n\t"
@@ -319,8 +319,8 @@ involuntary_context_switch (struct chx_thread *tp_next)
 	"ldr	r1, [r0], #4\n\t"
 	"msr	PSP, r1\n\t"
 #endif
-	"mov	r0, #0\n\t"
-	"sub	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
+	"movs	r0, #0\n\t"
+	"subs	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
 	"bx	r0"
 	: /* no output */ : "r" (tp_next) : "memory");
 }
@@ -335,24 +335,14 @@ chx_handle_intr (void)
 
   asm volatile ("mrs	%0, IPSR\n\t"
 		/* Exception # - 16 = interrupt number.  */
-		/*
-		 * Confusingly, ARM_ARCH_6M uses Pre-UAL Thumb syntax,
-		 * while we use UAL syntax for newer.  Note that the
-		 * binary representation of the instruction is exactly
-		 * same, despite the syntax difference.
-		 */
-#if defined(__ARM_ARCH_6M__)
-		"sub	%0, #16\n\t"
-#else
 		"subs	%0, #16\n\t"
-#endif
 		"bpl	0f\n\t"
 		"bl	chx_timer_expired\n\t"
 		"b	1f\n"
 	      "0:\n\t"
 		"bl	chx_recv_irq\n"
 	      "1:"
-		: "=r" (tp_next) : /* no input */ : "memory");
+		: "=r" (tp_next) : /* no input */ : "cc", "memory");
 
   if (tp_next)
     asm volatile (
@@ -360,8 +350,8 @@ chx_handle_intr (void)
 	: /*no input */ : /* no input */ : "memory");
   else
     asm volatile (
-	"mov	r0, #0\n\t"
-	"sub	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
+	"movs	r0, #0\n\t"
+	"subs	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
 	"bx	r0"
 	: /*no input */ : /* no input */ : "memory");
 }
@@ -403,10 +393,10 @@ voluntary_context_switch (struct chx_thread *tp_next)
    */
   asm ("mov	%0, lr\n\t"
        "ldr	r2, =.L_CONTEXT_SWITCH_FINISH\n\t"
-       "mov	r3, #128\n\t"
-       "lsl	r3, #17\n\t"
+       "movs	r3, #128\n\t"
+       "lsls	r3, #17\n\t"
        "push	{%0, r2, r3}\n\t"
-       "mov	%0, #0\n\t"
+       "movs	%0, #0\n\t"
        "mov	r2, %0\n\t"
        "mov	r3, %0\n\t"
        "push	{%0, r2, r3}\n\t"
@@ -415,10 +405,10 @@ voluntary_context_switch (struct chx_thread *tp_next)
        "push	{%0, r3}\n\t"
        : "=r" (tp)
        : /* no input */
-       : "r2", "r3", "memory");
+       : "cc", "r2", "r3", "memory");
 
   /* Save registers onto CHX_THREAD struct.  */
-  asm ("add	r1, #20\n\t"
+  asm ("adds	r1, #20\n\t"
        "stm	r1!, {r4, r5, r6, r7}\n\t"
        "mov	r2, r8\n\t"
        "mov	r3, r9\n\t"
@@ -426,10 +416,10 @@ voluntary_context_switch (struct chx_thread *tp_next)
        "mov	r5, r11\n\t"
        "mov	r6, sp\n\t"
        "stm	r1!, {r2, r3, r4, r5, r6}\n\t"
-       "sub	r1, #56"
+       "subs	r1, #56"
        : /* no output */
        : "r" (tp)
-       : "r2", "r3", "r4", "r5", "r6", "r7", "memory");
+       : "cc", "r2", "r3", "r4", "r5", "r6", "r7", "memory");
 
   asm volatile (/* Now, r0 points to the thread to be switched.  */
 		/* Put it to *running.  */
@@ -450,7 +440,7 @@ voluntary_context_switch (struct chx_thread *tp_next)
 
 		/* Normal context switch */
 	"0:\n\t"
-		"add	r0, #20\n\t"
+		"adds	r0, #20\n\t"
 		"ldm	r0!, {r4, r5, r6, r7}\n\t"
 		"ldm	r0!, {r1, r2, r3}\n\t"
 		"mov	r8, r1\n\t"
@@ -475,12 +465,12 @@ voluntary_context_switch (struct chx_thread *tp_next)
 		  [28 or 32] <-- pc
 		*/
 		"ldr	r0, [sp, #28]\n\t"
-		"lsl	r1, r0, #23\n\t"
+		"lsls	r1, r0, #23\n\t"
 		"bcc	2f\n\t"
 		/**/
 		"ldr	r2, [sp, #24]\n\t"
-		"mov	r1, #1\n\t"
-		"orr	r2, r1\n\t"	/* Ensure Thumb-mode */
+		"movs	r1, #1\n\t"
+		"orrs	r2, r1\n\t"	/* Ensure Thumb-mode */
 		"str	r2, [sp, #32]\n\t"
 		"msr	APSR_nzcvq, r0\n\t"
 		/**/
@@ -493,8 +483,8 @@ voluntary_context_switch (struct chx_thread *tp_next)
 		"pop	{pc}\n"
 	"2:\n\t"
 		"ldr	r2, [sp, #24]\n\t"
-		"mov	r1, #1\n\t"
-		"orr	r2, r1\n\t"	/* Ensure Thumb-mode */
+		"movs	r1, #1\n\t"
+		"orrs	r2, r1\n\t"	/* Ensure Thumb-mode */
 		"str	r2, [sp, #28]\n\t"
 		"msr	APSR_nzcvq, r0\n\t"
 		/**/
@@ -506,11 +496,11 @@ voluntary_context_switch (struct chx_thread *tp_next)
 		"add	sp, #12\n\t"
 		"pop	{pc}\n\t"
 	".L_CONTEXT_SWITCH_FINISH:\n\t"
-		"add	r0, #16\n\t"
+		"adds	r0, #16\n\t"
 		"ldr	r0, [r0]"       /* Get tp->v */
 		: "=r" (result)		/* Return value in R0 */
 		: "0" (tp_next)
-		: "memory");
+		: "cc", "memory");
 #endif
   return result;
 }
@@ -559,7 +549,7 @@ svc (void)
 
   asm ("ldr	r1, =running\n\t"
        "ldr	r1, [r1]\n\t"
-       "add	r1, #20\n\t"
+       "adds	r1, #20\n\t"
        /* Save registers onto CHX_THREAD struct.  */
        "stm	r1!, {r4, r5, r6, r7}\n\t"
        "mov	r2, r8\n\t"
@@ -573,7 +563,7 @@ svc (void)
        "str	r1, [r6]"
        : "=r" (tp_next)
        : /* no input */
-       : "r1", "r2", "r3", "r4", "r5", "r6", "memory");
+       : "cc", "r1", "r2", "r3", "r4", "r5", "r6", "memory");
 
   asm volatile (
 	/* Now, r0 points to the thread to be switched.  */
@@ -583,7 +573,7 @@ svc (void)
 	"str	r0, [r1]\n\t"
 	"cbz	r0, 1f\n\t"
 	/**/
-	"add	r0, #20\n\t"
+	"adds	r0, #20\n\t"
 	"ldm	r0!, {r4, r5, r6, r7}\n\t"
 	"ldr	r8, [r0], #4\n\t"
 	"ldr	r9, [r0], #4\n\t"
@@ -592,27 +582,27 @@ svc (void)
 	"ldr	r1, [r0], #4\n\t"
 	"msr	PSP, r1\n\t"
 	/* Unmask interrupts.  */
-	"mov	r0, #0\n\t"
+	"movs	r0, #0\n\t"
 	"msr	BASEPRI, r0\n\t"
-	"sub	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
+	"subs	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
 	"bx	r0\n"
     "1:\n\t"
 	/* Spawn an IDLE thread.  */
 	"ldr	r0, =__main_stack_end__-32\n\t"
 	"msr	PSP, r0\n\t"
-	"mov	r1, #0\n\t"
-	"mov	r2, #0\n\t"
-	"mov	r3, #0\n\t"
+	"movs	r1, #0\n\t"
+	"movs	r2, #0\n\t"
+	"movs	r3, #0\n\t"
 	"stm	r0!, {r1, r2, r3}\n\t"
 	"stm	r0!, {r1, r2, r3}\n\t"
 	"ldr	r1, =chx_idle\n\t" /* PC = idle */
-	"mov	r2, #0x010\n\t"
-	"lsl	r2, r2, #20\n\t" /* xPSR = T-flag set (Thumb) */
+	"movs	r2, #0x010\n\t"
+	"lsls	r2, r2, #20\n\t" /* xPSR = T-flag set (Thumb) */
 	"stm	r0!, {r1, r2}\n\t"
 	/* Unmask interrupts.  */
-	"mov	r0, #0\n\t"
+	"movs	r0, #0\n\t"
 	"msr	BASEPRI, r0\n"
-	"sub	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
+	"subs	r0, #3\n\t" /* EXC_RETURN to a thread with PSP */
 	"bx	r0"
 	: /* no output */ : "r" (tp_next) : "memory");
 }
diff --git a/entry-cortex-m.c b/entry-cortex-m.c
index e93a639..ac95d99 100644
--- a/entry-cortex-m.c
+++ b/entry-cortex-m.c
@@ -113,7 +113,7 @@ entry (void)
 {
   asm volatile ("bl	clock_init\n\t"
 		/* Clear BSS section.  */
-		"mov	r0, #0\n\t"
+		"movs	r0, #0\n\t"
 		"ldr	r1, =_bss_start\n\t"
 		"ldr	r2, =_bss_end\n"
 	"0:\n\t"
@@ -121,7 +121,7 @@ entry (void)
 		"beq	1f\n\t"
 #if defined(__ARM_ARCH_6M__)
 		"str	r0, [r1]\n\t"
-		"add	r1, #4\n\t"
+		"adds	r1, #4\n\t"
 #else
 		"str	r0, [r1], #4\n\t"
 #endif
@@ -137,8 +137,8 @@ entry (void)
 #if defined(__ARM_ARCH_6M__)
 		"ldr	r0, [r3]\n\t"
 		"str	r0, [r1]\n\t"
-		"add	r3, #4\n\t"
-		"add	r1, #4\n\t"
+		"adds	r3, #4\n\t"
+		"adds	r1, #4\n\t"
 #else
 		"ldr	r0, [r3], #4\n\t"
 		"str	r0, [r1], #4\n\t"
@@ -147,9 +147,9 @@ entry (void)
 	"3:\n\t"
 		/* Switch to PSP.  */
 		"ldr	r0, =__process0_stack_end__\n\t"
-		COMPOSE_STATEMENT ("sub	r0, #", CHOPSTX_THREAD_SIZE, "\n\t")
+		COMPOSE_STATEMENT ("subs	r0, #", CHOPSTX_THREAD_SIZE, "\n\t")
 		"msr	PSP, r0\n\t" /* Process (main routine) stack.  */
-		"mov	r1, #2\n\t"
+		"movs	r1, #2\n\t"
 		"msr	CONTROL, r1\n\t"
 		"isb\n\t"
 		"bl	chx_init\n\t"
@@ -157,7 +157,7 @@ entry (void)
 		"bl	gpio_init\n\t"
 		/* Enable interrupts.  */
 #if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
-		"mov	r0, #0\n\t"
+		"movs	r0, #0\n\t"
 		"msr	BASEPRI, r0\n\t"
 #endif
 		"cpsie	i\n\t"
diff --git a/example-fsm-55/reset.c b/example-fsm-55/reset.c
index dd7ea04..2fb2635 100644
--- a/example-fsm-55/reset.c
+++ b/example-fsm-55/reset.c
@@ -19,10 +19,10 @@ reset (void)
 {
   asm volatile ("cpsid	i\n\t"		/* Mask all interrupts. */
 		"mov	r0, pc\n\t"	/* r0 = PC & ~0x0fff */
-		"mov	r1, #0x10\n\t"
-		"lsl	r1, #8\n\t"
-		"sub	r1, r1, #1\n\t"
-		"bic	r0, r0, r1\n\t"
+		"movs	r1, #0x10\n\t"
+		"lsls	r1, #8\n\t"
+		"subs	r1, #1\n\t"
+		"bics	r0, r0, r1\n\t"
 		"ldr	r2, [r0]\n\t"
 		"msr	MSP, r2\n\t"	/* Main (exception handler) stack. */
 		"b	entry\n\t"
diff --git a/rules.mk b/rules.mk
index b22d320..9579c37 100644
--- a/rules.mk
+++ b/rules.mk
@@ -71,7 +71,7 @@ MCFLAGS   = -march=rv32imac -mabi=ilp32
 LDFLAGS   = $(MCFLAGS) -nodefaultlibs -nostartfiles -lc -T$(LDSCRIPT) \
             -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch
 else
-MCFLAGS   = -mcpu=$(MCU)
+MCFLAGS   = -mcpu=$(MCU) -masm-syntax-unified
 LDFLAGS   = $(MCFLAGS) -nostartfiles -T$(LDSCRIPT) \
             -Wl,-Map=$(BUILDDIR)/$(PROJECT).map,--cref,--no-warn-mismatch,--gc-sections
 endif