fix spurious interrupts, Gnuk pin-cir support
This commit is contained in:
NIIBE Yutaka
18
ChangeLog
18
ChangeLog
@@ -1,3 +1,21 @@
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2013-11-02 Niibe Yutaka <gniibe@fsij.org>
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* example-cdc/sys.c, example-led/sys.c: Update.
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* chopstx.c (CPU_EXCEPTION_PRIORITY_INTERRUPT)
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(CPU_EXCEPTION_PRIORITY_PENDSV): Change the value, so that
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interrupt priority matches USB interrupt priority of old SYS 1.0
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implementation.
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(chx_enable_intr, chx_disable_intr): Clear pending bit at
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chx_enable_intr.
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(chopstx_intr_wait): Call chx_enable_intr only when it's going to
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sleep.
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* entry.c (RCC_APB2RSTR_AFIORST, define RCC_APB2ENR_AFIOEN): New.
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(AFIO, GPIO_OTHER): New.
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(gpio_init): Handle AFIO and GPIO_OTHER.
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* board/board-fst-01.h, board/board-stm8s-discovery.h: Add pin-cir
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usage.
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2013-08-21 Niibe Yutaka <gniibe@fsij.org>
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* Version 0.00.
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4
README
4
README
@@ -1,6 +1,6 @@
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Chopstx - Threads and only Threads
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Version 0.00
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2013-08-21
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Version 0.01
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2013-11-03
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Niibe Yutaka
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Flying Stone Technology
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@@ -1,11 +1,11 @@
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#define FLASH_PAGE_SIZE 1024
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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#define GPIO_USB_SET_TO_ENABLE 10
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#define GPIO_LED_SET_TO_EMIT 8
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#define GPIO_USB_SET_TO_ENABLE 10
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#define GPIO_LED_SET_TO_EMIT 8
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/*
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* Port A setup.
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@@ -22,10 +22,10 @@
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#define VAL_GPIO_CRL 0x88888888 /* PA7...PA0 */
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#define VAL_GPIO_CRH 0x88811383 /* PA15...PA8 */
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#define GPIO_USB_BASE GPIOA_BASE
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#define GPIO_LED_BASE GPIOA_BASE
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#define GPIO_USB_BASE GPIOA_BASE
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#define GPIO_LED_BASE GPIOA_BASE
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#define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPAEN
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#define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPARST
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#define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPAEN
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#define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPARST
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/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
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@@ -1,11 +1,24 @@
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#define FLASH_PAGE_SIZE 1024
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 6
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#define STM32_HSECLK 12000000
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 6
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#define STM32_HSECLK 12000000
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#define GPIO_USB_SET_TO_ENABLE 10
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#define GPIO_LED_SET_TO_EMIT 0
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#define GPIO_USB_SET_TO_ENABLE 10
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#define GPIO_LED_SET_TO_EMIT 0
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/* For pin-cir settings of Gnuk */
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#define TIMx TIM2
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#define INTR_REQ_TIM TIM2_IRQ
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#define AFIO_EXTICR_INDEX 0
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#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR1_EXTI2_PA
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#define EXTI_PR EXTI_PR_PR2
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#define EXTI_IMR EXTI_IMR_MR2
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#define EXTI_FTSR_TR EXTI_FTSR_TR2
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#define INTR_REQ_EXTI EXTI2_IRQ
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#define ENABLE_RCC_APB1
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#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM2EN
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#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM2RST
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/*
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* Port A setup.
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@@ -42,11 +55,11 @@
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#define VAL_GPIO_LED_CRL 0x88888883 /* PA7...PA0 */
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#define VAL_GPIO_LED_CRH 0x88888888 /* PA15...PA8 */
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#define GPIO_USB_BASE GPIOA_BASE
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#define GPIO_LED_BASE GPIOB_BASE
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#define GPIO_USB_BASE GPIOA_BASE
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#define GPIO_LED_BASE GPIOB_BASE
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#define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
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#define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
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#define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
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#define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
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/* NeuG settings for ADC2. */
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#define NEUG_ADC_SETTING2_SMPR1 0
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@@ -1,11 +1,11 @@
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#define FLASH_PAGE_SIZE 1024
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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#define GPIO_USB_CLEAR_TO_ENABLE 11
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#define GPIO_LED_CLEAR_TO_EMIT 12
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#define GPIO_USB_CLEAR_TO_ENABLE 11
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#define GPIO_LED_CLEAR_TO_EMIT 12
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/*
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* Port C setup.
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@@ -22,11 +22,11 @@
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#define VAL_GPIO_CRL 0x44888888 /* PC7...PC0 */
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#define VAL_GPIO_CRH 0x88837888 /* PC15...PC8 */
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#define GPIO_USB_BASE GPIOC_BASE
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#define GPIO_LED_BASE GPIOC_BASE
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#define GPIO_USB_BASE GPIOC_BASE
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#define GPIO_LED_BASE GPIOC_BASE
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#define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPCEN
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#define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPCRST
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#define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPCEN
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#define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPCRST
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/* NeuG settings for ADC2. */
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#define NEUG_ADC_SETTING2_SMPR1 ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) \
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@@ -1,11 +1,26 @@
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#define FLASH_PAGE_SIZE 1024
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
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#define STM32_PLLMUL_VALUE 9
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#define STM32_HSECLK 8000000
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#undef GPIO_USB_CLEAR_TO_ENABLE
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#define GPIO_LED_SET_TO_EMIT 8
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#define GPIO_LED_SET_TO_EMIT 8
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/* For pin-cir settings of Gnuk */
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#define TIMx TIM3
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#define INTR_REQ_TIM TIM3_IRQ
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#define AFIO_EXTICR_INDEX 1
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#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR2_EXTI5_PB
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#define EXTI_PR EXTI_PR_PR5
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#define EXTI_IMR EXTI_IMR_MR5
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#define EXTI_FTSR_TR EXTI_FTSR_TR5
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#define INTR_REQ_EXTI EXTI9_5_IRQ
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#define ENABLE_RCC_APB1
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#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM3EN
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#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM3RST
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#define AFIO_MAPR_SOMETHING AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
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/* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
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/*
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* Port A setup.
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@@ -21,10 +36,24 @@
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#define VAL_GPIO_CRL 0x88888888 /* PA7...PA0 */
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#define VAL_GPIO_CRH 0x88811881 /* PA15...PA8 */
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#define GPIO_USB_BASE GPIOA_BASE
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#define GPIO_LED_BASE GPIOA_BASE
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#define GPIO_USB_BASE GPIOA_BASE
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#define GPIO_LED_BASE GPIOA_BASE
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#define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN)
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#define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST)
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#define RCC_APB2ENR_IOP_EN \
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(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_AFIOEN)
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#define RCC_APB2RSTR_IOP_RST \
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(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | RCC_APB2RSTR_AFIORST)
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/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
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#define GPIO_OTHER_BASE GPIOB_BASE
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/*
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* Port B setup.
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* PB4 - (TIM3_CH1) input with pull-up
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* PB5 - (TIM3_CH2) input with pull-up, connected to CIR module
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* Everything input with pull-up except:
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* PB0 - (TIM3_CH3) input with pull-down
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*/
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#define VAL_GPIO_OTHER_ODR 0xFFFFFFFE
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#define VAL_GPIO_OTHER_CRL 0x88888888 /* PB7...PB0 */
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#define VAL_GPIO_OTHER_CRH 0x88888888 /* PB15...PB8 */
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25
chopstx.c
25
chopstx.c
@@ -55,8 +55,9 @@
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* ---------------------
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* Prio 0x40: thread temporarily inhibiting schedule for critical region
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* Prio 0x50: systick
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* Prio 0x60: external interrupt
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* Prio 0x70: pendsv
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* ...
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* Prio 0xb0: external interrupt
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* Prio 0xc0: pendsv
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*/
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#define CPU_EXCEPTION_PRIORITY_CLEAR 0
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@@ -65,8 +66,9 @@
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#define CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED 0x40
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#define CPU_EXCEPTION_PRIORITY_SYSTICK 0x50
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#define CPU_EXCEPTION_PRIORITY_INTERRUPT 0x60
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#define CPU_EXCEPTION_PRIORITY_PENDSV 0x70
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/* ... */
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#define CPU_EXCEPTION_PRIORITY_INTERRUPT 0xb0
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#define CPU_EXCEPTION_PRIORITY_PENDSV 0xc0
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/**
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* chx_fatal - Fatal error point.
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@@ -168,11 +170,11 @@ struct NVIC {
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uint32_t IPR[60];
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};
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static struct NVIC *const NVICBase = (struct NVIC *const)0xE000E100;
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#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
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#define NVIC_ICER(n) (NVICBase->ICER[n >> 5])
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#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
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#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
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static struct NVIC *const NVIC = (struct NVIC *const)0xE000E100;
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#define NVIC_ISER(n) (NVIC->ISER[n >> 5])
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#define NVIC_ICER(n) (NVIC->ICER[n >> 5])
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#define NVIC_ICPR(n) (NVIC->ICPR[n >> 5])
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#define NVIC_IPR(n) (NVIC->IPR[n >> 2])
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#define USB_LP_CAN1_RX0_IRQn 20
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@@ -640,6 +642,7 @@ chx_timer_expired (void)
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static void
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chx_enable_intr (uint8_t irq_num)
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{
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NVIC_ICPR (irq_num) = 1 << (irq_num & 0x1f); /* Clear pending. */
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NVIC_ISER (irq_num) = 1 << (irq_num & 0x1f);
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}
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@@ -647,8 +650,6 @@ static void
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chx_disable_intr (uint8_t irq_num)
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{
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NVIC_ICER (irq_num) = 1 << (irq_num & 0x1f);
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/* Clear pending, too. */
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NVIC_ICPR (irq_num) = 1 << (irq_num & 0x1f);
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}
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@@ -1244,9 +1245,9 @@ void
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chopstx_intr_wait (chopstx_intr_t *intr)
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{
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chx_cpu_sched_lock ();
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chx_enable_intr (intr->irq_num);
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if (intr->ready == 0)
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{
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chx_enable_intr (intr->irq_num);
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if (running->flag_sched_rr)
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chx_timer_dequeue (running);
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running->state = THREAD_WAIT_INT;
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39
entry.c
39
entry.c
@@ -163,15 +163,33 @@ clock_init (void)
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;
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}
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#define RCC_APB2ENR_IOPAEN 0x00000004
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#define RCC_APB2RSTR_AFIORST 0x00000001
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#define RCC_APB2RSTR_IOPARST 0x00000004
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#define RCC_APB2ENR_IOPBEN 0x00000008
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#define RCC_APB2RSTR_IOPBRST 0x00000008
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#define RCC_APB2ENR_IOPCEN 0x00000010
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#define RCC_APB2RSTR_IOPCRST 0x00000010
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#define RCC_APB2ENR_IOPDEN 0x00000020
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#define RCC_APB2RSTR_IOPDRST 0x00000020
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#define RCC_APB2ENR_AFIOEN 0x00000001
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#define RCC_APB2ENR_IOPAEN 0x00000004
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#define RCC_APB2ENR_IOPBEN 0x00000008
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#define RCC_APB2ENR_IOPCEN 0x00000010
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#define RCC_APB2ENR_IOPDEN 0x00000020
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struct AFIO
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{
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volatile uint32_t EVCR;
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volatile uint32_t MAPR;
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volatile uint32_t EXTICR[4];
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uint32_t RESERVED0;
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volatile uint32_t MAPR2;
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};
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#define AFIO_BASE 0x40010000
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static struct AFIO *const AFIO = (struct AFIO *const)AFIO_BASE;
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#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
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struct GPIO {
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volatile uint32_t CRL;
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@@ -196,6 +214,9 @@ struct GPIO {
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static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
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static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
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#ifdef GPIO_OTHER_BASE
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static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
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#endif
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static void __attribute__((used))
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gpio_init (void)
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@@ -205,6 +226,10 @@ gpio_init (void)
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RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST;
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RCC->APB2RSTR = 0;
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#ifdef AFIO_MAPR_SOMETHING
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AFIO->MAPR |= AFIO_MAPR_SOMETHING;
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#endif
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GPIO_USB->ODR = VAL_GPIO_ODR;
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GPIO_USB->CRH = VAL_GPIO_CRH;
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GPIO_USB->CRL = VAL_GPIO_CRL;
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@@ -214,6 +239,12 @@ gpio_init (void)
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GPIO_LED->CRH = VAL_GPIO_LED_CRH;
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GPIO_LED->CRL = VAL_GPIO_LED_CRL;
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#endif
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#ifdef GPIO_OTHER_BASE
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GPIO_OTHER->ODR = VAL_GPIO_OTHER_ODR;
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GPIO_OTHER->CRH = VAL_GPIO_OTHER_CRH;
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GPIO_OTHER->CRL = VAL_GPIO_OTHER_CRL;
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#endif
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}
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#endif
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@@ -181,15 +181,33 @@ clock_init (void)
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;
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}
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#define RCC_APB2ENR_IOPAEN 0x00000004
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#define RCC_APB2RSTR_AFIORST 0x00000001
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#define RCC_APB2RSTR_IOPARST 0x00000004
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#define RCC_APB2ENR_IOPBEN 0x00000008
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#define RCC_APB2RSTR_IOPBRST 0x00000008
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#define RCC_APB2ENR_IOPCEN 0x00000010
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#define RCC_APB2RSTR_IOPCRST 0x00000010
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#define RCC_APB2ENR_IOPDEN 0x00000020
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#define RCC_APB2RSTR_IOPDRST 0x00000020
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#define RCC_APB2ENR_AFIOEN 0x00000001
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#define RCC_APB2ENR_IOPAEN 0x00000004
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#define RCC_APB2ENR_IOPBEN 0x00000008
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#define RCC_APB2ENR_IOPCEN 0x00000010
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#define RCC_APB2ENR_IOPDEN 0x00000020
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struct AFIO
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{
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volatile uint32_t EVCR;
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volatile uint32_t MAPR;
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volatile uint32_t EXTICR[4];
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uint32_t RESERVED0;
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volatile uint32_t MAPR2;
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};
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#define AFIO_BASE 0x40010000
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static struct AFIO *const AFIO = (struct AFIO *const)AFIO_BASE;
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#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
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struct GPIO {
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volatile uint32_t CRL;
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@@ -214,6 +232,9 @@ struct GPIO {
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static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
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static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
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#ifdef GPIO_OTHER_BASE
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static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
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#endif
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static void
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gpio_init (void)
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@@ -223,6 +244,10 @@ gpio_init (void)
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RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST;
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RCC->APB2RSTR = 0;
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#ifdef AFIO_MAPR_SOMETHING
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AFIO->MAPR |= AFIO_MAPR_SOMETHING;
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#endif
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|
||||
GPIO_USB->ODR = VAL_GPIO_ODR;
|
||||
GPIO_USB->CRH = VAL_GPIO_CRH;
|
||||
GPIO_USB->CRL = VAL_GPIO_CRL;
|
||||
@@ -232,6 +257,12 @@ gpio_init (void)
|
||||
GPIO_LED->CRH = VAL_GPIO_LED_CRH;
|
||||
GPIO_LED->CRL = VAL_GPIO_LED_CRL;
|
||||
#endif
|
||||
|
||||
#ifdef GPIO_OTHER_BASE
|
||||
GPIO_OTHER->ODR = VAL_GPIO_OTHER_ODR;
|
||||
GPIO_OTHER->CRH = VAL_GPIO_OTHER_CRH;
|
||||
GPIO_OTHER->CRL = VAL_GPIO_OTHER_CRL;
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -276,8 +307,6 @@ static void wait (int count)
|
||||
asm volatile ("" : : "r" (i) : "memory");
|
||||
}
|
||||
|
||||
#define USB_IRQ 20
|
||||
#define USB_IRQ_PRIORITY ((11) << 4)
|
||||
|
||||
static void
|
||||
usb_lld_sys_shutdown (void)
|
||||
|
||||
@@ -181,15 +181,33 @@ clock_init (void)
|
||||
;
|
||||
}
|
||||
|
||||
#define RCC_APB2ENR_IOPAEN 0x00000004
|
||||
#define RCC_APB2RSTR_AFIORST 0x00000001
|
||||
#define RCC_APB2RSTR_IOPARST 0x00000004
|
||||
#define RCC_APB2ENR_IOPBEN 0x00000008
|
||||
#define RCC_APB2RSTR_IOPBRST 0x00000008
|
||||
#define RCC_APB2ENR_IOPCEN 0x00000010
|
||||
#define RCC_APB2RSTR_IOPCRST 0x00000010
|
||||
#define RCC_APB2ENR_IOPDEN 0x00000020
|
||||
#define RCC_APB2RSTR_IOPDRST 0x00000020
|
||||
|
||||
#define RCC_APB2ENR_AFIOEN 0x00000001
|
||||
#define RCC_APB2ENR_IOPAEN 0x00000004
|
||||
#define RCC_APB2ENR_IOPBEN 0x00000008
|
||||
#define RCC_APB2ENR_IOPCEN 0x00000010
|
||||
#define RCC_APB2ENR_IOPDEN 0x00000020
|
||||
|
||||
|
||||
struct AFIO
|
||||
{
|
||||
volatile uint32_t EVCR;
|
||||
volatile uint32_t MAPR;
|
||||
volatile uint32_t EXTICR[4];
|
||||
uint32_t RESERVED0;
|
||||
volatile uint32_t MAPR2;
|
||||
};
|
||||
|
||||
#define AFIO_BASE 0x40010000
|
||||
static struct AFIO *const AFIO = (struct AFIO *const)AFIO_BASE;
|
||||
|
||||
#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
|
||||
|
||||
|
||||
struct GPIO {
|
||||
volatile uint32_t CRL;
|
||||
@@ -214,6 +232,9 @@ struct GPIO {
|
||||
|
||||
static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
|
||||
static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
|
||||
#ifdef GPIO_OTHER_BASE
|
||||
static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
|
||||
#endif
|
||||
|
||||
static void
|
||||
gpio_init (void)
|
||||
@@ -223,6 +244,10 @@ gpio_init (void)
|
||||
RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST;
|
||||
RCC->APB2RSTR = 0;
|
||||
|
||||
#ifdef AFIO_MAPR_SOMETHING
|
||||
AFIO->MAPR |= AFIO_MAPR_SOMETHING;
|
||||
#endif
|
||||
|
||||
GPIO_USB->ODR = VAL_GPIO_ODR;
|
||||
GPIO_USB->CRH = VAL_GPIO_CRH;
|
||||
GPIO_USB->CRL = VAL_GPIO_CRL;
|
||||
@@ -232,6 +257,12 @@ gpio_init (void)
|
||||
GPIO_LED->CRH = VAL_GPIO_LED_CRH;
|
||||
GPIO_LED->CRL = VAL_GPIO_LED_CRL;
|
||||
#endif
|
||||
|
||||
#ifdef GPIO_OTHER_BASE
|
||||
GPIO_OTHER->ODR = VAL_GPIO_OTHER_ODR;
|
||||
GPIO_OTHER->CRH = VAL_GPIO_OTHER_CRH;
|
||||
GPIO_OTHER->CRL = VAL_GPIO_OTHER_CRL;
|
||||
#endif
|
||||
}
|
||||
|
||||
static void
|
||||
@@ -276,8 +307,6 @@ static void wait (int count)
|
||||
asm volatile ("" : : "r" (i) : "memory");
|
||||
}
|
||||
|
||||
#define USB_IRQ 20
|
||||
#define USB_IRQ_PRIORITY ((11) << 4)
|
||||
|
||||
static void
|
||||
usb_lld_sys_shutdown (void)
|
||||
|
||||
Reference in New Issue
Block a user