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fix spurious interrupts, Gnuk pin-cir support

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This commit is contained in:
NIIBE Yutaka
2013-11-02 14:23:44 +09:00
parent 5f14824977
commit 9fe6cefdc0
10 changed files with 215 additions and 65 deletions
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18
ChangeLog
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@@ -1,3 +1,21 @@
2013-11-02 Niibe Yutaka <gniibe@fsij.org>
* example-cdc/sys.c, example-led/sys.c: Update.
* chopstx.c (CPU_EXCEPTION_PRIORITY_INTERRUPT)
(CPU_EXCEPTION_PRIORITY_PENDSV): Change the value, so that
interrupt priority matches USB interrupt priority of old SYS 1.0
implementation.
(chx_enable_intr, chx_disable_intr): Clear pending bit at
chx_enable_intr.
(chopstx_intr_wait): Call chx_enable_intr only when it's going to
sleep.
* entry.c (RCC_APB2RSTR_AFIORST, define RCC_APB2ENR_AFIOEN): New.
(AFIO, GPIO_OTHER): New.
(gpio_init): Handle AFIO and GPIO_OTHER.
* board/board-fst-01.h, board/board-stm8s-discovery.h: Add pin-cir
usage.
2013-08-21 Niibe Yutaka <gniibe@fsij.org> 2013-08-21 Niibe Yutaka <gniibe@fsij.org>
* Version 0.00. * Version 0.00.

4
README
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@@ -1,6 +1,6 @@
Chopstx - Threads and only Threads Chopstx - Threads and only Threads
Version 0.00 Version 0.01
2013-08-21 2013-11-03
Niibe Yutaka Niibe Yutaka
Flying Stone Technology Flying Stone Technology

18
board/board-fst-01-00.h
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@@ -1,11 +1,11 @@
#define FLASH_PAGE_SIZE 1024 #define FLASH_PAGE_SIZE 1024
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9 #define STM32_PLLMUL_VALUE 9
#define STM32_HSECLK 8000000 #define STM32_HSECLK 8000000
#define GPIO_USB_SET_TO_ENABLE 10 #define GPIO_USB_SET_TO_ENABLE 10
#define GPIO_LED_SET_TO_EMIT 8 #define GPIO_LED_SET_TO_EMIT 8
/* /*
* Port A setup. * Port A setup.
@@ -22,10 +22,10 @@
#define VAL_GPIO_CRL 0x88888888 /* PA7...PA0 */ #define VAL_GPIO_CRL 0x88888888 /* PA7...PA0 */
#define VAL_GPIO_CRH 0x88811383 /* PA15...PA8 */ #define VAL_GPIO_CRH 0x88811383 /* PA15...PA8 */
#define GPIO_USB_BASE GPIOA_BASE #define GPIO_USB_BASE GPIOA_BASE
#define GPIO_LED_BASE GPIOA_BASE #define GPIO_LED_BASE GPIOA_BASE
#define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPAEN #define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPAEN
#define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPARST #define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPARST
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */ /* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */

31
board/board-fst-01.h
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@@ -1,11 +1,24 @@
#define FLASH_PAGE_SIZE 1024 #define FLASH_PAGE_SIZE 1024
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 6 #define STM32_PLLMUL_VALUE 6
#define STM32_HSECLK 12000000 #define STM32_HSECLK 12000000
#define GPIO_USB_SET_TO_ENABLE 10 #define GPIO_USB_SET_TO_ENABLE 10
#define GPIO_LED_SET_TO_EMIT 0 #define GPIO_LED_SET_TO_EMIT 0
/* For pin-cir settings of Gnuk */
#define TIMx TIM2
#define INTR_REQ_TIM TIM2_IRQ
#define AFIO_EXTICR_INDEX 0
#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR1_EXTI2_PA
#define EXTI_PR EXTI_PR_PR2
#define EXTI_IMR EXTI_IMR_MR2
#define EXTI_FTSR_TR EXTI_FTSR_TR2
#define INTR_REQ_EXTI EXTI2_IRQ
#define ENABLE_RCC_APB1
#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM2EN
#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM2RST
/* /*
* Port A setup. * Port A setup.
@@ -42,11 +55,11 @@
#define VAL_GPIO_LED_CRL 0x88888883 /* PA7...PA0 */ #define VAL_GPIO_LED_CRL 0x88888883 /* PA7...PA0 */
#define VAL_GPIO_LED_CRH 0x88888888 /* PA15...PA8 */ #define VAL_GPIO_LED_CRH 0x88888888 /* PA15...PA8 */
#define GPIO_USB_BASE GPIOA_BASE #define GPIO_USB_BASE GPIOA_BASE
#define GPIO_LED_BASE GPIOB_BASE #define GPIO_LED_BASE GPIOB_BASE
#define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN) #define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
#define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST) #define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
/* NeuG settings for ADC2. */ /* NeuG settings for ADC2. */
#define NEUG_ADC_SETTING2_SMPR1 0 #define NEUG_ADC_SETTING2_SMPR1 0

18
board/board-olimex-stm32-h103.h
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@@ -1,11 +1,11 @@
#define FLASH_PAGE_SIZE 1024 #define FLASH_PAGE_SIZE 1024
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9 #define STM32_PLLMUL_VALUE 9
#define STM32_HSECLK 8000000 #define STM32_HSECLK 8000000
#define GPIO_USB_CLEAR_TO_ENABLE 11 #define GPIO_USB_CLEAR_TO_ENABLE 11
#define GPIO_LED_CLEAR_TO_EMIT 12 #define GPIO_LED_CLEAR_TO_EMIT 12
/* /*
* Port C setup. * Port C setup.
@@ -22,11 +22,11 @@
#define VAL_GPIO_CRL 0x44888888 /* PC7...PC0 */ #define VAL_GPIO_CRL 0x44888888 /* PC7...PC0 */
#define VAL_GPIO_CRH 0x88837888 /* PC15...PC8 */ #define VAL_GPIO_CRH 0x88837888 /* PC15...PC8 */
#define GPIO_USB_BASE GPIOC_BASE #define GPIO_USB_BASE GPIOC_BASE
#define GPIO_LED_BASE GPIOC_BASE #define GPIO_LED_BASE GPIOC_BASE
#define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPCEN #define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPCEN
#define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPCRST #define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPCRST
/* NeuG settings for ADC2. */ /* NeuG settings for ADC2. */
#define NEUG_ADC_SETTING2_SMPR1 ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) \ #define NEUG_ADC_SETTING2_SMPR1 ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) \

45
board/board-stm8s-discovery.h
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@@ -1,11 +1,26 @@
#define FLASH_PAGE_SIZE 1024 #define FLASH_PAGE_SIZE 1024
#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1 #define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
#define STM32_PLLMUL_VALUE 9 #define STM32_PLLMUL_VALUE 9
#define STM32_HSECLK 8000000 #define STM32_HSECLK 8000000
#undef GPIO_USB_CLEAR_TO_ENABLE #undef GPIO_USB_CLEAR_TO_ENABLE
#define GPIO_LED_SET_TO_EMIT 8 #define GPIO_LED_SET_TO_EMIT 8
/* For pin-cir settings of Gnuk */
#define TIMx TIM3
#define INTR_REQ_TIM TIM3_IRQ
#define AFIO_EXTICR_INDEX 1
#define AFIO_EXTICR1_EXTIx_Py AFIO_EXTICR2_EXTI5_PB
#define EXTI_PR EXTI_PR_PR5
#define EXTI_IMR EXTI_IMR_MR5
#define EXTI_FTSR_TR EXTI_FTSR_TR5
#define INTR_REQ_EXTI EXTI9_5_IRQ
#define ENABLE_RCC_APB1
#define RCC_APBnENR_TIMxEN RCC_APB1ENR_TIM3EN
#define RCC_APBnRSTR_TIMxRST RCC_APB1RSTR_TIM3RST
#define AFIO_MAPR_SOMETHING AFIO_MAPR_TIM3_REMAP_PARTIALREMAP
/* Remap (PB4, PB5) -> (TIM3_CH1, TIM3_CH2) */
/* /*
* Port A setup. * Port A setup.
@@ -21,10 +36,24 @@
#define VAL_GPIO_CRL 0x88888888 /* PA7...PA0 */ #define VAL_GPIO_CRL 0x88888888 /* PA7...PA0 */
#define VAL_GPIO_CRH 0x88811881 /* PA15...PA8 */ #define VAL_GPIO_CRH 0x88811881 /* PA15...PA8 */
#define GPIO_USB_BASE GPIOA_BASE #define GPIO_USB_BASE GPIOA_BASE
#define GPIO_LED_BASE GPIOA_BASE #define GPIO_LED_BASE GPIOA_BASE
#define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN) #define RCC_APB2ENR_IOP_EN \
#define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST) (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_AFIOEN)
#define RCC_APB2RSTR_IOP_RST \
(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | RCC_APB2RSTR_AFIORST)
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */ /* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
#define GPIO_OTHER_BASE GPIOB_BASE
/*
* Port B setup.
* PB4 - (TIM3_CH1) input with pull-up
* PB5 - (TIM3_CH2) input with pull-up, connected to CIR module
* Everything input with pull-up except:
* PB0 - (TIM3_CH3) input with pull-down
*/
#define VAL_GPIO_OTHER_ODR 0xFFFFFFFE
#define VAL_GPIO_OTHER_CRL 0x88888888 /* PB7...PB0 */
#define VAL_GPIO_OTHER_CRH 0x88888888 /* PB15...PB8 */

25
chopstx.c
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@@ -55,8 +55,9 @@
* --------------------- * ---------------------
* Prio 0x40: thread temporarily inhibiting schedule for critical region * Prio 0x40: thread temporarily inhibiting schedule for critical region
* Prio 0x50: systick * Prio 0x50: systick
* Prio 0x60: external interrupt * ...
* Prio 0x70: pendsv * Prio 0xb0: external interrupt
* Prio 0xc0: pendsv
*/ */
#define CPU_EXCEPTION_PRIORITY_CLEAR 0 #define CPU_EXCEPTION_PRIORITY_CLEAR 0
@@ -65,8 +66,9 @@
#define CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED 0x40 #define CPU_EXCEPTION_PRIORITY_INHIBIT_SCHED 0x40
#define CPU_EXCEPTION_PRIORITY_SYSTICK 0x50 #define CPU_EXCEPTION_PRIORITY_SYSTICK 0x50
#define CPU_EXCEPTION_PRIORITY_INTERRUPT 0x60 /* ... */
#define CPU_EXCEPTION_PRIORITY_PENDSV 0x70 #define CPU_EXCEPTION_PRIORITY_INTERRUPT 0xb0
#define CPU_EXCEPTION_PRIORITY_PENDSV 0xc0
/** /**
* chx_fatal - Fatal error point. * chx_fatal - Fatal error point.
@@ -168,11 +170,11 @@ struct NVIC {
uint32_t IPR[60]; uint32_t IPR[60];
}; };
static struct NVIC *const NVICBase = (struct NVIC *const)0xE000E100; static struct NVIC *const NVIC = (struct NVIC *const)0xE000E100;
#define NVIC_ISER(n) (NVICBase->ISER[n >> 5]) #define NVIC_ISER(n) (NVIC->ISER[n >> 5])
#define NVIC_ICER(n) (NVICBase->ICER[n >> 5]) #define NVIC_ICER(n) (NVIC->ICER[n >> 5])
#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5]) #define NVIC_ICPR(n) (NVIC->ICPR[n >> 5])
#define NVIC_IPR(n) (NVICBase->IPR[n >> 2]) #define NVIC_IPR(n) (NVIC->IPR[n >> 2])
#define USB_LP_CAN1_RX0_IRQn 20 #define USB_LP_CAN1_RX0_IRQn 20
@@ -640,6 +642,7 @@ chx_timer_expired (void)
static void static void
chx_enable_intr (uint8_t irq_num) chx_enable_intr (uint8_t irq_num)
{ {
NVIC_ICPR (irq_num) = 1 << (irq_num & 0x1f); /* Clear pending. */
NVIC_ISER (irq_num) = 1 << (irq_num & 0x1f); NVIC_ISER (irq_num) = 1 << (irq_num & 0x1f);
} }
@@ -647,8 +650,6 @@ static void
chx_disable_intr (uint8_t irq_num) chx_disable_intr (uint8_t irq_num)
{ {
NVIC_ICER (irq_num) = 1 << (irq_num & 0x1f); NVIC_ICER (irq_num) = 1 << (irq_num & 0x1f);
/* Clear pending, too. */
NVIC_ICPR (irq_num) = 1 << (irq_num & 0x1f);
} }
@@ -1244,9 +1245,9 @@ void
chopstx_intr_wait (chopstx_intr_t *intr) chopstx_intr_wait (chopstx_intr_t *intr)
{ {
chx_cpu_sched_lock (); chx_cpu_sched_lock ();
chx_enable_intr (intr->irq_num);
if (intr->ready == 0) if (intr->ready == 0)
{ {
chx_enable_intr (intr->irq_num);
if (running->flag_sched_rr) if (running->flag_sched_rr)
chx_timer_dequeue (running); chx_timer_dequeue (running);
running->state = THREAD_WAIT_INT; running->state = THREAD_WAIT_INT;

39
entry.c
View File

@@ -163,15 +163,33 @@ clock_init (void)
; ;
} }
#define RCC_APB2ENR_IOPAEN 0x00000004 #define RCC_APB2RSTR_AFIORST 0x00000001
#define RCC_APB2RSTR_IOPARST 0x00000004 #define RCC_APB2RSTR_IOPARST 0x00000004
#define RCC_APB2ENR_IOPBEN 0x00000008
#define RCC_APB2RSTR_IOPBRST 0x00000008 #define RCC_APB2RSTR_IOPBRST 0x00000008
#define RCC_APB2ENR_IOPCEN 0x00000010
#define RCC_APB2RSTR_IOPCRST 0x00000010 #define RCC_APB2RSTR_IOPCRST 0x00000010
#define RCC_APB2ENR_IOPDEN 0x00000020
#define RCC_APB2RSTR_IOPDRST 0x00000020 #define RCC_APB2RSTR_IOPDRST 0x00000020
#define RCC_APB2ENR_AFIOEN 0x00000001
#define RCC_APB2ENR_IOPAEN 0x00000004
#define RCC_APB2ENR_IOPBEN 0x00000008
#define RCC_APB2ENR_IOPCEN 0x00000010
#define RCC_APB2ENR_IOPDEN 0x00000020
struct AFIO
{
volatile uint32_t EVCR;
volatile uint32_t MAPR;
volatile uint32_t EXTICR[4];
uint32_t RESERVED0;
volatile uint32_t MAPR2;
};
#define AFIO_BASE 0x40010000
static struct AFIO *const AFIO = (struct AFIO *const)AFIO_BASE;
#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
struct GPIO { struct GPIO {
volatile uint32_t CRL; volatile uint32_t CRL;
@@ -196,6 +214,9 @@ struct GPIO {
static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE); static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE); static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
#ifdef GPIO_OTHER_BASE
static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
#endif
static void __attribute__((used)) static void __attribute__((used))
gpio_init (void) gpio_init (void)
@@ -205,6 +226,10 @@ gpio_init (void)
RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST; RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST;
RCC->APB2RSTR = 0; RCC->APB2RSTR = 0;
#ifdef AFIO_MAPR_SOMETHING
AFIO->MAPR |= AFIO_MAPR_SOMETHING;
#endif
GPIO_USB->ODR = VAL_GPIO_ODR; GPIO_USB->ODR = VAL_GPIO_ODR;
GPIO_USB->CRH = VAL_GPIO_CRH; GPIO_USB->CRH = VAL_GPIO_CRH;
GPIO_USB->CRL = VAL_GPIO_CRL; GPIO_USB->CRL = VAL_GPIO_CRL;
@@ -214,6 +239,12 @@ gpio_init (void)
GPIO_LED->CRH = VAL_GPIO_LED_CRH; GPIO_LED->CRH = VAL_GPIO_LED_CRH;
GPIO_LED->CRL = VAL_GPIO_LED_CRL; GPIO_LED->CRL = VAL_GPIO_LED_CRL;
#endif #endif
#ifdef GPIO_OTHER_BASE
GPIO_OTHER->ODR = VAL_GPIO_OTHER_ODR;
GPIO_OTHER->CRH = VAL_GPIO_OTHER_CRH;
GPIO_OTHER->CRL = VAL_GPIO_OTHER_CRL;
#endif
} }
#endif #endif

41
example-cdc/sys.c
View File

@@ -181,15 +181,33 @@ clock_init (void)
; ;
} }
#define RCC_APB2ENR_IOPAEN 0x00000004 #define RCC_APB2RSTR_AFIORST 0x00000001
#define RCC_APB2RSTR_IOPARST 0x00000004 #define RCC_APB2RSTR_IOPARST 0x00000004
#define RCC_APB2ENR_IOPBEN 0x00000008
#define RCC_APB2RSTR_IOPBRST 0x00000008 #define RCC_APB2RSTR_IOPBRST 0x00000008
#define RCC_APB2ENR_IOPCEN 0x00000010
#define RCC_APB2RSTR_IOPCRST 0x00000010 #define RCC_APB2RSTR_IOPCRST 0x00000010
#define RCC_APB2ENR_IOPDEN 0x00000020
#define RCC_APB2RSTR_IOPDRST 0x00000020 #define RCC_APB2RSTR_IOPDRST 0x00000020
#define RCC_APB2ENR_AFIOEN 0x00000001
#define RCC_APB2ENR_IOPAEN 0x00000004
#define RCC_APB2ENR_IOPBEN 0x00000008
#define RCC_APB2ENR_IOPCEN 0x00000010
#define RCC_APB2ENR_IOPDEN 0x00000020
struct AFIO
{
volatile uint32_t EVCR;
volatile uint32_t MAPR;
volatile uint32_t EXTICR[4];
uint32_t RESERVED0;
volatile uint32_t MAPR2;
};
#define AFIO_BASE 0x40010000
static struct AFIO *const AFIO = (struct AFIO *const)AFIO_BASE;
#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
struct GPIO { struct GPIO {
volatile uint32_t CRL; volatile uint32_t CRL;
@@ -214,6 +232,9 @@ struct GPIO {
static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE); static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE); static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
#ifdef GPIO_OTHER_BASE
static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
#endif
static void static void
gpio_init (void) gpio_init (void)
@@ -223,6 +244,10 @@ gpio_init (void)
RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST; RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST;
RCC->APB2RSTR = 0; RCC->APB2RSTR = 0;
#ifdef AFIO_MAPR_SOMETHING
AFIO->MAPR |= AFIO_MAPR_SOMETHING;
#endif
GPIO_USB->ODR = VAL_GPIO_ODR; GPIO_USB->ODR = VAL_GPIO_ODR;
GPIO_USB->CRH = VAL_GPIO_CRH; GPIO_USB->CRH = VAL_GPIO_CRH;
GPIO_USB->CRL = VAL_GPIO_CRL; GPIO_USB->CRL = VAL_GPIO_CRL;
@@ -232,6 +257,12 @@ gpio_init (void)
GPIO_LED->CRH = VAL_GPIO_LED_CRH; GPIO_LED->CRH = VAL_GPIO_LED_CRH;
GPIO_LED->CRL = VAL_GPIO_LED_CRL; GPIO_LED->CRL = VAL_GPIO_LED_CRL;
#endif #endif
#ifdef GPIO_OTHER_BASE
GPIO_OTHER->ODR = VAL_GPIO_OTHER_ODR;
GPIO_OTHER->CRH = VAL_GPIO_OTHER_CRH;
GPIO_OTHER->CRL = VAL_GPIO_OTHER_CRL;
#endif
} }
static void static void
@@ -276,8 +307,6 @@ static void wait (int count)
asm volatile ("" : : "r" (i) : "memory"); asm volatile ("" : : "r" (i) : "memory");
} }
#define USB_IRQ 20
#define USB_IRQ_PRIORITY ((11) << 4)
static void static void
usb_lld_sys_shutdown (void) usb_lld_sys_shutdown (void)

41
example-led/sys.c
View File

@@ -181,15 +181,33 @@ clock_init (void)
; ;
} }
#define RCC_APB2ENR_IOPAEN 0x00000004 #define RCC_APB2RSTR_AFIORST 0x00000001
#define RCC_APB2RSTR_IOPARST 0x00000004 #define RCC_APB2RSTR_IOPARST 0x00000004
#define RCC_APB2ENR_IOPBEN 0x00000008
#define RCC_APB2RSTR_IOPBRST 0x00000008 #define RCC_APB2RSTR_IOPBRST 0x00000008
#define RCC_APB2ENR_IOPCEN 0x00000010
#define RCC_APB2RSTR_IOPCRST 0x00000010 #define RCC_APB2RSTR_IOPCRST 0x00000010
#define RCC_APB2ENR_IOPDEN 0x00000020
#define RCC_APB2RSTR_IOPDRST 0x00000020 #define RCC_APB2RSTR_IOPDRST 0x00000020
#define RCC_APB2ENR_AFIOEN 0x00000001
#define RCC_APB2ENR_IOPAEN 0x00000004
#define RCC_APB2ENR_IOPBEN 0x00000008
#define RCC_APB2ENR_IOPCEN 0x00000010
#define RCC_APB2ENR_IOPDEN 0x00000020
struct AFIO
{
volatile uint32_t EVCR;
volatile uint32_t MAPR;
volatile uint32_t EXTICR[4];
uint32_t RESERVED0;
volatile uint32_t MAPR2;
};
#define AFIO_BASE 0x40010000
static struct AFIO *const AFIO = (struct AFIO *const)AFIO_BASE;
#define AFIO_MAPR_TIM3_REMAP_PARTIALREMAP 0x00000800
struct GPIO { struct GPIO {
volatile uint32_t CRL; volatile uint32_t CRL;
@@ -214,6 +232,9 @@ struct GPIO {
static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE); static struct GPIO *const GPIO_USB = ((struct GPIO *const) GPIO_USB_BASE);
static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE); static struct GPIO *const GPIO_LED = ((struct GPIO *const) GPIO_LED_BASE);
#ifdef GPIO_OTHER_BASE
static struct GPIO *const GPIO_OTHER = ((struct GPIO *const) GPIO_OTHER_BASE);
#endif
static void static void
gpio_init (void) gpio_init (void)
@@ -223,6 +244,10 @@ gpio_init (void)
RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST; RCC->APB2RSTR = RCC_APB2RSTR_IOP_RST;
RCC->APB2RSTR = 0; RCC->APB2RSTR = 0;
#ifdef AFIO_MAPR_SOMETHING
AFIO->MAPR |= AFIO_MAPR_SOMETHING;
#endif
GPIO_USB->ODR = VAL_GPIO_ODR; GPIO_USB->ODR = VAL_GPIO_ODR;
GPIO_USB->CRH = VAL_GPIO_CRH; GPIO_USB->CRH = VAL_GPIO_CRH;
GPIO_USB->CRL = VAL_GPIO_CRL; GPIO_USB->CRL = VAL_GPIO_CRL;
@@ -232,6 +257,12 @@ gpio_init (void)
GPIO_LED->CRH = VAL_GPIO_LED_CRH; GPIO_LED->CRH = VAL_GPIO_LED_CRH;
GPIO_LED->CRL = VAL_GPIO_LED_CRL; GPIO_LED->CRL = VAL_GPIO_LED_CRL;
#endif #endif
#ifdef GPIO_OTHER_BASE
GPIO_OTHER->ODR = VAL_GPIO_OTHER_ODR;
GPIO_OTHER->CRH = VAL_GPIO_OTHER_CRH;
GPIO_OTHER->CRL = VAL_GPIO_OTHER_CRL;
#endif
} }
static void static void
@@ -276,8 +307,6 @@ static void wait (int count)
asm volatile ("" : : "r" (i) : "memory"); asm volatile ("" : : "r" (i) : "memory");
} }
#define USB_IRQ 20
#define USB_IRQ_PRIORITY ((11) << 4)
static void static void
usb_lld_sys_shutdown (void) usb_lld_sys_shutdown (void)