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Testing USB on STM32L4.

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This commit is contained in:
NIIBE Yutaka
2019-04-18 17:12:14 +09:00
parent 1f159888a0
commit 359082f80a
13 changed files with 215 additions and 69 deletions
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6
board/board-st-nucleo-f103.h
View File

@@ -11,8 +11,10 @@
*
* At CN10, connect USB cable
* Vbus RED --> 10 NC ----------> CN7 (6 E5V)
* D+ GREEN --> 12 PA11 ---[1K5]--> CN6 (4 3V3)
* D- WHITE --> 14 PA12
* D+ GREEN --> 12 PA12 ---[1K5]--> CN6 (4 3V3)
* D- WHITE --> 14 PA11
* 16 PB12 (USART3-CK) ---> smartcard CK
* 18
* GND BLACK --> 20 GND
*/

28
board/board-st-nucleo-l432.h
View File

@@ -8,8 +8,8 @@
* Vbus RED --> 4
*
* At CN3, connect USB cable
* D- GREEN --> 13 PA11
* D+ WHITE --> 5 PA12
* D- WHITE --> 13 PA11
* D+ GREEN --> 5 PA12
* GND BLACK --> 4 GND
*/
@@ -23,25 +23,25 @@
/*
* Port A setup.
*
* MODER: 10 10 - 10 01 - 01 11 - 10 10 11 11 - 11 11 - 11 10 - 11 11
* MODER: 10 10 - 10 10 - 10 11 - 10 10 11 11 - 11 11 - 11 10 - 11 11
*
* PA2 - USART2-TX: AF7
* PA8 - USART1-CK: AF7
* PA9 - USART1-TX: AF7 Open-drain pull-up
* PA11 - Push Pull output medium-speed 0 (until USB enabled) (USBDM: AF10)
* PA12 - Push Pull output medium-speed 0 (until USB enabled) (USBDP: AF10)
* PA13 - SWDIO
* PA14 - SWDCLK
* PA15 - USART2-RX: AF3
* PA2 - USART2-TX: AF7 output push-pull
* PA8 - USART1-CK: AF7 output push-pull
* PA9 - USART1-TX: AF7 output(input) Open-drain pull-up
* PA11 - USBDM: AF10 input/output
* PA12 - USBDP: AF10 input/output
* PA13 - SWDIO: AF0
* PA14 - SWDCLK: AF0
* PA15 - USART2-RX: AF3 input
* ------------------------ Default
* PAx - analog input
*/
#define VAL_GPIO_OTHER_MODER 0xA97AFFEF
#define VAL_GPIO_OTHER_MODER 0xAABAFFEF
#define VAL_GPIO_OTHER_OTYPER 0x00000200
#define VAL_GPIO_OTHER_OSPEEDR 0xFB7FFFFF
#define VAL_GPIO_OTHER_OSPEEDR 0xFFFFFFFF
#define VAL_GPIO_OTHER_PUPDR 0x00040000
#define VAL_GPIO_OTHER_AFRL 0x00000700
#define VAL_GPIO_OTHER_AFRH 0x30000077
#define VAL_GPIO_OTHER_AFRH 0x300AA077
/*
* Port B setup.