More change for clock setting.
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@@ -39,6 +39,10 @@ static struct RCC *const RCC = (struct RCC *)RCC_BASE;
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#define RCC_CFGR_SWS 0x0000000C
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#define RCC_CFGR_SWS_HSI 0x00000000
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#define RCC_CFGR_SW_HSI (0 << 0)
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#define RCC_CFGR_SW_HSE (1 << 0)
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#define RCC_CFGR_SW_PLL (2 << 0)
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#define RCC_CFGR_SW_MASK (3 << 0)
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#define RCC_AHBENR_DMA1EN 0x00000001
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#define RCC_AHBENR_CRCEN 0x00000040
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@@ -92,10 +96,6 @@ static struct RCC *const RCC = (struct RCC *)RCC_BASE;
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#define RCC_APB2ENR_IOPGEN 0x00000100
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#endif
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#define RCC_CFGR_SW_HCI (0 << 0)
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#define RCC_CFGR_SW_PLL (2 << 0)
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#define RCC_CFGR_SW_MASK (3 << 0)
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#define RCC_CFGR_SWS 0x0000000C
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/* Clock setting values.
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* Due to historical reason, it has the prefix of STM32_.
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