update example-fsm-55
This commit is contained in:
NIIBE Yutaka
4
AUTHORS
4
AUTHORS
@@ -12,6 +12,10 @@ Kenji Rikitake:
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Added ST Nucleo F103 support.
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board/board-st-nucleo-f103.h
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Kiwamu Okabe:
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Wrote an OpenOCD scirpt:
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example-fsm-55/stlink-v2.cfg
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NIIBE Yutaka:
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Write the library:
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chopstx.c, eventflag.c, entry.c, clk_gpio_init.c
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@@ -1,3 +1,12 @@
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2015-07-31 Niibe Yutaka <gniibe@fsij.org>
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* example-fsm-55/Makefile (DEFS): Remove HAVE_SYS_H.
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Add MAKE_ENTRY_PUBLIC.
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* example-fsm-55/hacker-emblem.ld: Put vectors on ROM.
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* example-fsm-55/sys.c: No system services.
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* entry.c (entry): Can be public.
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* clk_gpio_init.c [MCU_STM32F0] (clock_init): Don't change CFGR1.
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2015-07-30 Niibe Yutaka <gniibe@fsij.org>
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* board/board-st-nucleo-f103.h: New. Contributed by Kenji
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@@ -231,9 +231,11 @@ clock_init (void)
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RCC->APB2RSTR = RCC_APB2RSTR_SYSCFGRST;
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RCC->APB2RSTR = 0;
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# if defined(HAVE_SYS_H)
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/* Use vectors on RAM */
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SYSCFG->CFGR1 = (SYSCFG->CFGR1 & ~SYSCFG_CFGR1_MEM_MODE) | 3;
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# endif
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#endif
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}
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8
entry.c
8
entry.c
@@ -41,6 +41,12 @@
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#endif
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#ifdef MAKE_ENTRY_PUBLIC
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#define STATIC_ENTRY
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#else
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#define STATIC_ENTRY static
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#endif
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extern uint8_t __main_stack_end__;
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extern void svc (void);
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extern void preempt (void);
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@@ -98,7 +104,7 @@ uint32_t vectors_in_ram[48];
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/*
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* This routine only changes PSP and not MSP.
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*/
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static __attribute__ ((naked,section(".text.startup.0")))
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STATIC_ENTRY __attribute__ ((naked,section(".text.startup.0")))
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void entry (void)
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{
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asm volatile ("bl clock_init\n\t"
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@@ -7,6 +7,8 @@
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#define BOARD_ID_STBEE 0x945c37e8
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#define BOARD_ID_STM32_PRIMER2 0x21e5798d
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#define BOARD_ID_STM8S_DISCOVERY 0x2f0976bb
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#define BOARD_ID_ST_DONGLE 0x2cd4e471
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#define BOARD_ID_ST_NUCLEO_F103 0x9b87c16d
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extern const uint8_t sys_version[8];
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extern const uint32_t sys_board_id;
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@@ -14,7 +14,8 @@ OBJCOPY = $(CROSS)objcopy
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MCU = cortex-m0 # -save-temps
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CWARN = -Wall -Wextra -Wstrict-prototypes
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DEFS = -DHAVE_SYS_H -DFREE_STANDING -DMHZ=48 -DUSE_WFI_FOR_IDLE
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DEFS = -DMAKE_ENTRY_PUBLIC \
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-DFREE_STANDING -DMHZ=48 -DUSE_WFI_FOR_IDLE
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OPT = -O3 -Os -g
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LIBS =
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12
example-fsm-55/README
Normal file
12
example-fsm-55/README
Normal file
@@ -0,0 +1,12 @@
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FSM-55 LED Matrix Display Board is a simple board to play 5x5 LED
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Display. Please see the product page:
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http://www.seeedstudio.com/depot/FSM55-LED-Matrix-Display-p-2121.html
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The file stlink-v2.cfg can be used for ST-Link/V2 with OpenOCD. You
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can flash by typing:
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$ openocd -f ./stlink-v2.cfg -c "program build/hacker-emblem.elf"
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Thanks to Kiwamu Okabe who kindly tested OpenOCD and wrote the
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configuration.
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@@ -9,44 +9,24 @@ __process3_stack_size__ = 0x0100; /* third thread program */
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MEMORY
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{
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flash0 : org = 0x08000000, len = 4k
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flash : org = 0x08000000+0x1000, len = 60k
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ram : org = 0x20000000, len = 20k
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flash : org = 0x08000000, len = 16k
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ram : org = 0x20000000, len = 4k
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}
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__ram_start__ = ORIGIN(ram);
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__ram_size__ = 20k;
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__ram_size__ = 4k;
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__ram_end__ = __ram_start__ + __ram_size__;
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SECTIONS
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{
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. = 0;
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.sys : ALIGN(4) SUBALIGN(4)
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{
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_sys = .;
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KEEP(*(.vectors))
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. = ALIGN(16);
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KEEP(*(.sys.version))
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KEEP(*(.sys.board_id))
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KEEP(*(.sys.board_name))
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build/sys.o(.text)
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build/sys.o(.text.*)
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build/sys.o(.rodata)
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build/sys.o(.rodata.*)
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. = ALIGN(1024);
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} > flash0 =0xffffffff
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_text = .;
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.startup : ALIGN(128) SUBALIGN(128)
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{
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KEEP(*(.startup.vectors))
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. = ALIGN (16);
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} > flash =0xffffffff
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.text : ALIGN(16) SUBALIGN(16)
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{
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KEEP(*(.vectors))
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. = ALIGN(16);
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*(.text.startup.*)
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*(.text)
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*(.text.*)
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@@ -58,6 +38,12 @@ SECTIONS
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. = ALIGN(8);
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} > flash
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/DISCARD/ :
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{
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*(.startup.vectors)
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*(.bss.startup.0)
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}
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.ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
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.ARM.exidx : {
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@@ -75,13 +61,6 @@ SECTIONS
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_etext = .;
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_textdata = _etext;
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.vectors_in_ram :
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{
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. = ALIGN(8);
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__vector_ram_addr__ = .;
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KEEP(*(.bss.startup.*))
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} > ram
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.process_stack :
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{
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. = ALIGN(8);
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11
example-fsm-55/stlink-v2.cfg
Normal file
11
example-fsm-55/stlink-v2.cfg
Normal file
@@ -0,0 +1,11 @@
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# Contributed by Kiwamu Okabe
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source [find interface/stlink-v2.cfg]
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transport select hla_swd
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# The STM32F030F4P6 is a *tightly* constrained chip; the work area size must be
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# similarly constrained.
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set WORKAREASIZE 0x1000
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source [find target/stm32f0x.cfg]
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# use hardware reset, connect under reset
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@@ -1,7 +1,7 @@
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/*
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* sys.c - system routines for the initial page for STM32F030 / STM32F103.
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* sys.c - No system routines, but only RESET handler for STM32F030.
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*
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* Copyright (C) 2013, 2014, 2015 Flying Stone Technology
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* Copyright (C) 2015 Flying Stone Technology
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* Author: NIIBE Yutaka <gniibe@fsij.org>
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*
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* Copying and distribution of this file, with or without modification,
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@@ -9,453 +9,110 @@
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* notice and this notice are preserved. This file is offered as-is,
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* without any warranty.
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*
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* When the flash ROM is protected, we cannot modify the initial page.
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* We put some system routines (which is useful for any program) here.
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*/
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#include <stdint.h>
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#include <stdlib.h>
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#include "board.h"
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#include "clk_gpio_init.c"
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#define CORTEX_PRIORITY_BITS 4
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#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
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#define USB_LP_CAN1_RX0_IRQn 20
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#define STM32_USB_IRQ_PRIORITY 11
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struct NVIC {
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uint32_t ISER[8];
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uint32_t unused1[24];
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uint32_t ICER[8];
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uint32_t unused2[24];
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uint32_t ISPR[8];
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uint32_t unused3[24];
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uint32_t ICPR[8];
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uint32_t unused4[24];
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uint32_t IABR[8];
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uint32_t unused5[56];
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uint32_t IPR[60];
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};
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static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
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#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
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#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
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#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
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static void
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nvic_enable_vector (uint32_t n, uint32_t prio)
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{
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unsigned int sh = (n & 3) << 3;
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NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
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NVIC_ICPR (n) = 1 << (n & 0x1F);
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NVIC_ISER (n) = 1 << (n & 0x1F);
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}
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static void
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usb_cable_config (int enable)
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{
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#if defined(GPIO_USB_SET_TO_ENABLE)
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if (enable)
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GPIO_USB->BSRR = (1 << GPIO_USB_SET_TO_ENABLE);
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else
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GPIO_USB->BRR = (1 << GPIO_USB_SET_TO_ENABLE);
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#elif defined(GPIO_USB_CLEAR_TO_ENABLE)
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if (enable)
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GPIO_USB->BRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
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else
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GPIO_USB->BSRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
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#else
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(void)enable;
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#endif
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}
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void
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set_led (int on)
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{
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#if defined(GPIO_LED_CLEAR_TO_EMIT)
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if (on)
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GPIO_LED->BRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
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else
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GPIO_LED->BSRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
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#else
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if (on)
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GPIO_LED->BSRR = (1 << GPIO_LED_SET_TO_EMIT);
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else
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GPIO_LED->BRR = (1 << GPIO_LED_SET_TO_EMIT);
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#endif
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}
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static void wait (int count)
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{
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int i;
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for (i = 0; i < count; i++)
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asm volatile ("" : : "r" (i) : "memory");
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}
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static void
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usb_lld_sys_shutdown (void)
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{
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RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
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RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
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usb_cable_config (0);
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}
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static void
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usb_lld_sys_init (void)
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{
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if ((RCC->APB1ENR & RCC_APB1ENR_USBEN)
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&& (RCC->APB1RSTR & RCC_APB1RSTR_USBRST) == 0)
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/* Make sure the device is disconnected, even after core reset. */
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{
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usb_lld_sys_shutdown ();
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/* Disconnect requires SE0 (>= 2.5uS). */
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wait (300);
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}
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usb_cable_config (1);
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RCC->APB1ENR |= RCC_APB1ENR_USBEN;
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nvic_enable_vector (USB_LP_CAN1_RX0_IRQn,
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CORTEX_PRIORITY_MASK (STM32_USB_IRQ_PRIORITY));
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/*
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* Note that we also have other IRQ(s):
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* USB_HP_CAN1_TX_IRQn (for double-buffered or isochronous)
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* USBWakeUp_IRQn (suspend/resume)
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*/
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RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
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RCC->APB1RSTR = 0;
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}
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#define FLASH_KEY1 0x45670123UL
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#define FLASH_KEY2 0xCDEF89ABUL
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enum flash_status
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{
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FLASH_BUSY = 1,
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FLASH_ERROR_PG,
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FLASH_ERROR_WRP,
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FLASH_COMPLETE,
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FLASH_TIMEOUT
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};
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static void __attribute__ ((used))
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flash_unlock (void)
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{
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FLASH->KEYR = FLASH_KEY1;
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FLASH->KEYR = FLASH_KEY2;
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}
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#define intr_disable() asm volatile ("cpsid i" : : : "memory")
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#define intr_enable() asm volatile ("cpsie i" : : : "memory")
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#define FLASH_SR_BSY 0x01
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#define FLASH_SR_PGERR 0x04
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#define FLASH_SR_WRPRTERR 0x10
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#define FLASH_SR_EOP 0x20
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#define FLASH_CR_PG 0x0001
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#define FLASH_CR_PER 0x0002
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#define FLASH_CR_MER 0x0004
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#define FLASH_CR_OPTPG 0x0010
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#define FLASH_CR_OPTER 0x0020
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#define FLASH_CR_STRT 0x0040
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#define FLASH_CR_LOCK 0x0080
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#define FLASH_CR_OPTWRE 0x0200
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#define FLASH_CR_ERRIE 0x0400
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#define FLASH_CR_EOPIE 0x1000
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static int
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flash_wait_for_last_operation (uint32_t timeout)
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{
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int status;
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do
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{
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status = FLASH->SR;
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if (--timeout == 0)
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break;
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}
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while ((status & FLASH_SR_BSY) != 0);
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return status & (FLASH_SR_BSY|FLASH_SR_PGERR|FLASH_SR_WRPRTERR);
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}
|
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#define FLASH_PROGRAM_TIMEOUT 0x00010000
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#define FLASH_ERASE_TIMEOUT 0x01000000
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static int
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flash_program_halfword (uint32_t addr, uint16_t data)
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{
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int status;
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status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
|
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intr_disable ();
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if (status == 0)
|
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{
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FLASH->CR |= FLASH_CR_PG;
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*(volatile uint16_t *)addr = data;
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status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
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FLASH->CR &= ~FLASH_CR_PG;
|
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}
|
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intr_enable ();
|
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return status;
|
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}
|
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|
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static int
|
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flash_erase_page (uint32_t addr)
|
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{
|
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int status;
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|
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status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
|
||||
intr_disable ();
|
||||
if (status == 0)
|
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{
|
||||
FLASH->CR |= FLASH_CR_PER;
|
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FLASH->AR = addr;
|
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FLASH->CR |= FLASH_CR_STRT;
|
||||
|
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status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
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FLASH->CR &= ~FLASH_CR_PER;
|
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}
|
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intr_enable ();
|
||||
|
||||
return status;
|
||||
}
|
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|
||||
static int
|
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flash_check_blank (const uint8_t *p_start, size_t size)
|
||||
{
|
||||
const uint8_t *p;
|
||||
|
||||
for (p = p_start; p < p_start + size; p++)
|
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if (*p != 0xff)
|
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return 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#define FLASH_START_ADDR 0x08000000 /* Fixed for all STM32F0/F1. */
|
||||
#define FLASH_OFFSET 0x1000 /* First pages are not-writable
|
||||
when protected. */
|
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#if defined(__ARM_ARCH_6M__)
|
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#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7cc)
|
||||
#define CHIP_ID_REG ((uint32_t *)0x40015800)
|
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#else
|
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#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7e0)
|
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#define CHIP_ID_REG ((uint32_t *)0xe0042000)
|
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#endif
|
||||
#define FLASH_START (FLASH_START_ADDR+FLASH_OFFSET)
|
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|
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static int
|
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flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
|
||||
{
|
||||
int status;
|
||||
uint32_t flash_end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
|
||||
|
||||
if (dst_addr < FLASH_START || dst_addr + len > flash_end)
|
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return 0;
|
||||
|
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while (len)
|
||||
{
|
||||
uint16_t hw = *src++;
|
||||
|
||||
hw |= (*src++ << 8);
|
||||
status = flash_program_halfword (dst_addr, hw);
|
||||
if (status != 0)
|
||||
return 0; /* error return */
|
||||
|
||||
dst_addr += 2;
|
||||
len -= 2;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#define OPTION_BYTES_ADDR 0x1ffff800
|
||||
|
||||
static int
|
||||
flash_protect (void)
|
||||
{
|
||||
int status;
|
||||
uint32_t option_bytes_value;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
|
||||
intr_disable ();
|
||||
if (status == 0)
|
||||
{
|
||||
FLASH->OPTKEYR = FLASH_KEY1;
|
||||
FLASH->OPTKEYR = FLASH_KEY2;
|
||||
|
||||
FLASH->CR |= FLASH_CR_OPTER;
|
||||
FLASH->CR |= FLASH_CR_STRT;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
FLASH->CR &= ~FLASH_CR_OPTER;
|
||||
}
|
||||
intr_enable ();
|
||||
|
||||
if (status != 0)
|
||||
return 0;
|
||||
|
||||
option_bytes_value = *(uint32_t *)OPTION_BYTES_ADDR;
|
||||
return (option_bytes_value & 0xff) == 0xff ? 1 : 0;
|
||||
}
|
||||
|
||||
static void __attribute__((naked))
|
||||
flash_erase_all_and_exec (void (*entry)(void))
|
||||
{
|
||||
uint32_t addr = FLASH_START;
|
||||
uint32_t end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
|
||||
uint32_t page_size = 1024;
|
||||
int r;
|
||||
|
||||
if (((*CHIP_ID_REG) & 0xfff) == 0x0414)
|
||||
page_size = 2048;
|
||||
|
||||
while (addr < end)
|
||||
{
|
||||
r = flash_erase_page (addr);
|
||||
if (r != 0)
|
||||
break;
|
||||
|
||||
addr += page_size;
|
||||
}
|
||||
|
||||
if (addr >= end)
|
||||
(*entry) ();
|
||||
|
||||
for (;;);
|
||||
}
|
||||
|
||||
struct SCB
|
||||
{
|
||||
volatile uint32_t CPUID;
|
||||
volatile uint32_t ICSR;
|
||||
volatile uint32_t VTOR;
|
||||
volatile uint32_t AIRCR;
|
||||
volatile uint32_t SCR;
|
||||
volatile uint32_t CCR;
|
||||
volatile uint8_t SHP[12];
|
||||
volatile uint32_t SHCSR;
|
||||
volatile uint32_t CFSR;
|
||||
volatile uint32_t HFSR;
|
||||
volatile uint32_t DFSR;
|
||||
volatile uint32_t MMFAR;
|
||||
volatile uint32_t BFAR;
|
||||
volatile uint32_t AFSR;
|
||||
volatile uint32_t PFR[2];
|
||||
volatile uint32_t DFR;
|
||||
volatile uint32_t ADR;
|
||||
volatile uint32_t MMFR[4];
|
||||
volatile uint32_t ISAR[5];
|
||||
};
|
||||
|
||||
#define SCS_BASE (0xE000E000)
|
||||
#define SCB_BASE (SCS_BASE + 0x0D00)
|
||||
static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
|
||||
|
||||
#define SYSRESETREQ 0x04
|
||||
static void
|
||||
nvic_system_reset (void)
|
||||
{
|
||||
SCB->AIRCR = (0x05FA0000 | (SCB->AIRCR & 0x70) | SYSRESETREQ);
|
||||
asm volatile ("dsb");
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static void __attribute__ ((naked))
|
||||
reset (void)
|
||||
{
|
||||
/*
|
||||
* This code may not be at the start of flash ROM, because of DFU.
|
||||
* So, we take the address from PC.
|
||||
*/
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
|
||||
"ldr r0, 1f\n\t" /* r0 = RAM start */
|
||||
"mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
|
||||
"mov r2, #0x10\n\t"
|
||||
"lsl r2, #8\n\t"
|
||||
"add r1, r1, r2\n\t"
|
||||
"sub r2, r2, #1\n\t"
|
||||
"bic r1, r1, r2\n\t"
|
||||
"mov r2, #188\n"
|
||||
"2:\n\t" /* Copy vectors. It will be enabled later by clock_init. */
|
||||
"ldr r3, [r1, r2]\n\t"
|
||||
"str r3, [r0, r2]\n\t"
|
||||
"sub r2, #4\n\t"
|
||||
"bcs 2b\n\t"
|
||||
"msr MSP, r3\n\t" /* Main (exception handler) stack. */
|
||||
"ldr r0, [r1, #4]\n\t" /* Reset handler. */
|
||||
"bx r0\n\t"
|
||||
".align 2\n"
|
||||
"1: .word 0x20000000"
|
||||
"mov r0, pc\n\t" /* r0 = PC & ~0x0fff */
|
||||
"mov r1, #0x10\n\t"
|
||||
"lsl r1, #8\n\t"
|
||||
"sub r1, r1, #1\n\t"
|
||||
"bic r0, r0, r1\n\t"
|
||||
"ldr r2, [r0]\n\t"
|
||||
"msr MSP, r2\n\t" /* Main (exception handler) stack. */
|
||||
"b entry\n\t"
|
||||
: /* no output */ : /* no input */ : "memory");
|
||||
#else
|
||||
extern const unsigned long *FT0, *FT1, *FT2;
|
||||
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
|
||||
"ldr r0, 1f\n\t" /* r0 = SCR */
|
||||
"mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
|
||||
"mov r2, #0x1000\n\t"
|
||||
"add r1, r1, r2\n\t"
|
||||
"sub r2, r2, #1\n\t"
|
||||
"bic r1, r1, r2\n\t"
|
||||
"str r1, [r0, #8]\n\t" /* Set SCR->VCR */
|
||||
"ldr r0, [r1], #4\n\t"
|
||||
"msr MSP, r0\n\t" /* Main (exception handler) stack. */
|
||||
"ldr r0, [r1]\n\t" /* Reset handler. */
|
||||
"bx r0\n\t"
|
||||
".align 2\n"
|
||||
"1: .word 0xe000ed00"
|
||||
: /* no output */ : /* no input */ : "memory");
|
||||
/* Artificial entry to refer FT0, FT1, and FT2. */
|
||||
asm volatile (""
|
||||
: : "r" (FT0), "r" (FT1), "r" (FT2));
|
||||
#endif
|
||||
/* Never reach here. */
|
||||
}
|
||||
|
||||
extern uint8_t __main_stack_end__;
|
||||
extern void svc (void);
|
||||
extern void preempt (void);
|
||||
extern void chx_timer_expired (void);
|
||||
extern void chx_handle_intr (void);
|
||||
|
||||
static void nmi (void)
|
||||
{
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static void __attribute__ ((naked))
|
||||
hard_fault (void)
|
||||
{
|
||||
register uint32_t primask;
|
||||
|
||||
asm ("mrs %0, PRIMASK" : "=r" (primask));
|
||||
|
||||
if (primask)
|
||||
asm volatile ("b svc");
|
||||
else
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static void mem_manage (void)
|
||||
{
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static void bus_fault (void)
|
||||
{
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static void usage_fault (void)
|
||||
{
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static void none (void)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
typedef void (*handler)(void);
|
||||
extern uint8_t __ram_end__;
|
||||
extern uint8_t __main_stack_end__;
|
||||
|
||||
handler vector[] __attribute__ ((section(".vectors"))) = {
|
||||
(handler)&__ram_end__,
|
||||
(handler)&__main_stack_end__,
|
||||
reset,
|
||||
(handler)set_led,
|
||||
flash_unlock,
|
||||
(handler)flash_program_halfword,
|
||||
(handler)flash_erase_page,
|
||||
(handler)flash_check_blank,
|
||||
(handler)flash_write,
|
||||
(handler)flash_protect,
|
||||
(handler)flash_erase_all_and_exec,
|
||||
usb_lld_sys_init,
|
||||
usb_lld_sys_shutdown,
|
||||
nvic_system_reset,
|
||||
clock_init,
|
||||
gpio_init,
|
||||
NULL,
|
||||
nmi, /* nmi */
|
||||
hard_fault, /* hard fault */
|
||||
/* 0x10 */
|
||||
mem_manage, /* mem manage */
|
||||
bus_fault, /* bus fault */
|
||||
usage_fault, /* usage fault */
|
||||
none,
|
||||
/* 0x20 */
|
||||
none, none, none, /* reserved */
|
||||
svc, /* SVCall */
|
||||
none, /* Debug */
|
||||
none, /* reserved */
|
||||
preempt, /* PendSV */
|
||||
chx_timer_expired, /* SysTick */
|
||||
/* 0x40 */
|
||||
chx_handle_intr /* WWDG */, chx_handle_intr /* PVD */,
|
||||
chx_handle_intr /* TAMPER */, chx_handle_intr /* RTC */,
|
||||
chx_handle_intr /* FLASH */, chx_handle_intr /* RCC */,
|
||||
chx_handle_intr /* EXTI0 */, chx_handle_intr /* EXTI1 */,
|
||||
/* 0x60 */
|
||||
chx_handle_intr /* EXTI2 */, chx_handle_intr /* EXTI3 */,
|
||||
chx_handle_intr /* EXTI4 */, chx_handle_intr /* DMA1 CH1 */,
|
||||
chx_handle_intr /* DMA1 CH2 */, chx_handle_intr /* DMA1 CH3 */,
|
||||
chx_handle_intr /* DMA1 CH4 */, chx_handle_intr /* DMA1 CH5 */,
|
||||
/* 0x80 */
|
||||
chx_handle_intr /* DMA1 CH6 */, chx_handle_intr /* DMA1 CH7 */,
|
||||
chx_handle_intr /* ADC1_2 */, chx_handle_intr /* USB HP */,
|
||||
/* 0x90 */
|
||||
chx_handle_intr /* USB LP */, chx_handle_intr /* CAN */,
|
||||
/* ... and more. EXT9_5, TIMx, I2C, SPI, USART, EXT15_10 */
|
||||
chx_handle_intr, chx_handle_intr,
|
||||
/* 0xA0 */
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
chx_handle_intr, chx_handle_intr, chx_handle_intr, chx_handle_intr,
|
||||
/* 0xc0 */
|
||||
};
|
||||
|
||||
const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
|
||||
3*2+2, /* bLength */
|
||||
0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */
|
||||
/* sys version: "2.1" */
|
||||
'2', 0, '.', 0, '1', 0,
|
||||
};
|
||||
|
||||
const uint32_t __attribute__((section(".sys.board_id")))
|
||||
sys_board_id = BOARD_ID;
|
||||
|
||||
const uint8_t __attribute__((section(".sys.board_name")))
|
||||
sys_board_name[] = BOARD_NAME;
|
||||
|
||||
@@ -1,132 +0,0 @@
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
#define BOARD_ID_STM32F0_DISCOVERY 0xde4b4bc1
|
||||
#define BOARD_ID_FSM_55 0x83433c76
|
||||
#else
|
||||
#define BOARD_ID_CQ_STARM 0xc5480875
|
||||
#define BOARD_ID_FST_01_00 0x613870a9
|
||||
#define BOARD_ID_FST_01 0x696886af
|
||||
#define BOARD_ID_MAPLE_MINI 0x7a445272
|
||||
#define BOARD_ID_OLIMEX_STM32_H103 0xf92bb594
|
||||
#define BOARD_ID_STBEE_MINI 0x1f341961
|
||||
#define BOARD_ID_STBEE 0x945c37e8
|
||||
#define BOARD_ID_STM32_PRIMER2 0x21e5798d
|
||||
#define BOARD_ID_STM8S_DISCOVERY 0x2f0976bb
|
||||
#endif
|
||||
|
||||
extern const uint8_t sys_version[8];
|
||||
extern const uint32_t sys_board_id;
|
||||
extern const uint8_t sys_board_name[];
|
||||
|
||||
typedef void (*handler)(void);
|
||||
extern handler vector[16];
|
||||
|
||||
static inline const uint8_t *
|
||||
unique_device_id (void)
|
||||
{
|
||||
/* STM32F103 has 96-bit unique device identifier */
|
||||
const uint8_t *addr = (const uint8_t *)0x1ffff7e8;
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
static inline void
|
||||
set_led (int on)
|
||||
{
|
||||
void (*func) (int) = (void (*)(int))vector[2];
|
||||
|
||||
return (*func) (on);
|
||||
}
|
||||
|
||||
static inline void
|
||||
flash_unlock (void)
|
||||
{
|
||||
(*vector[3]) ();
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_program_halfword (uint32_t addr, uint16_t data)
|
||||
{
|
||||
int (*func) (uint32_t, uint16_t) = (int (*)(uint32_t, uint16_t))vector[4];
|
||||
|
||||
return (*func) (addr, data);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_erase_page (uint32_t addr)
|
||||
{
|
||||
int (*func) (uint32_t) = (int (*)(uint32_t))vector[5];
|
||||
|
||||
return (*func) (addr);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_check_blank (const uint8_t *p_start, size_t size)
|
||||
{
|
||||
int (*func) (const uint8_t *, int) = (int (*)(const uint8_t *, int))vector[6];
|
||||
|
||||
return (*func) (p_start, size);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
|
||||
{
|
||||
int (*func) (uint32_t, const uint8_t *, size_t)
|
||||
= (int (*)(uint32_t, const uint8_t *, size_t))vector[7];
|
||||
|
||||
return (*func) (dst_addr, src, len);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_protect (void)
|
||||
{
|
||||
int (*func) (void) = (int (*)(void))vector[8];
|
||||
|
||||
return (*func) ();
|
||||
}
|
||||
|
||||
static inline void __attribute__((noreturn))
|
||||
flash_erase_all_and_exec (void (*entry)(void))
|
||||
{
|
||||
void (*func) (void (*)(void)) = (void (*)(void (*)(void)))vector[9];
|
||||
|
||||
(*func) (entry);
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static inline void
|
||||
usb_lld_sys_init (void)
|
||||
{
|
||||
(*vector[10]) ();
|
||||
}
|
||||
|
||||
static inline void
|
||||
usb_lld_sys_shutdown (void)
|
||||
{
|
||||
(*vector[11]) ();
|
||||
}
|
||||
|
||||
static inline void
|
||||
nvic_system_reset (void)
|
||||
{
|
||||
(*vector[12]) ();
|
||||
}
|
||||
|
||||
/*
|
||||
* Users can override INLINE by 'attribute((used))' to have an
|
||||
* implementation defined.
|
||||
*/
|
||||
#if !defined(INLINE)
|
||||
#define INLINE __inline__
|
||||
#endif
|
||||
|
||||
static INLINE void
|
||||
clock_init (void)
|
||||
{
|
||||
(*vector[13]) ();
|
||||
}
|
||||
|
||||
static INLINE void
|
||||
gpio_init (void)
|
||||
{
|
||||
(*vector[14]) ();
|
||||
}
|
||||
@@ -1 +0,0 @@
|
||||
../example-fsm-55/sys.c
|
||||
461
example-led/sys.c
Normal file
461
example-led/sys.c
Normal file
@@ -0,0 +1,461 @@
|
||||
/*
|
||||
* sys.c - system routines for the initial page for STM32F030 / STM32F103.
|
||||
*
|
||||
* Copyright (C) 2013, 2014, 2015 Flying Stone Technology
|
||||
* Author: NIIBE Yutaka <gniibe@fsij.org>
|
||||
*
|
||||
* Copying and distribution of this file, with or without modification,
|
||||
* are permitted in any medium without royalty provided the copyright
|
||||
* notice and this notice are preserved. This file is offered as-is,
|
||||
* without any warranty.
|
||||
*
|
||||
* When the flash ROM is protected, we cannot modify the initial page.
|
||||
* We put some system routines (which is useful for any program) here.
|
||||
*/
|
||||
|
||||
#include <stdint.h>
|
||||
#include <stdlib.h>
|
||||
#include "board.h"
|
||||
|
||||
#include "clk_gpio_init.c"
|
||||
|
||||
#define CORTEX_PRIORITY_BITS 4
|
||||
#define CORTEX_PRIORITY_MASK(n) ((n) << (8 - CORTEX_PRIORITY_BITS))
|
||||
#define USB_LP_CAN1_RX0_IRQn 20
|
||||
#define STM32_USB_IRQ_PRIORITY 11
|
||||
|
||||
struct NVIC {
|
||||
uint32_t ISER[8];
|
||||
uint32_t unused1[24];
|
||||
uint32_t ICER[8];
|
||||
uint32_t unused2[24];
|
||||
uint32_t ISPR[8];
|
||||
uint32_t unused3[24];
|
||||
uint32_t ICPR[8];
|
||||
uint32_t unused4[24];
|
||||
uint32_t IABR[8];
|
||||
uint32_t unused5[56];
|
||||
uint32_t IPR[60];
|
||||
};
|
||||
|
||||
static struct NVIC *const NVICBase = ((struct NVIC *const)0xE000E100);
|
||||
#define NVIC_ISER(n) (NVICBase->ISER[n >> 5])
|
||||
#define NVIC_ICPR(n) (NVICBase->ICPR[n >> 5])
|
||||
#define NVIC_IPR(n) (NVICBase->IPR[n >> 2])
|
||||
|
||||
static void
|
||||
nvic_enable_vector (uint32_t n, uint32_t prio)
|
||||
{
|
||||
unsigned int sh = (n & 3) << 3;
|
||||
|
||||
NVIC_IPR (n) = (NVIC_IPR(n) & ~(0xFF << sh)) | (prio << sh);
|
||||
NVIC_ICPR (n) = 1 << (n & 0x1F);
|
||||
NVIC_ISER (n) = 1 << (n & 0x1F);
|
||||
}
|
||||
|
||||
static void
|
||||
usb_cable_config (int enable)
|
||||
{
|
||||
#if defined(GPIO_USB_SET_TO_ENABLE)
|
||||
if (enable)
|
||||
GPIO_USB->BSRR = (1 << GPIO_USB_SET_TO_ENABLE);
|
||||
else
|
||||
GPIO_USB->BRR = (1 << GPIO_USB_SET_TO_ENABLE);
|
||||
#elif defined(GPIO_USB_CLEAR_TO_ENABLE)
|
||||
if (enable)
|
||||
GPIO_USB->BRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
|
||||
else
|
||||
GPIO_USB->BSRR = (1 << GPIO_USB_CLEAR_TO_ENABLE);
|
||||
#else
|
||||
(void)enable;
|
||||
#endif
|
||||
}
|
||||
|
||||
void
|
||||
set_led (int on)
|
||||
{
|
||||
#if defined(GPIO_LED_CLEAR_TO_EMIT)
|
||||
if (on)
|
||||
GPIO_LED->BRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
|
||||
else
|
||||
GPIO_LED->BSRR = (1 << GPIO_LED_CLEAR_TO_EMIT);
|
||||
#else
|
||||
if (on)
|
||||
GPIO_LED->BSRR = (1 << GPIO_LED_SET_TO_EMIT);
|
||||
else
|
||||
GPIO_LED->BRR = (1 << GPIO_LED_SET_TO_EMIT);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void wait (int count)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < count; i++)
|
||||
asm volatile ("" : : "r" (i) : "memory");
|
||||
}
|
||||
|
||||
|
||||
static void
|
||||
usb_lld_sys_shutdown (void)
|
||||
{
|
||||
RCC->APB1ENR &= ~RCC_APB1ENR_USBEN;
|
||||
RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
|
||||
usb_cable_config (0);
|
||||
}
|
||||
|
||||
static void
|
||||
usb_lld_sys_init (void)
|
||||
{
|
||||
if ((RCC->APB1ENR & RCC_APB1ENR_USBEN)
|
||||
&& (RCC->APB1RSTR & RCC_APB1RSTR_USBRST) == 0)
|
||||
/* Make sure the device is disconnected, even after core reset. */
|
||||
{
|
||||
usb_lld_sys_shutdown ();
|
||||
/* Disconnect requires SE0 (>= 2.5uS). */
|
||||
wait (300);
|
||||
}
|
||||
|
||||
usb_cable_config (1);
|
||||
RCC->APB1ENR |= RCC_APB1ENR_USBEN;
|
||||
nvic_enable_vector (USB_LP_CAN1_RX0_IRQn,
|
||||
CORTEX_PRIORITY_MASK (STM32_USB_IRQ_PRIORITY));
|
||||
/*
|
||||
* Note that we also have other IRQ(s):
|
||||
* USB_HP_CAN1_TX_IRQn (for double-buffered or isochronous)
|
||||
* USBWakeUp_IRQn (suspend/resume)
|
||||
*/
|
||||
RCC->APB1RSTR = RCC_APB1RSTR_USBRST;
|
||||
RCC->APB1RSTR = 0;
|
||||
}
|
||||
|
||||
#define FLASH_KEY1 0x45670123UL
|
||||
#define FLASH_KEY2 0xCDEF89ABUL
|
||||
|
||||
enum flash_status
|
||||
{
|
||||
FLASH_BUSY = 1,
|
||||
FLASH_ERROR_PG,
|
||||
FLASH_ERROR_WRP,
|
||||
FLASH_COMPLETE,
|
||||
FLASH_TIMEOUT
|
||||
};
|
||||
|
||||
static void __attribute__ ((used))
|
||||
flash_unlock (void)
|
||||
{
|
||||
FLASH->KEYR = FLASH_KEY1;
|
||||
FLASH->KEYR = FLASH_KEY2;
|
||||
}
|
||||
|
||||
|
||||
#define intr_disable() asm volatile ("cpsid i" : : : "memory")
|
||||
#define intr_enable() asm volatile ("cpsie i" : : : "memory")
|
||||
|
||||
#define FLASH_SR_BSY 0x01
|
||||
#define FLASH_SR_PGERR 0x04
|
||||
#define FLASH_SR_WRPRTERR 0x10
|
||||
#define FLASH_SR_EOP 0x20
|
||||
|
||||
#define FLASH_CR_PG 0x0001
|
||||
#define FLASH_CR_PER 0x0002
|
||||
#define FLASH_CR_MER 0x0004
|
||||
#define FLASH_CR_OPTPG 0x0010
|
||||
#define FLASH_CR_OPTER 0x0020
|
||||
#define FLASH_CR_STRT 0x0040
|
||||
#define FLASH_CR_LOCK 0x0080
|
||||
#define FLASH_CR_OPTWRE 0x0200
|
||||
#define FLASH_CR_ERRIE 0x0400
|
||||
#define FLASH_CR_EOPIE 0x1000
|
||||
|
||||
static int
|
||||
flash_wait_for_last_operation (uint32_t timeout)
|
||||
{
|
||||
int status;
|
||||
|
||||
do
|
||||
{
|
||||
status = FLASH->SR;
|
||||
if (--timeout == 0)
|
||||
break;
|
||||
}
|
||||
while ((status & FLASH_SR_BSY) != 0);
|
||||
|
||||
return status & (FLASH_SR_BSY|FLASH_SR_PGERR|FLASH_SR_WRPRTERR);
|
||||
}
|
||||
|
||||
#define FLASH_PROGRAM_TIMEOUT 0x00010000
|
||||
#define FLASH_ERASE_TIMEOUT 0x01000000
|
||||
|
||||
static int
|
||||
flash_program_halfword (uint32_t addr, uint16_t data)
|
||||
{
|
||||
int status;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
|
||||
|
||||
intr_disable ();
|
||||
if (status == 0)
|
||||
{
|
||||
FLASH->CR |= FLASH_CR_PG;
|
||||
|
||||
*(volatile uint16_t *)addr = data;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_PROGRAM_TIMEOUT);
|
||||
FLASH->CR &= ~FLASH_CR_PG;
|
||||
}
|
||||
intr_enable ();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static int
|
||||
flash_erase_page (uint32_t addr)
|
||||
{
|
||||
int status;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
|
||||
intr_disable ();
|
||||
if (status == 0)
|
||||
{
|
||||
FLASH->CR |= FLASH_CR_PER;
|
||||
FLASH->AR = addr;
|
||||
FLASH->CR |= FLASH_CR_STRT;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
FLASH->CR &= ~FLASH_CR_PER;
|
||||
}
|
||||
intr_enable ();
|
||||
|
||||
return status;
|
||||
}
|
||||
|
||||
static int
|
||||
flash_check_blank (const uint8_t *p_start, size_t size)
|
||||
{
|
||||
const uint8_t *p;
|
||||
|
||||
for (p = p_start; p < p_start + size; p++)
|
||||
if (*p != 0xff)
|
||||
return 0;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#define FLASH_START_ADDR 0x08000000 /* Fixed for all STM32F0/F1. */
|
||||
#define FLASH_OFFSET 0x1000 /* First pages are not-writable
|
||||
when protected. */
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7cc)
|
||||
#define CHIP_ID_REG ((uint32_t *)0x40015800)
|
||||
#else
|
||||
#define FLASH_SIZE_REG ((uint16_t *)0x1ffff7e0)
|
||||
#define CHIP_ID_REG ((uint32_t *)0xe0042000)
|
||||
#endif
|
||||
#define FLASH_START (FLASH_START_ADDR+FLASH_OFFSET)
|
||||
|
||||
static int
|
||||
flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
|
||||
{
|
||||
int status;
|
||||
uint32_t flash_end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
|
||||
|
||||
if (dst_addr < FLASH_START || dst_addr + len > flash_end)
|
||||
return 0;
|
||||
|
||||
while (len)
|
||||
{
|
||||
uint16_t hw = *src++;
|
||||
|
||||
hw |= (*src++ << 8);
|
||||
status = flash_program_halfword (dst_addr, hw);
|
||||
if (status != 0)
|
||||
return 0; /* error return */
|
||||
|
||||
dst_addr += 2;
|
||||
len -= 2;
|
||||
}
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
#define OPTION_BYTES_ADDR 0x1ffff800
|
||||
|
||||
static int
|
||||
flash_protect (void)
|
||||
{
|
||||
int status;
|
||||
uint32_t option_bytes_value;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
|
||||
intr_disable ();
|
||||
if (status == 0)
|
||||
{
|
||||
FLASH->OPTKEYR = FLASH_KEY1;
|
||||
FLASH->OPTKEYR = FLASH_KEY2;
|
||||
|
||||
FLASH->CR |= FLASH_CR_OPTER;
|
||||
FLASH->CR |= FLASH_CR_STRT;
|
||||
|
||||
status = flash_wait_for_last_operation (FLASH_ERASE_TIMEOUT);
|
||||
FLASH->CR &= ~FLASH_CR_OPTER;
|
||||
}
|
||||
intr_enable ();
|
||||
|
||||
if (status != 0)
|
||||
return 0;
|
||||
|
||||
option_bytes_value = *(uint32_t *)OPTION_BYTES_ADDR;
|
||||
return (option_bytes_value & 0xff) == 0xff ? 1 : 0;
|
||||
}
|
||||
|
||||
static void __attribute__((naked))
|
||||
flash_erase_all_and_exec (void (*entry)(void))
|
||||
{
|
||||
uint32_t addr = FLASH_START;
|
||||
uint32_t end = FLASH_START_ADDR + (*FLASH_SIZE_REG)*1024;
|
||||
uint32_t page_size = 1024;
|
||||
int r;
|
||||
|
||||
if (((*CHIP_ID_REG) & 0xfff) == 0x0414)
|
||||
page_size = 2048;
|
||||
|
||||
while (addr < end)
|
||||
{
|
||||
r = flash_erase_page (addr);
|
||||
if (r != 0)
|
||||
break;
|
||||
|
||||
addr += page_size;
|
||||
}
|
||||
|
||||
if (addr >= end)
|
||||
(*entry) ();
|
||||
|
||||
for (;;);
|
||||
}
|
||||
|
||||
struct SCB
|
||||
{
|
||||
volatile uint32_t CPUID;
|
||||
volatile uint32_t ICSR;
|
||||
volatile uint32_t VTOR;
|
||||
volatile uint32_t AIRCR;
|
||||
volatile uint32_t SCR;
|
||||
volatile uint32_t CCR;
|
||||
volatile uint8_t SHP[12];
|
||||
volatile uint32_t SHCSR;
|
||||
volatile uint32_t CFSR;
|
||||
volatile uint32_t HFSR;
|
||||
volatile uint32_t DFSR;
|
||||
volatile uint32_t MMFAR;
|
||||
volatile uint32_t BFAR;
|
||||
volatile uint32_t AFSR;
|
||||
volatile uint32_t PFR[2];
|
||||
volatile uint32_t DFR;
|
||||
volatile uint32_t ADR;
|
||||
volatile uint32_t MMFR[4];
|
||||
volatile uint32_t ISAR[5];
|
||||
};
|
||||
|
||||
#define SCS_BASE (0xE000E000)
|
||||
#define SCB_BASE (SCS_BASE + 0x0D00)
|
||||
static struct SCB *const SCB = ((struct SCB *const) SCB_BASE);
|
||||
|
||||
#define SYSRESETREQ 0x04
|
||||
static void
|
||||
nvic_system_reset (void)
|
||||
{
|
||||
SCB->AIRCR = (0x05FA0000 | (SCB->AIRCR & 0x70) | SYSRESETREQ);
|
||||
asm volatile ("dsb");
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static void __attribute__ ((naked))
|
||||
reset (void)
|
||||
{
|
||||
/*
|
||||
* This code may not be at the start of flash ROM, because of DFU.
|
||||
* So, we take the address from PC.
|
||||
*/
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
|
||||
"ldr r0, 1f\n\t" /* r0 = RAM start */
|
||||
"mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
|
||||
"mov r2, #0x10\n\t"
|
||||
"lsl r2, #8\n\t"
|
||||
"add r1, r1, r2\n\t"
|
||||
"sub r2, r2, #1\n\t"
|
||||
"bic r1, r1, r2\n\t"
|
||||
"mov r2, #188\n"
|
||||
"2:\n\t" /* Copy vectors. It will be enabled later by clock_init. */
|
||||
"ldr r3, [r1, r2]\n\t"
|
||||
"str r3, [r0, r2]\n\t"
|
||||
"sub r2, #4\n\t"
|
||||
"bcs 2b\n\t"
|
||||
"msr MSP, r3\n\t" /* Main (exception handler) stack. */
|
||||
"ldr r0, [r1, #4]\n\t" /* Reset handler. */
|
||||
"bx r0\n\t"
|
||||
".align 2\n"
|
||||
"1: .word 0x20000000"
|
||||
: /* no output */ : /* no input */ : "memory");
|
||||
#else
|
||||
extern const unsigned long *FT0, *FT1, *FT2;
|
||||
asm volatile ("cpsid i\n\t" /* Mask all interrupts. */
|
||||
"ldr r0, 1f\n\t" /* r0 = SCR */
|
||||
"mov r1, pc\n\t" /* r1 = (PC + 0x1000) & ~0x0fff */
|
||||
"mov r2, #0x1000\n\t"
|
||||
"add r1, r1, r2\n\t"
|
||||
"sub r2, r2, #1\n\t"
|
||||
"bic r1, r1, r2\n\t"
|
||||
"str r1, [r0, #8]\n\t" /* Set SCR->VCR */
|
||||
"ldr r0, [r1], #4\n\t"
|
||||
"msr MSP, r0\n\t" /* Main (exception handler) stack. */
|
||||
"ldr r0, [r1]\n\t" /* Reset handler. */
|
||||
"bx r0\n\t"
|
||||
".align 2\n"
|
||||
"1: .word 0xe000ed00"
|
||||
: /* no output */ : /* no input */ : "memory");
|
||||
/* Artificial entry to refer FT0, FT1, and FT2. */
|
||||
asm volatile (""
|
||||
: : "r" (FT0), "r" (FT1), "r" (FT2));
|
||||
#endif
|
||||
/* Never reach here. */
|
||||
}
|
||||
|
||||
typedef void (*handler)(void);
|
||||
extern uint8_t __ram_end__;
|
||||
|
||||
handler vector[] __attribute__ ((section(".vectors"))) = {
|
||||
(handler)&__ram_end__,
|
||||
reset,
|
||||
(handler)set_led,
|
||||
flash_unlock,
|
||||
(handler)flash_program_halfword,
|
||||
(handler)flash_erase_page,
|
||||
(handler)flash_check_blank,
|
||||
(handler)flash_write,
|
||||
(handler)flash_protect,
|
||||
(handler)flash_erase_all_and_exec,
|
||||
usb_lld_sys_init,
|
||||
usb_lld_sys_shutdown,
|
||||
nvic_system_reset,
|
||||
clock_init,
|
||||
gpio_init,
|
||||
NULL,
|
||||
};
|
||||
|
||||
const uint8_t sys_version[8] __attribute__((section(".sys.version"))) = {
|
||||
3*2+2, /* bLength */
|
||||
0x03, /* bDescriptorType = USB_STRING_DESCRIPTOR_TYPE */
|
||||
/* sys version: "2.1" */
|
||||
'2', 0, '.', 0, '1', 0,
|
||||
};
|
||||
|
||||
const uint32_t __attribute__((section(".sys.board_id")))
|
||||
sys_board_id = BOARD_ID;
|
||||
|
||||
const uint8_t __attribute__((section(".sys.board_name")))
|
||||
sys_board_name[] = BOARD_NAME;
|
||||
@@ -1 +0,0 @@
|
||||
../example-fsm-55/sys.h
|
||||
134
example-led/sys.h
Normal file
134
example-led/sys.h
Normal file
@@ -0,0 +1,134 @@
|
||||
#if defined(__ARM_ARCH_6M__)
|
||||
#define BOARD_ID_STM32F0_DISCOVERY 0xde4b4bc1
|
||||
#define BOARD_ID_FSM_55 0x83433c76
|
||||
#else
|
||||
#define BOARD_ID_CQ_STARM 0xc5480875
|
||||
#define BOARD_ID_FST_01_00 0x613870a9
|
||||
#define BOARD_ID_FST_01 0x696886af
|
||||
#define BOARD_ID_MAPLE_MINI 0x7a445272
|
||||
#define BOARD_ID_OLIMEX_STM32_H103 0xf92bb594
|
||||
#define BOARD_ID_STBEE_MINI 0x1f341961
|
||||
#define BOARD_ID_STBEE 0x945c37e8
|
||||
#define BOARD_ID_STM32_PRIMER2 0x21e5798d
|
||||
#define BOARD_ID_STM8S_DISCOVERY 0x2f0976bb
|
||||
#define BOARD_ID_ST_DONGLE 0x2cd4e471
|
||||
#define BOARD_ID_ST_NUCLEO_F103 0x9b87c16d
|
||||
#endif
|
||||
|
||||
extern const uint8_t sys_version[8];
|
||||
extern const uint32_t sys_board_id;
|
||||
extern const uint8_t sys_board_name[];
|
||||
|
||||
typedef void (*handler)(void);
|
||||
extern handler vector[16];
|
||||
|
||||
static inline const uint8_t *
|
||||
unique_device_id (void)
|
||||
{
|
||||
/* STM32F103 has 96-bit unique device identifier */
|
||||
const uint8_t *addr = (const uint8_t *)0x1ffff7e8;
|
||||
|
||||
return addr;
|
||||
}
|
||||
|
||||
static inline void
|
||||
set_led (int on)
|
||||
{
|
||||
void (*func) (int) = (void (*)(int))vector[2];
|
||||
|
||||
return (*func) (on);
|
||||
}
|
||||
|
||||
static inline void
|
||||
flash_unlock (void)
|
||||
{
|
||||
(*vector[3]) ();
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_program_halfword (uint32_t addr, uint16_t data)
|
||||
{
|
||||
int (*func) (uint32_t, uint16_t) = (int (*)(uint32_t, uint16_t))vector[4];
|
||||
|
||||
return (*func) (addr, data);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_erase_page (uint32_t addr)
|
||||
{
|
||||
int (*func) (uint32_t) = (int (*)(uint32_t))vector[5];
|
||||
|
||||
return (*func) (addr);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_check_blank (const uint8_t *p_start, size_t size)
|
||||
{
|
||||
int (*func) (const uint8_t *, int) = (int (*)(const uint8_t *, int))vector[6];
|
||||
|
||||
return (*func) (p_start, size);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_write (uint32_t dst_addr, const uint8_t *src, size_t len)
|
||||
{
|
||||
int (*func) (uint32_t, const uint8_t *, size_t)
|
||||
= (int (*)(uint32_t, const uint8_t *, size_t))vector[7];
|
||||
|
||||
return (*func) (dst_addr, src, len);
|
||||
}
|
||||
|
||||
static inline int
|
||||
flash_protect (void)
|
||||
{
|
||||
int (*func) (void) = (int (*)(void))vector[8];
|
||||
|
||||
return (*func) ();
|
||||
}
|
||||
|
||||
static inline void __attribute__((noreturn))
|
||||
flash_erase_all_and_exec (void (*entry)(void))
|
||||
{
|
||||
void (*func) (void (*)(void)) = (void (*)(void (*)(void)))vector[9];
|
||||
|
||||
(*func) (entry);
|
||||
for (;;);
|
||||
}
|
||||
|
||||
static inline void
|
||||
usb_lld_sys_init (void)
|
||||
{
|
||||
(*vector[10]) ();
|
||||
}
|
||||
|
||||
static inline void
|
||||
usb_lld_sys_shutdown (void)
|
||||
{
|
||||
(*vector[11]) ();
|
||||
}
|
||||
|
||||
static inline void
|
||||
nvic_system_reset (void)
|
||||
{
|
||||
(*vector[12]) ();
|
||||
}
|
||||
|
||||
/*
|
||||
* Users can override INLINE by 'attribute((used))' to have an
|
||||
* implementation defined.
|
||||
*/
|
||||
#if !defined(INLINE)
|
||||
#define INLINE __inline__
|
||||
#endif
|
||||
|
||||
static INLINE void
|
||||
clock_init (void)
|
||||
{
|
||||
(*vector[13]) ();
|
||||
}
|
||||
|
||||
static INLINE void
|
||||
gpio_init (void)
|
||||
{
|
||||
(*vector[14]) ();
|
||||
}
|
||||
Reference in New Issue
Block a user