Update example-fsm-55.

This commit is contained in:
NIIBE Yutaka
2017-11-17 11:44:56 +09:00
parent 44054415c8
commit 2b98dc3de8
5 changed files with 15 additions and 57 deletions

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@@ -1,5 +1,7 @@
2017-11-17 NIIBE Yutaka <gniibe@fsij.org>
* example-fsm-55: Update for new sleep API.
* rules.mk (CSRC): Add mcu/chx-$(CHIP).c.
* chopstx-cortex-m.c (idle, chx_sleep_mode): Remove.

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@@ -97,12 +97,12 @@ enables coherent code for ease of maintenance.
@node Use of sleep mode
Calling the chopstx_conf_idle function with 1 to allow the idle thread
going to sleep. MCU will be in sleep mode when no threads are
running. By setting relevant system registers, MCU will be able to be
into deep sleep or stand-by mode.
running. By setting relevant bits of system registers, MCU will be
able to be into stop or stand-by mode, which is MCU dependent.
If you use this sleep feature, please consider and implement
carefully. Enabling sleep, it may result bricked board; A board with
no RESET pin cannot be debugged by JTAG/SWD.
carefully. Enabling sleep, it may result a bricked board; A board
with no RESET pin cannot be debugged by JTAG/SWD.
@node API

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@@ -7,6 +7,8 @@ LDSCRIPT= hacker-emblem.ld
CSRC = reset.c hh.c
CHIP=stm32f0
# Hacker Emblem and "Happy Hacking!" demonstration
# CSRC = reset.c hh.c

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@@ -378,6 +378,8 @@ main (int argc, const char *argv[])
(void)argc;
(void)argv;
chopstx_conf_idle (1);
chopstx_mutex_init (&mtx);
chopstx_cond_init (&cnd0);
chopstx_cond_init (&cnd1);
@@ -418,56 +420,8 @@ main (int argc, const char *argv[])
chopstx_join (button_thd, NULL);
chopstx_join (led_thd, NULL);
setup_scr_sleepdeep ();
for (;;)
asm volatile ("wfi" : : : "memory");
chopstx_conf_idle (4);
chopstx_poll (NULL, 0, NULL);
return 0;
}
struct SCB
{
volatile uint32_t CPUID;
volatile uint32_t ICSR;
volatile uint32_t VTOR;
volatile uint32_t AIRCR;
volatile uint32_t SCR;
volatile uint32_t CCR;
volatile uint8_t SHP[12];
volatile uint32_t SHCSR;
volatile uint32_t CFSR;
volatile uint32_t HFSR;
volatile uint32_t DFSR;
volatile uint32_t MMFAR;
volatile uint32_t BFAR;
volatile uint32_t AFSR;
volatile uint32_t PFR[2];
volatile uint32_t DFR;
volatile uint32_t ADR;
volatile uint32_t MMFR[4];
volatile uint32_t ISAR[5];
};
#define SCS_BASE (0xE000E000)
#define SCB_BASE (SCS_BASE + 0x0D00)
static struct SCB *const SCB = ((struct SCB *)SCB_BASE);
#define SCB_SCR_SLEEPDEEP (1 << 2)
struct PWR
{
volatile uint32_t CR;
volatile uint32_t CSR;
};
#define PWR_CR_PDDS 0x0002
#define PWR_CR_CWUF 0x0004
#define PWR_BASE (APBPERIPH_BASE + 0x00007000)
#define PWR ((struct PWR *) PWR_BASE)
static void setup_scr_sleepdeep (void)
{
PWR->CR |= PWR_CR_CWUF;
PWR->CR |= PWR_CR_PDDS;
SCB->SCR |= SCB_SCR_SLEEPDEEP;
}

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@@ -364,7 +364,7 @@ main (int argc, const char *argv[])
(void)argc;
(void)argv;
chopstx_conf_idle (4);
chopstx_conf_idle (1);
chopstx_mutex_init (&mtx);
chopstx_cond_init (&cnd0);
@@ -406,8 +406,8 @@ main (int argc, const char *argv[])
chopstx_join (button_thd, NULL);
chopstx_join (led_thd, NULL);
for (;;)
asm volatile ("wfi" : : : "memory");
chopstx_conf_idle (4);
chopstx_poll (NULL, 0, NULL);
return 0;
}