ADC settings are consolidated into the driver
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22
AUTHORS
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22
AUTHORS
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@@ -0,0 +1,22 @@
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Aidan Thornton:
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Added Maple Mini support.
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board/board-maple-mini.h
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Kaz Kojima:
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Added STM32 Primer2 support.
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board/board-stm32-primer2.h
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NIIBE Yutaka:
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Write the library:
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chopstx.c, eventflag.c, entry.c, clk_gpio_init.c
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chopstx.h, eventflag.h
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Draw the logo:
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chopstx.svg, chopstx.png
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Write examples:
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example-led, example-cdc, example-fsm-55
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Write board:
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board-fst-01.h, board-fst-01-00.h,
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board-olimex-stm32-h103.h, board-stm8s-discovery.h
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board-cq-starm.h, board-stbee-mini.h, board-stbee.h,
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board-stm32f0-discovery.h, board-fsm-55.h
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@@ -46,5 +46,3 @@
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#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN|RCC_APB2ENR_IOPCEN)
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#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST|RCC_APB2RSTR_IOPCRST)
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/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
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@@ -31,5 +31,3 @@
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#define RCC_ENR_IOP_EN RCC_APB2ENR_IOPAEN
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#define RCC_RSTR_IOP_RST RCC_APB2RSTR_IOPARST
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/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
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@@ -65,11 +65,3 @@
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#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
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#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
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/* NeuG settings for ADC2. */
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#define NEUG_ADC_SETTING2_SMPR1 0
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#define NEUG_ADC_SETTING2_SMPR2 ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5) \
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| ADC_SMPR2_SMP_AN9(ADC_SAMPLE_1P5)
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#define NEUG_ADC_SETTING2_SQR3 ADC_SQR3_SQ1_N(ADC_CHANNEL_IN0) \
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| ADC_SQR3_SQ2_N(ADC_CHANNEL_IN9)
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#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
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@@ -40,5 +40,3 @@
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#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
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#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
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/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
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@@ -112,11 +112,3 @@
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#define AFIO_MAPR_SOMETHING AFIO_MAPR_SWJ_CFG_DISABLE
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/* NeuG settings for ADC2. */
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#define NEUG_ADC_SETTING2_SMPR1 0
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#define NEUG_ADC_SETTING2_SMPR2 ADC_SMPR2_SMP_AN1(ADC_SAMPLE_1P5) \
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| ADC_SMPR2_SMP_AN2(ADC_SAMPLE_1P5)
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#define NEUG_ADC_SETTING2_SQR3 ADC_SQR3_SQ1_N(ADC_CHANNEL_IN1) \
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| ADC_SQR3_SQ2_N(ADC_CHANNEL_IN2)
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#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
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@@ -34,11 +34,3 @@
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#define VAL_GPIO_LED_ODR 0xFFFFFFFF
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#define VAL_GPIO_LED_CRL 0x88862888 /* PD7...PD0 */
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#define VAL_GPIO_LED_CRH 0x88888888 /* PD15...PD8 */
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/* NeuG settings for ADC2. */
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#define NEUG_ADC_SETTING2_SMPR1 ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) \
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| ADC_SMPR1_SMP_AN11(ADC_SAMPLE_1P5)
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#define NEUG_ADC_SETTING2_SMPR2 0
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#define NEUG_ADC_SETTING2_SQR3 ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10) \
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| ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11)
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#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
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@@ -56,5 +56,3 @@
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(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPDEN | RCC_APB2ENR_IOPEEN)
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#define RCC_RSTR_IOP_RST \
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(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPDRST | RCC_APB2RSTR_IOPERST)
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/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
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@@ -48,8 +48,6 @@
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#define RCC_RSTR_IOP_RST \
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(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | RCC_APB2RSTR_AFIORST)
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/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */
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/*
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* Port B setup.
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* PB4 - (TIM3_CH1) input with pull-up
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