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Version 0.04

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This commit is contained in:
NIIBE Yutaka
2014-12-10 16:18:29 +09:00
parent 0276d0825e
commit 23893d9b73
14 changed files with 200 additions and 107 deletions
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4
board/board-fst-01-00.h
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@@ -25,7 +25,7 @@
#define GPIO_USB_BASE GPIOA_BASE
#define GPIO_LED_BASE GPIOA_BASE
#define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPAEN
#define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPARST
#define RCC_ENR_IOP_EN RCC_APB2ENR_IOPAEN
#define RCC_RSTR_IOP_RST RCC_APB2RSTR_IOPARST
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */

4
board/board-fst-01.h
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@@ -58,8 +58,8 @@
#define GPIO_USB_BASE GPIOA_BASE
#define GPIO_LED_BASE GPIOB_BASE
#define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
#define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN)
#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST)
/* NeuG settings for ADC2. */
#define NEUG_ADC_SETTING2_SMPR1 0

4
board/board-olimex-stm32-h103.h
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@@ -25,8 +25,8 @@
#define GPIO_USB_BASE GPIOC_BASE
#define GPIO_LED_BASE GPIOC_BASE
#define RCC_APB2ENR_IOP_EN RCC_APB2ENR_IOPCEN
#define RCC_APB2RSTR_IOP_RST RCC_APB2RSTR_IOPCRST
#define RCC_ENR_IOP_EN RCC_APB2ENR_IOPCEN
#define RCC_RSTR_IOP_RST RCC_APB2RSTR_IOPCRST
/* NeuG settings for ADC2. */
#define NEUG_ADC_SETTING2_SMPR1 ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) \

8
board/board-stbee-mini.h
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@@ -78,9 +78,9 @@
#define GPIOB_7SEG_F 9
#define GPIOB_7SEG_G 8
#define RCC_APB2ENR_IOP_EN \
#define RCC_ENR_IOP_EN \
(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_AFIOEN)
#define RCC_APB2RSTR_IOP_RST \
#define RCC_RSTR_IOP_RST \
(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | RCC_APB2RSTR_AFIORST)
#else
/*
@@ -97,8 +97,8 @@
#define VAL_GPIO_CRL 0x88888888 /* PA7...PA0 */
#define VAL_GPIO_CRH 0x63611888 /* PA15...PA8 */
#define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_AFIOEN)
#define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_AFIORST)
#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN | RCC_APB2ENR_AFIOEN)
#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_AFIORST)
#endif

4
board/board-stbee.h
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@@ -17,8 +17,8 @@
#define VAL_GPIO_OTHER_CRL 0x88888884 /* PA7...PA0 */
#define VAL_GPIO_OTHER_CRH 0x88811888 /* PA15...PA8 */
#define RCC_APB2ENR_IOP_EN (RCC_APB2ENR_IOPAEN|RCC_APB2ENR_IOPDEN)
#define RCC_APB2RSTR_IOP_RST (RCC_APB2RSTR_IOPARST|RCC_APB2RSTR_IOPDRST)
#define RCC_ENR_IOP_EN (RCC_APB2ENR_IOPAEN|RCC_APB2ENR_IOPDEN)
#define RCC_RSTR_IOP_RST (RCC_APB2RSTR_IOPARST|RCC_APB2RSTR_IOPDRST)
/*
* Port D setup.

4
board/board-stm8s-discovery.h
View File

@@ -39,9 +39,9 @@
#define GPIO_USB_BASE GPIOA_BASE
#define GPIO_LED_BASE GPIOA_BASE
#define RCC_APB2ENR_IOP_EN \
#define RCC_ENR_IOP_EN \
(RCC_APB2ENR_IOPAEN | RCC_APB2ENR_IOPBEN | RCC_APB2ENR_AFIOEN)
#define RCC_APB2RSTR_IOP_RST \
#define RCC_RSTR_IOP_RST \
(RCC_APB2RSTR_IOPARST | RCC_APB2RSTR_IOPBRST | RCC_APB2RSTR_AFIORST)
/* NeuG settings for ADC2 is default (PA0: Analog IN0, PA1: Analog IN1). */