stm32l4: Enable PWR module and USV-bit in CR2.

This commit is contained in:
NIIBE Yutaka
2019-04-18 19:13:23 +09:00
parent 359082f80a
commit 1d2aacd0a4
2 changed files with 8 additions and 1 deletions

View File

@@ -61,6 +61,11 @@ clock_init (void)
(0x00 << 2) | /* PCLK for USART2 */
(0x00 << 0) ); /* PCLK for USART1 */
/* Enable PWR clock */
RCC->APB1ENR1 |= (1 << 28);
RCC->APB1RSTR1 = (1 << 28);
RCC->APB1RSTR1 = 0;
/* Enable HSI48 clock */
RCC->CRRCR |= 1;
while ((RCC->CRRCR & 0x02) == 0)